📄 smc_x_hw.c
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/*
**********************************************************************
* Micrium, Inc.
* 949 Crestview Circle
* Weston, FL 33327-1848
*
* uC/FS
*
* (c) Copyright 2001 - 2003, Micrium, Inc.
* All rights reserved.
*
***********************************************************************
----------------------------------------------------------------------
File : smc_hw.c
Purpose : SMC/NAND hardware layer sample
Ports are used to control Smartmedia card or
NAND flashes:
----------------------------------------------------------------------
Known problems or limitations with current version
----------------------------------------------------------------------
None.
---------------------------END-OF-HEADER------------------------------
*/
/*********************************************************************
*
* #include Section
*
**********************************************************************
*/
#include "smc_x_hw.h"
#include "FS_Conf.h"
#include "FS_ConfDefaults.h"
/*********************************************************************
*
* #define Macros
*
**********************************************************************
*/
/*********************************************************************
*
* Macros for setting timer
*
* Please define here how to setup your timer. (Hardware or software)
*
*
**********************************************************************
*/
/*
* Sets the value for timer
*/
#define SET_TIMER_VALUE(t)
/*
* Starts the timer
*/
#define START_TIMER()
/*
* Stops the timer
*/
#define STOP_TIMER()
/*
* Get timer value
*/
#define GET_TIMER_VALUE() Timeval
/*
* Setup timer
*/
#define SET_TIMER_CONFIG()
/*********************************************************************
*
* Macros for setting the pin to configure card
*
* Please define here the sfr (special function register)
* of your processor.
*
*
**********************************************************************
*/
/* Port direction registers */
#define PORTDATA_DIRECTION
/* ports to */
#define SMC_ALE_PORT
#define SMC_CE_PORT
#define SMC_CLE_PORT
#define SMC_RDY_PORT
#define SMC_RE_PORT
#define SMC_WE_PORT
#define SMC_DATA_PORT
/* */
#define SMC_ALE_PIN
#define SMC_CE_PIN
#define SMC_CLE_PIN
#define SMC_RDY_PIN
#define SMC_RE_PIN
#define SMC_WE_PIN
#define SET_DATA2INPUT() PORTDATA_DIRECTION = 0x00
#define SET_DATA2OUTPUT() PORTDATA_DIRECTION = 0xff
/*********************************************************************
*
* defines
*
**********************************************************************
*/
#define SMC_GET_DATA(Data) Data = (FS_U8)SMC_DATA_PORT
#define SMC_SET_DATA(Data) SMC_DATA_PORT = (FS_U8)Data
#define SMC_SET_ALE() SMC_ALE_PORT |= (1 << SMC_ALE_PIN)
#define SMC_CLR_ALE() SMC_ALE_PORT &= ~(1 << SMC_ALE_PIN)
#define SMC_SET_CE() SMC_CE_PORT |= (1 << SMC_CE_PIN)
#define SMC_CLR_CE() SMC_CE_PORT &= ~(1 << SMC_CE_PIN)
#define SMC_SET_CLE() SMC_CLE_PORT |= (1 << SMC_CLE_PIN)
#define SMC_CLR_CLE() SMC_CLE_PORT &= ~(1 << SMC_CLE_PIN)
#define SMC_GET_RDY() (SMC_RDY_PORT && (1 << SMC_RDY_PIN))
#define SMC_SET_RE() SMC_RE_PORT |= (1 << SMC_RE_PIN)
#define SMC_CLR_RE() SMC_RE_PORT &= ~(1 << SMC_RE_PIN)
#define SMC_SET_WE() SMC_WE_PORT |= (1 << SMC_RE_PIN)
#define SMC_CLR_WE() SMC_WE_PORT &= ~(1 << SMC_RE_PIN)
/*********************************************************************
*
* Commands and status for SMC/NAND devices
*
**********************************************************************
*/
#define CMD_RDSTATUS 0x70
#define STATUS_FAIL (1 << 0)
#define STATUS_READY (1 << 6)
#define STATUS_WP (1 << 7)
/*********************************************************************
*
* Local Variables
*
**********************************************************************
*/
/*
* Following variables are used instead of HW pin detection, which may not
* not supported by your hardware. Their values are set by "FS__SMC_HW_DetectStatus".
*/
static char _Hw_card_changed = 1;
static char _Hw_card_wprotect;
static char _Hw_card_in;
/*********************************************************************
*
* Global functions section 1
*
* All functions in this section are called by "smc_phy.c".
* These functions should implement a 0.1 ms timer.
*/
/*********************************************************************
*
* FS_SMC_HW_X_StopTimer
*/
void FS_SMC_HW_X_StopTimer(FS_U32 id) {
FS_USE_PARA(id);
STOP_TIMER();
}
/*********************************************************************
*
* FS_SMC_HW_X_ChkTimer
*/
int FS_SMC_HW_X_ChkTimer(FS_U32 id) {
int Time;
FS_USE_PARA(id);
Time = GET_TIMER_VALUE();
if (Time < 0) {
Time = 0;
}
return Time;
}
/*********************************************************************
*
* FS_SMC_HW_X_SetTimer
*/
void FS_SMC_HW_X_SetTimer(FS_U32 id,unsigned short time) {
FS_USE_PARA(id);
SET_TIMER_VALUE(time);
SET_TIMER_CONFIG();
START_TIMER();
}
/*********************************************************************
*
* FS_SMC_HW_X_WaitTimer
*/
void FS_SMC_HW_X_WaitTimer(FS_U32 id,unsigned short time) {
int TimerValue;
FS_USE_PARA(id);
SET_TIMER_VALUE(time);
SET_TIMER_CONFIG();
START_TIMER();
do {
TimerValue = GET_TIMER_VALUE();
} while(TimerValue > 0);
}
/*********************************************************************
*
* Global functions section 2
*
**********************************************************************
All functions in this section are called by "smc_phy.c".
Functions in this section access the SMC control signals and
SMC data port of the Cogent EP7312 Development Kit.
*/
/*********************************************************************
*
* FS_SMC_HW_X_SetData
*/
void FS_SMC_HW_X_SetData(FS_U32 id) {
FS_USE_PARA(id);
/* nCE low, CLE low, ALE low */
SMC_CLR_CE();
SMC_CLR_CLE();
SMC_CLR_ALE();
}
/*********************************************************************
*
* FS_SMC_HW_X_SetCmd
*/
void FS_SMC_HW_X_SetCmd(FS_U32 id) {
FS_USE_PARA(id);
/* nCE low, CLE high, ALE low */
SMC_CLR_CE();
SMC_SET_CLE();
SMC_CLR_ALE();
}
/*********************************************************************
*
* FS_SMC_HW_X_SetAddr
*/
void FS_SMC_HW_X_SetAddr(FS_U32 id) {
FS_USE_PARA(id);
/* nCE low, CLE low, ALE high */
SMC_CLR_CE();
SMC_CLR_CLE();
SMC_SET_ALE();
}
/*********************************************************************
*
* FS_SMC_HW_X_SetStandby
*/
void FS_SMC_HW_X_SetStandby(FS_U32 id) {
/* nCE high, CLE low, ALE low */
SMC_SET_CE();
SMC_CLR_CLE();
SMC_CLR_ALE();
}
/*********************************************************************
*
* FS_SMC_HW_X_InData
*/
char FS_SMC_HW_X_InData(FS_U32 id) {
FS_U8 Data;
SET_DATA2INPUT();
SMC_CLR_RE(); /* RE is active low */
SMC_GET_DATA(Data);
SMC_SET_RE(); /* disable RE */
return Data;
}
/*********************************************************************
*
* FS_SMC_HW_X_OutData
*/
void FS_SMC_HW_X_OutData(FS_U32 id,unsigned char data) {
SET_DATA2OUTPUT();
SMC_CLR_WE(); /* WE is active low */
SMC_SET_DATA(data);
SMC_SET_WE(); /* disable WE */
}
/*********************************************************************
*
* FS_SMC_HW_X_VccOn
*/
void FS_SMC_HW_X_VccOn(FS_U32 id) {
}
/*********************************************************************
*
* FS_SMC_HW_X_VccOff
*/
void FS_SMC_HW_X_VccOff(FS_U32 id) {
}
/*********************************************************************
*
* FS_SMC_HW_X_ChkCardIn
*/
char FS_SMC_HW_X_ChkCardIn(FS_U32 id) {
return _Hw_card_in;
}
/*********************************************************************
*
* FS_SMC_HW_X_ChkStatus
*/
char FS_SMC_HW_X_ChkStatus(FS_U32 id) {
if (_Hw_card_changed) {
_Hw_card_changed = 0;
return 1;
}
return 0;
}
/*********************************************************************
*
* FS_SMC_HW_X_ChkWP
*/
char FS_SMC_HW_X_ChkWP(FS_U32 id) {
return _Hw_card_wprotect;
}
/*********************************************************************
*
* FS_SMC_HW_X_ChkPower
*/
char FS_SMC_HW_X_ChkPower(FS_U32 id) {
return 1;
}
/*********************************************************************
*
* FS_SMC_HW_X_ChkBusy
*/
char FS_SMC_HW_X_ChkBusy(FS_U32 id) {
char Busy;
/* If hardware does not support checking RDY/BSY,
* we check status by asking the card.
*/
#if FS_SMC_HW_SUPPORT_BSYLINE_CHECK == 0
FS_SMC_HW_X_SetCmd(id);
FS_SMC_HW_X_OutData(id, CMD_RDSTATUS)
FS_SMC_HW_X_SetData(id);
Busy = FS_SMC_HW_X_InData(id);
FS_SMC_HW_X_SetStandby(id);
if (Busy & 0x40) {
return 0;
}
return 1;
#else
/* Ready = high -> return 0
* Busy = low -> return 1
*/
Busy = SMC_GET_RDY() ? 0 : 1;
return Busy;
#endif
}
/*********************************************************************
*
* Global functions section 3
*
*
* All functions in this section are called by "smc_drv.c", which is
* the main module of file system's SMC driver. Module "smc_phy.c" does
* not use these functions.
*/
/*********************************************************************
*
* FS_SMC_HW_X_BusyLedOn
*/
void FS_SMC_HW_X_BusyLedOn(FS_U32 id) {
}
/*********************************************************************
*
* FS_SMC_HW_X_BusyLedOff
*/
void FS_SMC_HW_X_BusyLedOff(FS_U32 id) {
}
/*********************************************************************
*
* FS_SMC_HW_X_DetectStatus
*
* This function is called by "smc_drv.c" only and is used to detect
* a disk change. It is not used by "smc_phy.c", which uses functions
* "FS__SMC_HW_ChkCardIn", "FS__SMC_HW_ChkStatus", "FS__SMC_HW_ChkWP"
* and "FS__SMC_HW_ChkPower" for that purpose.
*
* This function needs to be called periodically to make sure, that
* every disk change is detected, because there may no HW disk change
* detect in your hardware. This is done by executing
* "FS_IoCtl("smc:",FS_CMD_CHK_DSKCHANGE,0,0)".
*/
char FS_SMC_HW_X_DetectStatus(FS_U32 id) {
char Status;
FS_SMC_HW_X_SetCmd(id);
FS_SMC_HW_X_OutData(id, CMD_RDSTATUS); /* cmd read status */
FS_SMC_HW_X_SetData(id);
Status = FS_SMC_HW_X_InData(id);
FS_SMC_HW_X_SetStandby(id);
/* Check returned status */
if ((Status == 0x70) || (Status & STATUS_FAIL) || (!(Status & STATUS_READY))) {
_Hw_card_changed = 1;
_Hw_card_wprotect = 1;
_Hw_card_in = 0;
return 1;
}
_Hw_card_in = 1;
if (Status & STATUS_WP) {
_Hw_card_wprotect = 0;
} else {
_Hw_card_wprotect = 1;
}
return 0;
}
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