test.hier_info

Altera-jtag0

cpu_jtag_debug_module_writedata[10] <= cpu_data_master_writedata[10].DB_MAX_OUTPUT_PORT_TYPE
cpu_jtag_debug_module_writedata[11] <= cpu_data_master_writedata[11].DB_MAX_OUTPUT_PORT_TYPE
cpu_jtag_debug_module_writedata[12] <= cpu_data_master_writedata[12].DB_MAX_OUTPUT_PORT_TYPE
cpu_jtag_debug_module_writedata[13] <= cpu_data_master_writedata[13].DB_MAX_OUTPUT_PORT_TYPE
cpu_jtag_debug_module_writedata[14] <= cpu_data_master_writedata[14].DB_MAX_OUTPUT_PORT_TYPE
cpu_jtag_debug_module_writedata[15] <= cpu_data_master_writedata[15].DB_MAX_OUTPUT_PORT_TYPE
cpu_jtag_debug_module_writedata[16] <= cpu_data_master_writedata[16].DB_MAX_OUTPUT_PORT_TYPE
cpu_jtag_debug_module_writedata[17] <= cpu_data_master_writedata[17].DB_MAX_OUTPUT_PORT_TYPE
cpu_jtag_debug_module_writedata[18] <= cpu_data_master_writedata[18].DB_MAX_OUTPUT_PORT_TYPE
cpu_jtag_debug_module_writedata[19] <= cpu_data_master_writedata[19].DB_MAX_OUTPUT_PORT_TYPE
cpu_jtag_debug_module_writedata[20] <= cpu_data_master_writedata[20].DB_MAX_OUTPUT_PORT_TYPE
cpu_jtag_debug_module_writedata[21] <= cpu_data_master_writedata[21].DB_MAX_OUTPUT_PORT_TYPE
cpu_jtag_debug_module_writedata[22] <= cpu_data_master_writedata[22].DB_MAX_OUTPUT_PORT_TYPE
cpu_jtag_debug_module_writedata[23] <= cpu_data_master_writedata[23].DB_MAX_OUTPUT_PORT_TYPE
cpu_jtag_debug_module_writedata[24] <= cpu_data_master_writedata[24].DB_MAX_OUTPUT_PORT_TYPE
cpu_jtag_debug_module_writedata[25] <= cpu_data_master_writedata[25].DB_MAX_OUTPUT_PORT_TYPE
cpu_jtag_debug_module_writedata[26] <= cpu_data_master_writedata[26].DB_MAX_OUTPUT_PORT_TYPE
cpu_jtag_debug_module_writedata[27] <= cpu_data_master_writedata[27].DB_MAX_OUTPUT_PORT_TYPE
cpu_jtag_debug_module_writedata[28] <= cpu_data_master_writedata[28].DB_MAX_OUTPUT_PORT_TYPE
cpu_jtag_debug_module_writedata[29] <= cpu_data_master_writedata[29].DB_MAX_OUTPUT_PORT_TYPE
cpu_jtag_debug_module_writedata[30] <= cpu_data_master_writedata[30].DB_MAX_OUTPUT_PORT_TYPE
cpu_jtag_debug_module_writedata[31] <= cpu_data_master_writedata[31].DB_MAX_OUTPUT_PORT_TYPE
d1_cpu_jtag_debug_module_end_xfer <= d1_cpu_jtag_debug_module_end_xfer~reg0.DB_MAX_OUTPUT_PORT_TYPE


|test|nios:inst|cpu_data_master_arbitrator:the_cpu_data_master
clk => cpu_data_master_waitrequest~reg0.CLK
clk => registered_cpu_data_master_readdata[31].CLK
clk => registered_cpu_data_master_readdata[30].CLK
clk => registered_cpu_data_master_readdata[29].CLK
clk => registered_cpu_data_master_readdata[28].CLK
clk => registered_cpu_data_master_readdata[27].CLK
clk => registered_cpu_data_master_readdata[26].CLK
clk => registered_cpu_data_master_readdata[25].CLK
clk => registered_cpu_data_master_readdata[24].CLK
clk => registered_cpu_data_master_readdata[23].CLK
clk => registered_cpu_data_master_readdata[22].CLK
clk => registered_cpu_data_master_readdata[21].CLK
clk => registered_cpu_data_master_readdata[20].CLK
clk => registered_cpu_data_master_readdata[19].CLK
clk => registered_cpu_data_master_readdata[18].CLK
clk => registered_cpu_data_master_readdata[17].CLK
clk => registered_cpu_data_master_readdata[16].CLK
clk => registered_cpu_data_master_readdata[15].CLK
clk => registered_cpu_data_master_readdata[14].CLK
clk => registered_cpu_data_master_readdata[13].CLK
clk => registered_cpu_data_master_readdata[12].CLK
clk => registered_cpu_data_master_readdata[11].CLK
clk => registered_cpu_data_master_readdata[10].CLK
clk => registered_cpu_data_master_readdata[9].CLK
clk => registered_cpu_data_master_readdata[8].CLK
clk => registered_cpu_data_master_readdata[7].CLK
clk => registered_cpu_data_master_readdata[6].CLK
clk => registered_cpu_data_master_readdata[5].CLK
clk => registered_cpu_data_master_readdata[4].CLK
clk => registered_cpu_data_master_readdata[3].CLK
clk => registered_cpu_data_master_readdata[2].CLK
clk => registered_cpu_data_master_readdata[1].CLK
clk => registered_cpu_data_master_readdata[0].CLK
clk => cpu_data_master_no_byte_enables_and_last_term~reg0.CLK
clk => dbs_16_reg_segment_0[15].CLK
clk => dbs_16_reg_segment_0[14].CLK
clk => dbs_16_reg_segment_0[13].CLK
clk => dbs_16_reg_segment_0[12].CLK
clk => dbs_16_reg_segment_0[11].CLK
clk => dbs_16_reg_segment_0[10].CLK
clk => dbs_16_reg_segment_0[9].CLK
clk => dbs_16_reg_segment_0[8].CLK
clk => dbs_16_reg_segment_0[7].CLK
clk => dbs_16_reg_segment_0[6].CLK
clk => dbs_16_reg_segment_0[5].CLK
clk => dbs_16_reg_segment_0[4].CLK
clk => dbs_16_reg_segment_0[3].CLK
clk => dbs_16_reg_segment_0[2].CLK
clk => dbs_16_reg_segment_0[1].CLK
clk => dbs_16_reg_segment_0[0].CLK
clk => cpu_data_master_dbs_address[1]~reg0.CLK
clk => cpu_data_master_dbs_address[0]~reg0.CLK
cpu_data_master_address[0] => cpu_data_master_address_to_slave[0].DATAIN
cpu_data_master_address[1] => cpu_data_master_address_to_slave[1].DATAIN
cpu_data_master_address[2] => cpu_data_master_address_to_slave[2].DATAIN
cpu_data_master_address[3] => cpu_data_master_address_to_slave[3].DATAIN
cpu_data_master_address[4] => cpu_data_master_address_to_slave[4].DATAIN
cpu_data_master_address[5] => cpu_data_master_address_to_slave[5].DATAIN
cpu_data_master_address[6] => cpu_data_master_address_to_slave[6].DATAIN
cpu_data_master_address[7] => cpu_data_master_address_to_slave[7].DATAIN
cpu_data_master_address[8] => cpu_data_master_address_to_slave[8].DATAIN
cpu_data_master_address[9] => cpu_data_master_address_to_slave[9].DATAIN
cpu_data_master_address[10] => cpu_data_master_address_to_slave[10].DATAIN
cpu_data_master_address[11] => cpu_data_master_address_to_slave[11].DATAIN
cpu_data_master_address[12] => cpu_data_master_address_to_slave[12].DATAIN
cpu_data_master_address[13] => cpu_data_master_address_to_slave[13].DATAIN
cpu_data_master_address[14] => cpu_data_master_address_to_slave[14].DATAIN
cpu_data_master_address[15] => cpu_data_master_address_to_slave[15].DATAIN
cpu_data_master_address[16] => cpu_data_master_address_to_slave[16].DATAIN
cpu_data_master_address[17] => cpu_data_master_address_to_slave[17].DATAIN
cpu_data_master_address[18] => cpu_data_master_address_to_slave[18].DATAIN
cpu_data_master_address[19] => cpu_data_master_address_to_slave[19].DATAIN
cpu_data_master_address[20] => cpu_data_master_address_to_slave[20].DATAIN
cpu_data_master_address[21] => cpu_data_master_address_to_slave[21].DATAIN
cpu_data_master_address[22] => cpu_data_master_address_to_slave[22].DATAIN
cpu_data_master_address[23] => cpu_data_master_address_to_slave[23].DATAIN
cpu_data_master_address[24] => cpu_data_master_address_to_slave[24].DATAIN
cpu_data_master_byteenable_sdram_s1[0] => WideNor0.IN1
cpu_data_master_byteenable_sdram_s1[1] => WideNor0.IN0
cpu_data_master_debugaccess => ~NO_FANOUT~
cpu_data_master_granted_cpu_jtag_debug_module => r_0~1.IN1
cpu_data_master_granted_jtag_uart_avalon_jtag_slave => ~NO_FANOUT~
cpu_data_master_granted_onchip_mem_s1 => r_0~19.IN1
cpu_data_master_granted_pio_s1 => ~NO_FANOUT~
cpu_data_master_granted_sdram_s1 => pre_dbs_count_enable~4.IN1
cpu_data_master_granted_sdram_s1 => r_1~0.IN1
cpu_data_master_granted_sysid_control_slave => ~NO_FANOUT~
cpu_data_master_qualified_request_cpu_jtag_debug_module => r_0~0.IN1
cpu_data_master_qualified_request_cpu_jtag_debug_module => r_0~1.IN0
cpu_data_master_qualified_request_cpu_jtag_debug_module => r_0~3.IN1
cpu_data_master_qualified_request_cpu_jtag_debug_module => r_0~6.IN1
cpu_data_master_qualified_request_jtag_uart_avalon_jtag_slave => r_0~9.IN0
cpu_data_master_qualified_request_jtag_uart_avalon_jtag_slave => r_0~12.IN0
cpu_data_master_qualified_request_onchip_mem_s1 => r_0~16.IN0
cpu_data_master_qualified_request_onchip_mem_s1 => r_0~19.IN0
cpu_data_master_qualified_request_onchip_mem_s1 => r_0~21.IN1
cpu_data_master_qualified_request_onchip_mem_s1 => r_0~25.IN1
cpu_data_master_qualified_request_pio_s1 => r_0~29.IN1
cpu_data_master_qualified_request_pio_s1 => r_0~31.IN1
cpu_data_master_qualified_request_pio_s1 => r_0~34.IN1
cpu_data_master_qualified_request_sdram_s1 => r_0~37.IN1
cpu_data_master_qualified_request_sdram_s1 => r_1~0.IN0
cpu_data_master_qualified_request_sdram_s1 => r_1~1.IN1
cpu_data_master_qualified_request_sdram_s1 => r_1~6.IN1
cpu_data_master_qualified_request_sysid_control_slave => r_1~11.IN1
cpu_data_master_qualified_request_sysid_control_slave => r_1~14.IN1
cpu_data_master_read => r_1~12.IN0
cpu_data_master_read => r_1~3.IN0
cpu_data_master_read => r_0~32.IN0
cpu_data_master_read => r_0~26.IN0
cpu_data_master_read => r_0~22.IN0
cpu_data_master_read => r_0~4.IN0
cpu_data_master_read => r_0~3.IN0
cpu_data_master_read => r_0~21.IN0
cpu_data_master_read => r_0~31.IN0
cpu_data_master_read => r_1~1.IN0
cpu_data_master_read => r_1~11.IN0
cpu_data_master_read_data_valid_cpu_jtag_debug_module => ~NO_FANOUT~
cpu_data_master_read_data_valid_jtag_uart_avalon_jtag_slave => ~NO_FANOUT~
cpu_data_master_read_data_valid_onchip_mem_s1 => ~NO_FANOUT~
cpu_data_master_read_data_valid_pio_s1 => ~NO_FANOUT~
cpu_data_master_read_data_valid_sdram_s1 => pre_dbs_count_enable~3.IN0
cpu_data_master_read_data_valid_sdram_s1 => r_1~2.IN1
cpu_data_master_read_data_valid_sdram_s1_shift_register => ~NO_FANOUT~
cpu_data_master_read_data_valid_sysid_control_slave => ~NO_FANOUT~
cpu_data_master_requests_cpu_jtag_debug_module => r_0~0.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~31.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~30.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~29.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~28.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~27.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~26.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~25.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~24.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~23.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~22.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~21.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~20.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~19.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~18.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~17.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~16.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~15.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~14.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~13.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~12.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~11.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~10.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~9.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~8.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~7.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~6.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~5.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~4.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~3.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~2.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~1.IN0
cpu_data_master_requests_cpu_jtag_debug_module => cpu_data_master_readdata~0.IN0
cpu_data_master_requests_jtag_uart_avalon_jtag_slave => p1_registered_cpu_data_master_readdata~0.IN0
cpu_data_master_requests_jtag_uart_avalon_jtag_slave => p1_registered_cpu_data_master_readdata~1.IN0
cpu_data_master_requests_jtag_uart_avalon_jtag_slave => p1_registered_cpu_data_master_readdata~2.IN0
cpu_data_master_requests_jtag_uart_avalon_jtag_slave => p1_registered_cpu_data_master_readdata~3.IN0
cpu_data_master_requests_jtag_uart_avalon_jtag_slave => p1_registered_cpu_data_master_readdata~4.IN0
cpu_data_master_requests_jtag_uart_avalon_jtag_slave => p1_registered_cpu_data_master_readdata~5.IN0