motfecend.c

Tornado 2.0.2 source code!vxworks的源代码

*
* RETURNS: OK or ERROR
*/
LOCAL STATUS motFecInitParse
    (
    DRV_CTRL *	pDrvCtrl,      		/* pointer to DRV_CTRL structure */
    char *	initString		/* parameter string */
    )
    {
    char *  tok;		/* an initString token */
    char *  holder = NULL;	/* points to initString fragment beyond tok */

    tok = strtok_r (initString, ":", &holder);
    if (tok == NULL)
	return ERROR;
    pDrvCtrl->unit = atoi (tok);

    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
	return ERROR;
    pDrvCtrl->motCpmAddr = (UINT32) strtoul (tok, NULL, 16);

    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
	return ERROR;
    pDrvCtrl->ivec = (int) strtoul (tok, NULL, 16);

    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
	return ERROR;
    pDrvCtrl->pBufBase = (char *) strtoul (tok, NULL, 16);

    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
	return ERROR;
    pDrvCtrl->bufSize = strtoul (tok, NULL, 16);

    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
	return ERROR;
    pDrvCtrl->fifoTxBase = (UINT32) strtoul (tok, NULL, 16);

    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
	return ERROR;
    pDrvCtrl->fifoRxBase = (UINT32) strtoul (tok, NULL, 16);

    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
	return ERROR;
    pDrvCtrl->tbdNum = (UINT16) strtoul (tok, NULL, 16);

    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
	return ERROR;
    pDrvCtrl->rbdNum = (UINT16) strtoul (tok, NULL, 16);

    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
	return ERROR;
    pDrvCtrl->phyInfo->phyAddr = (UINT8) strtoul (tok, NULL, 16);

    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
	return ERROR;
    pDrvCtrl->phyInfo->isoPhyAddr = (UINT8) strtoul (tok, NULL, 16);

    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
        return ERROR;
    pDrvCtrl->phyInfo->phyDefMode = (UINT8) strtoul (tok, NULL, 16);

    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
	return ERROR;
    pDrvCtrl->userFlags = strtoul (tok, NULL, 16);

    if (!pDrvCtrl->tbdNum || pDrvCtrl->tbdNum <= 2)
	{
	MOT_FEC_FLAG_SET (MOT_FEC_INV_TBD_NUM);
	pDrvCtrl->tbdNum = MOT_FEC_TBD_DEF_NUM;
	}

    if (!pDrvCtrl->rbdNum || pDrvCtrl->rbdNum <= 2)
	{
	MOT_FEC_FLAG_SET (MOT_FEC_INV_RBD_NUM);
	pDrvCtrl->rbdNum = MOT_FEC_RBD_DEF_NUM; 
	}

    MOT_FEC_LOG (MOT_FEC_DBG_LOAD,
		 ("motFecEndParse: unit=%d motCpmAddr=0x%x ivec=0x%x
		 bufBase=0x%x bufSize=0x%x \n"),
		 pDrvCtrl->unit, 
		 (int) pDrvCtrl->motCpmAddr,
		 (int) pDrvCtrl->ivec,
		 (int) pDrvCtrl->pBufBase,
		 pDrvCtrl->bufSize,
		 0);

    MOT_FEC_LOG (MOT_FEC_DBG_LOAD,
		 ("motFecEndParse: fifoTxBase=0x%x fifoRxBase=0x%x
		 tbdNum=%d rbdNum=%d flags=0x%x\n"),
		 pDrvCtrl->fifoTxBase,
		 pDrvCtrl->fifoRxBase,
		 pDrvCtrl->tbdNum,
		 pDrvCtrl->rbdNum,
		 pDrvCtrl->userFlags,
		 0);

    MOT_FEC_LOG (MOT_FEC_DBG_LOAD,
                 ("motFecEndParse: phyAddr=0x%x isoPhyAddr=0x%x
                  phyDefMode=0x%x \n"),
                 pDrvCtrl->phyInfo->phyAddr,
                 pDrvCtrl->phyInfo->isoPhyAddr,
                 pDrvCtrl->phyInfo->phyDefMode,
                 0, 0, 0);
    return (OK);
    }

/*******************************************************************************
* motFecInitMem - initialize memory
*
* This routine initializes all the memory needed by the driver whose control
* structure is passed in <pDrvCtrl>.
*
* RETURNS: OK or ERROR
*/
LOCAL STATUS motFecInitMem
    (
    DRV_CTRL *  pDrvCtrl       		/* pointer to DRV_CTRL structure */
    )
    {
    UINT32		bdSize;	   	/* temporary size holder */
    UINT32		clSize;	   	/* temporary size holder */
    UINT16		clNum;		/* a buffer number holder */
    M_CL_CONFIG	 	mclBlkConfig = {0, 0, NULL, 0};
					/* cluster blocks configuration */
    CL_DESC	 	clDescTbl [] = { {MOT_FEC_MAX_CL_LEN, 0, NULL, 0} };
					/* cluster blocks config table */
    int clDescTblNumEnt = (NELEMENTS (clDescTbl));
					/* number of different clusters */

    /* initialize the netPool */

    if ((pDrvCtrl->endObj.pNetPool = malloc (sizeof (NET_POOL))) == NULL)
	return (ERROR);

    /* 
     * we include here room for both TBDs and RBDs, 
     * and the alignment factor.
     */

    bdSize = (MOT_FEC_BD_MEM (pDrvCtrl) + MOT_FEC_BD_ALIGN);

    /* 
     * Establish the memory area that we will share with the device.  If
     * the caller has provided an area, then we assume it is non-cacheable
     * and will not require the use of the special cache routines.
     * If the caller did provide an area, then we must obtain it from
     * the system, using the cache savvy allocation routine.
     */

    switch ((int) pDrvCtrl->pBufBase)
	{
	case NONE :			     /* we must obtain it */

	    /* this driver can't handle write incoherent caches */

	    if (!CACHE_DMA_IS_WRITE_COHERENT ()) 
		{
		MOT_FEC_LOG (MOT_FEC_DBG_LOAD, ("motFecInitMem: shared 
					        memory not cache coherent\n"),
					        1, 2, 3, 4, 5, 6);
		return (ERROR);
		}

	    pDrvCtrl->pBufBase = cacheDmaMalloc (bdSize);

	    if (pDrvCtrl->pBufBase == NULL)      /* no memory available */
		{
		MOT_FEC_LOG (MOT_FEC_DBG_LOAD, ("motFecInitMem: could not 
					        obtain memory\n"),
					        1, 2, 3, 4, 5, 6);
		return (ERROR);
		}

            pDrvCtrl->pBufBase = (char *) (((UINT32) (pDrvCtrl->pBufBase) +
                                  MOT_FEC_BD_ALIGN - 1) &
                                  ~(MOT_FEC_BD_ALIGN -1));
 
	    pDrvCtrl->bufSize = bdSize;

	    MOT_FEC_FLAG_SET (MOT_FEC_OWN_MEM);

	    pDrvCtrl->bdCacheFuncs = cacheDmaFuncs;

	    break;

	default :			       /* the user provided an area */

	    if (pDrvCtrl->bufSize == 0) 
		{
		MOT_FEC_LOG (MOT_FEC_DBG_LOAD, ("motFecInitMem: not enough 
					        memory\n"),
					        1, 2, 3, 4, 5, 6);
		return (ERROR);
		}

	    /* 
	     * check the user provided enough memory with reference
	     * to the given number of receive/transmit frames, if any.
	     */

	    if (MOT_FEC_FLAG_ISSET (MOT_FEC_INV_TBD_NUM) && 
		MOT_FEC_FLAG_ISSET (MOT_FEC_INV_RBD_NUM))
		{
		pDrvCtrl->tbdNum = (MOT_FEC_MEM_SZ (pDrvCtrl) /
				    (MOT_FEC_TBD_SZ + MOT_FEC_RBD_SZ));

		pDrvCtrl->rbdNum = pDrvCtrl->tbdNum;
		}
	    else if (MOT_FEC_FLAG_ISSET (MOT_FEC_INV_TBD_NUM))
		{
		pDrvCtrl->tbdNum = ((MOT_FEC_MEM_SZ (pDrvCtrl)
				    - MOT_FEC_RBD_MEM (pDrvCtrl))
				    / MOT_FEC_TBD_SZ);
		}
	    else if (MOT_FEC_FLAG_ISSET (MOT_FEC_INV_RBD_NUM))
		{
		pDrvCtrl->rbdNum = ((MOT_FEC_MEM_SZ (pDrvCtrl)
				    - MOT_FEC_TBD_MEM (pDrvCtrl))
				    / MOT_FEC_RBD_SZ);
		}
	    else
		{
		if (MOT_FEC_MEM_SZ (pDrvCtrl) < bdSize) 
		    {
		    MOT_FEC_LOG (MOT_FEC_DBG_LOAD, ("motFecInitMem: not enough 
						   memory\n"),
						   1, 2, 3, 4, 5, 6);
		    return (ERROR);
		    }
		}

	    if ((pDrvCtrl->tbdNum <= MOT_FEC_TBD_MIN) 
		|| (pDrvCtrl->rbdNum <= MOT_FEC_RBD_MIN))
		{
		MOT_FEC_LOG (MOT_FEC_DBG_LOAD, ("motFecInitMem: not enough 
					       memory\n"),
					       1, 2, 3, 4, 5, 6);
		return (ERROR);
		}

	    MOT_FEC_FLAG_CLEAR (MOT_FEC_OWN_MEM);

	    pDrvCtrl->bdCacheFuncs = cacheNullFuncs;

	    break;
	}

    /* cache functions descriptor for data buffers */

    motFecBufCacheFuncs.flushRtn = motFecBufFlushRtn;
    motFecBufCacheFuncs.invalidateRtn = motFecBufInvRtn;
    motFecBufCacheFuncs.virtToPhysRtn = NULL;
    motFecBufCacheFuncs.physToVirtRtn = NULL;

    pDrvCtrl->bufCacheFuncs = motFecBufCacheFuncs;

    /* zero the shared memory */

    memset (pDrvCtrl->pBufBase, 0, (int) pDrvCtrl->bufSize);

    /* 
     * number of clusters, including loaning buffers, a min number
     * of transmit clusters for copy-mode transmit, and one transmit
     * cluster for polling operation.
     */

    clNum = pDrvCtrl->rbdNum + MOT_FEC_BD_LOAN_NUM
	    + 1 + MOT_FEC_TX_CL_NUM;

    clSize = (MOT_FEC_TX_MEM (pDrvCtrl) + MOT_FEC_RX_MEM (pDrvCtrl)
	    + (CL_OVERHEAD * clNum)
	    + MOT_FEC_BD_ALIGN);

    /* pool of mblks */

    if (mclBlkConfig.mBlkNum == 0)
	mclBlkConfig.mBlkNum = clNum * 2;

    /* pool of clusters, including loaning buffers */

    if (clDescTbl[0].clNum == 0)
	{
	clDescTbl[0].clNum = clNum;
	clDescTbl[0].clSize = MOT_FEC_MAX_CL_LEN;
	}

    /* there's a cluster overhead and an alignment issue */

    clDescTbl[0].memSize = (clDescTbl[0].clNum * 
			    (clDescTbl[0].clSize + CL_OVERHEAD));
    clDescTbl[0].memArea = (char *) (memalign (CL_ALIGNMENT, clSize));

    if (clDescTbl[0].memArea == NULL)
	{
	return (ERROR);
	}

    /* store the pointer to the clBlock area */

    pDrvCtrl->pClBlkArea = clDescTbl[0].memArea;
    pDrvCtrl->clBlkSize = clDescTbl[0].memSize;

    /* pool of cluster blocks */

    if (mclBlkConfig.clBlkNum == 0)
	mclBlkConfig.clBlkNum = clDescTbl[0].clNum;

    /* get memory for mblks */

    if (mclBlkConfig.memArea == NULL)
	{
	/* memory size adjusted to hold the netPool pointer at the head */

	mclBlkConfig.memSize = ((mclBlkConfig.mBlkNum
				* (M_BLK_SZ + MBLK_ALIGNMENT))
				+ (mclBlkConfig.clBlkNum
				* (CL_BLK_SZ + CL_ALIGNMENT)));

	mclBlkConfig.memArea = (char *) memalign (MBLK_ALIGNMENT, 
						  mclBlkConfig.memSize);

	if (mclBlkConfig.memArea == NULL)
	    {
	    return (ERROR);
	    }

	/* store the pointer to the mBlock area */

	pDrvCtrl->pMBlkArea = mclBlkConfig.memArea;
	pDrvCtrl->mBlkSize = mclBlkConfig.memSize;
	}

    /* init the mem pool */

    if (netPoolInit (pDrvCtrl->endObj.pNetPool, &mclBlkConfig, 
		     &clDescTbl[0], clDescTblNumEnt, NULL) 
	== ERROR)
	{
	return (ERROR);
	}

    if ((pDrvCtrl->pClPoolId = netClPoolIdGet (pDrvCtrl->endObj.pNetPool,
					       MOT_FEC_MAX_CL_LEN, FALSE)) 
        == NULL)
	{
	return (ERROR);
	}

    MOT_FEC_LOG (MOT_FEC_DBG_LOAD, ("motFecInitMem... Done\n"),
				    0, 0, 0, 0, 0, 0);

    return OK;
    }

/**************************************************************************
*
* motFecStart - start the device
*
* This routine starts the FEC device and brings it up to an operational
* state.  The driver must have already been loaded with the motFecEndLoad()
* routine.
*
* RETURNS: OK, or ERROR if the device could not be initialized.
*
* INTERNAL
* The speed field inthe phyInfo structure is only set after the call
* to the physical layer init routine. On the other hand, the mib2 
* interface is initialized in the motFecEndLoad() routine, and the default
* value of 10Mbit assumed there is not always correct. We need to
* correct it here.
*
*/
LOCAL STATUS motFecStart
    (
    DRV_CTRL *pDrvCtrl       /* pointer to DRV_CTRL structure */
    )
    {
    int		retVal;		/* convenient holder for return value */
    char        bucket[4];

    MOT_FEC_LOG (MOT_FEC_DBG_START, ("Starting end...\n"), 1, 2, 3, 4, 5, 6);

    /* must have been loaded */