motfecend.c

Tornado 2.0.2 source code!vxworks的源代码

#include "endLib.h"
#include "lstLib.h"

#include "drv/intrCtl/ppc860Intr.h"
#include "drv/end/motFecEnd.h"

/* defines */

/* initial divisor and final XOR value for reflected CRC */

#define INIT_REFLECTED  0xFFFFFFFF
#define XOROT           INIT_REFLECTED

/* Driver debug control */

#define MOT_FEC_DBG 

/* Driver debug control */

#ifdef MOT_FEC_DBG
#define MOT_FEC_DBG_OFF			0x0000
#define MOT_FEC_DBG_RX			0x0001
#define MOT_FEC_DBG_TX			0x0002
#define MOT_FEC_DBG_POLL		0x0004
#define MOT_FEC_DBG_MII			0x0008
#define MOT_FEC_DBG_LOAD		0x0010
#define MOT_FEC_DBG_IOCTL		0x0020
#define MOT_FEC_DBG_INT			0x0040
#define MOT_FEC_DBG_START    		0x0080
#define MOT_FEC_DBG_ANY    		0xffff

UINT32	motFecEndDbg = 0x0;
UINT32	motFecBabRxErr = 0x0;
UINT32	motFecBabTxErr = 0x0;
UINT32	motFecHbFailErr = 0x0;
UINT32	motFecTxLcErr = 0x0;
UINT32	motFecTxUrErr = 0x0;
UINT32	motFecTxCslErr = 0x0;
UINT32	motFecTxRlErr = 0x0;
UINT32	motFecRxLgErr = 0x0;
UINT32	motFecRxNoErr = 0x0;
UINT32	motFecRxCrcErr = 0x0;
UINT32	motFecRxOvErr = 0x0;
UINT32	motFecRxTrErr = 0x0;
UINT32  motFecRxLsErr = 0x0;
UINT32  motFecRxMemErr = 0x0;

DRV_CTRL *  pDrvCtrlDbg = NULL;

#define MOT_FEC_BAB_RX_ADD						\
    motFecBabRxErr++;

#define MOT_FEC_BAB_TX_ADD						\
    motFecBabTxErr++;

#define MOT_FEC_HB_FAIL_ADD						\
    motFecHbFailErr++;

#define MOT_FEC_TX_LC_ADD						\
    motFecTxLcErr++;

#define MOT_FEC_TX_UR_ADD						\
    motFecTxUrErr++;

#define MOT_FEC_TX_CSL_ADD						\
    motFecTxCslErr++;

#define MOT_FEC_TX_RL_ADD						\
    motFecTxRlErr++;

#define MOT_FEC_RX_LG_ADD						\
    motFecRxLgErr++;

#define MOT_FEC_RX_NO_ADD						\
    motFecRxNoErr++;

#define MOT_FEC_RX_CRC_ADD						\
    motFecRxCrcErr++;

#define MOT_FEC_RX_OV_ADD						\
    motFecRxOvErr++;

#define MOT_FEC_RX_TR_ADD						\
    motFecRxTrErr++;

#define MOT_FEC_RX_MEM_ADD						\
    motFecRxMemErr++;

#define MOT_FEC_RX_LS_ADD						\
    motFecRxLsErr++;

#define MOT_FEC_LOG(FLG, X0, X1, X2, X3, X4, X5, X6)			\
    {									\
    if (motFecEndDbg & FLG)						\
        logMsg (X0, X1, X2, X3, X4, X5, X6);			        \
    }

#else /* MOT_FEC_DBG */

#define MOT_FEC_BAB_RX_ADD
#define MOT_FEC_BAB_TX_ADD
#define MOT_FEC_HB_FAIL_ADD
#define MOT_FEC_TX_LC_ADD
#define MOT_FEC_TX_UR_ADD
#define MOT_FEC_TX_CSL_ADD
#define MOT_FEC_TX_RL_ADD
#define MOT_FEC_RX_MEM_ADD
#define MOT_FEC_RX_LS_ADD
#define MOT_FEC_LOG(FLG, X0, X1, X2, X3, X4, X5, X6)

#endif /* MOT_FEC_DBG */

/* general macros for reading/writing from/to specified locations */

/* Cache and virtual/physical memory related macros */

#define MOT_FEC_PHYS_TO_VIRT(physAddr)					    \
	CACHE_DRV_PHYS_TO_VIRT (&pDrvCtrl->bdCacheFuncs, (char *)(physAddr))

#define MOT_FEC_VIRT_TO_PHYS(virtAddr)					    \
	CACHE_DRV_VIRT_TO_PHYS (&pDrvCtrl->bdCacheFuncs, (char *)(virtAddr))

#define MOT_FEC_BD_CACHE_INVAL(address, len)			    	    \
        CACHE_DRV_INVALIDATE (&pDrvCtrl->bdCacheFuncs, (address), (len))

#define MOT_FEC_CACHE_INVAL(address, len)                                   \
	CACHE_DRV_INVALIDATE (&pDrvCtrl->bufCacheFuncs, (address), (len))

#define MOT_FEC_CACHE_FLUSH(address, len)                                   \
	CACHE_DRV_FLUSH (&pDrvCtrl->bufCacheFuncs, (address), (len))

#define EIEIO_SYNC  __asm__("        eieio;  sync")

#if  (CPU_FAMILY==PPC)
#   undef CACHE_PIPE_FLUSH
#   define CACHE_PIPE_FLUSH() EIEIO_SYNC
#endif

/* driver flags */

#define MOT_FEC_OWN_MEM		0x01	/* internally provided memory */
#define MOT_FEC_INV_TBD_NUM	0x02	/* invalid tbdNum provided */
#define MOT_FEC_INV_RBD_NUM	0x04	/* invalid rbdNum provided */
#define MOT_FEC_POLLING		0x08	/* polling mode */
#define MOT_FEC_PROM		0x20    /* promiscuous mode */
#define MOT_FEC_MCAST		0x40    /* multicast addressing mode */
#define MOT_FEC_FD		0x80    /* full duplex mode */

/* shortcuts */

#define MOT_FEC_FLAG_CLEAR(clearBits)					\
    (pDrvCtrl->flags &= ~(clearBits))

#define MOT_FEC_FLAG_SET(setBits)					\
    (pDrvCtrl->flags |= (setBits))

#define MOT_FEC_FLAG_GET()						\
    (pDrvCtrl->flags)

#define MOT_FEC_FLAG_ISSET(setBits)					\
    (pDrvCtrl->flags & (setBits))

#define MOT_FEC_PHY_FLAGS_SET(setBits)					\
    (pDrvCtrl->phyInfo->phyFlags |= (setBits))

#define MOT_FEC_PHY_FLAGS_ISSET(setBits)				\
    (pDrvCtrl->phyInfo->phyFlags & (setBits))

#define MOT_FEC_PHY_FLAGS_GET(setBits)					\
    (pDrvCtrl->phyInfo->phyFlags)

#define MOT_FEC_PHY_FLAGS_CLEAR(clearBits)				\
    (pDrvCtrl->phyInfo->phyFlags &= ~(clearBits))

#define MOT_FEC_USR_FLAG_ISSET(setBits)					\
    (pDrvCtrl->userFlags & (setBits))

#define END_FLAGS_ISSET(setBits)					\
    ((&pDrvCtrl->endObj)->flags & (setBits))

#define MOT_FEC_ADDR_GET(pEnd)                                          \
    ((pEnd)->mib2Tbl.ifPhysAddress.phyAddress)

#define MOT_FEC_ADDR_LEN_GET(pEnd)                                      \
    ((pEnd)->mib2Tbl.ifPhysAddress.addrLength)

/* some BDs definitions */

/* 
 * the total is 0x600 and it accounts for the required alignment
 * of receive data buffers, and the cluster overhead.
 */

#define MOT_FEC_MAX_CL_LEN      ((MOT_FEC_MAX_PCK_SZ			\
				 + (MOT_FEC_BD_ALIGN - 1)		\
				 + (CL_OVERHEAD - 1))			\
				 & (~ (CL_OVERHEAD - 1)))

#define MOT_FEC_MAX_RX_BUF	((MOT_FEC_MAX_PCK_SZ + MOT_FEC_BD_ALIGN - 1) \
				& (~(MOT_FEC_BD_ALIGN - 1)))

#define MOT_FEC_BUF_V_LEN	(MOT_FEC_MAX_RX_BUF + 16)

#define MOT_FEC_RX_BUF_SZ       (MOT_FEC_MAX_CL_LEN)
#define MOT_FEC_TX_BUF_SZ       (MOT_FEC_MAX_CL_LEN)

#define MOT_FEC_MEM_SZ(pDrvCtrl)					\
    ((pDrvCtrl)->bufSize)

#define MOT_FEC_LOAN_SZ							\
    (MOT_FEC_RX_BUF_SZ * MOT_FEC_BD_LOAN_NUM)

#define MOT_FEC_RX_MEM(pDrvCtrl)					\
    (MOT_FEC_RX_BUF_SZ * ((pDrvCtrl)->rbdNum + MOT_FEC_BD_LOAN_NUM))

#define MOT_FEC_TX_MEM(pDrvCtrl)					\
    (MOT_FEC_TX_BUF_SZ * (MOT_FEC_TBD_POLL_NUM + MOT_FEC_TX_CL_NUM))

#define MOT_FEC_TBD_MEM(pDrvCtrl)					\
    (MOT_FEC_TBD_SZ * (pDrvCtrl)->tbdNum)

#define MOT_FEC_RBD_MEM(pDrvCtrl)					\
    (MOT_FEC_RBD_SZ * (pDrvCtrl)->rbdNum)

#define MOT_FEC_BD_MEM(pDrvCtrl)					\
    (MOT_FEC_TBD_MEM (pDrvCtrl) + MOT_FEC_RBD_MEM (pDrvCtrl))

/* Control/Status Registers (CSR) definitions */

#define MOT_FEC_CSR_WR(csrOff, csrVal)					\
    {									\
    UINT32 temp = 0;							\
									\
    temp = (UINT32) MOT_FEC_VIRT_TO_PHYS ((pDrvCtrl->motCpmAddr) 	\
					  + (csrOff));			\
									\
    MOT_FEC_LONG_WR ((UINT32 *) (temp), (csrVal));			\
    }									

#define MOT_FEC_CSR_RD(csrOff, csrVal)					\
    {									\
    UINT32 temp = 0;							\
									\
    temp = (UINT32) MOT_FEC_VIRT_TO_PHYS ((pDrvCtrl->motCpmAddr) 	\
					  + (csrOff));			\
									\
    MOT_FEC_LONG_RD ((UINT32 *) (temp), (csrVal));			\
    }									

/* macros to read/write tx/rx buffer descriptors */

#define MOT_FEC_BD_WORD_WR(bdAddr, bdOff, bdVal)			\
    {									\
    UINT32 temp = 0;							\
									\
    temp = (UINT32) MOT_FEC_VIRT_TO_PHYS ((bdAddr) + (bdOff));		\
									\
    MOT_FEC_WORD_WR ((UINT16 *) (temp), (bdVal));			\
    }									

/* here we're writing the data pointer, so it's a physical address */

#define MOT_FEC_BD_LONG_WR(bdAddr, bdOff, bdVal)			\
    {									\
    UINT32 temp1 = 0;							\
    UINT32 temp2 = 0;							\
									\
    temp1 = (UINT32) MOT_FEC_VIRT_TO_PHYS ((bdAddr) + (bdOff));		\
    temp2 = (UINT32) MOT_FEC_VIRT_TO_PHYS (bdVal);			\
									\
    MOT_FEC_LONG_WR ((UINT32 *) (temp1), (temp2));			\
    }									

#define MOT_FEC_BD_WORD_RD(bdAddr, bdOff, bdVal)			\
    {									\
    UINT32 temp = 0;							\
									\
    temp = (UINT32) MOT_FEC_VIRT_TO_PHYS ((bdAddr) + (bdOff));		\
									\
    MOT_FEC_WORD_RD ((UINT16 *) (temp), (bdVal));					\
    }									

#define MOT_FEC_BD_LONG_RD(bdAddr, bdOff, bdVal)			\
    {									\
    UINT32 temp1 = 0;							\
    UINT32 temp2 = 0;							\
									\
    temp1 = (UINT32) MOT_FEC_VIRT_TO_PHYS ((bdAddr) + (bdOff));		\
									\
    MOT_FEC_LONG_RD ((UINT32 *) (temp1), (temp2));			\
									\
    bdVal = (char *) MOT_FEC_PHYS_TO_VIRT (temp2);			\
    }									

#define MOT_FEC_NEXT_TBD(pDrvCtrl, pTbd)				\
    (pTbd) = (MOT_FEC_TBD_ID) ((pDrvCtrl)->tbdBase +   \
			       ((pDrvCtrl)->tbdIndex * MOT_FEC_TBD_SZ))

#define MOT_FEC_USED_TBD(pDrvCtrl, pTbd)				   \
    (pTbd) = (MOT_FEC_TBD_ID) ((pDrvCtrl)->tbdBase + 	   \
			       ((pDrvCtrl)->usedTbdIndex * MOT_FEC_TBD_SZ))

#define MOT_FEC_NEXT_RBD(pDrvCtrl, pRbd)				   \
    (pRbd) = (MOT_FEC_RBD_ID) ((pDrvCtrl)->rbdBase + 	   \
			       (((pDrvCtrl)->rbdIndex) * MOT_FEC_RBD_SZ))

#define MOT_FEC_ETH_ENABLE						\
    MOT_FEC_CSR_WR (MOT_FEC_CTRL_OFF, MOT_FEC_ETH_EN);

#define MOT_FEC_ETH_DISABLE						\
    MOT_FEC_CSR_WR (MOT_FEC_CTRL_OFF, MOT_FEC_ETH_DIS);

#define MOT_FEC_RX_ACTIVATE						\
    MOT_FEC_CSR_WR (MOT_FEC_RX_ACT_OFF, MOT_FEC_RX_ACT);

#define MOT_FEC_TX_ACTIVATE						\
    MOT_FEC_CSR_WR (MOT_FEC_TX_ACT_OFF, MOT_FEC_TX_ACT);

#define MOT_FEC_INT_DISABLE						\
    MOT_FEC_CSR_WR (MOT_FEC_MASK_OFF, 0);

#define MOT_FEC_INT_ENABLE						\
    MOT_FEC_CSR_WR (MOT_FEC_MASK_OFF, (pDrvCtrl->intMask));

#define MOT_FEC_VECTOR(pDrvCtrl)					\
    ((pDrvCtrl)->ivec)

/* more shortcuts */

#define MOT_FEC_GRA_SEM_CREATE						\
    if ((pDrvCtrl->graSem = semBCreate (SEM_Q_FIFO, SEM_EMPTY)) 	\
	== NULL)							\
	goto errorExit

#define MOT_FEC_GRA_SEM_DELETE						\
    if ((pDrvCtrl->graSem) != NULL) 					\
	semDelete (pDrvCtrl->graSem)

#define MOT_FEC_GRA_SEM_GIVE						\
    (semGive (pDrvCtrl->graSem))

#define MOT_FEC_GRA_SEM_TAKE						\
    (semTake (pDrvCtrl->graSem, WAIT_FOREVER))

#define MOT_FEC_MII_SEM_CREATE						\
    if ((pDrvCtrl->miiSem = semBCreate (SEM_Q_FIFO, SEM_EMPTY)) 	\
	== NULL)							\
	goto errorExit

#define MOT_FEC_MII_SEM_DELETE						\
    if ((pDrvCtrl->miiSem) != NULL) 					\
	semDelete (pDrvCtrl->miiSem)

#define MOT_FEC_MII_SEM_GIVE						\
    (semGive (pDrvCtrl->miiSem))

#define MOT_FEC_MII_SEM_TAKE						\
    (semTake (pDrvCtrl->miiSem, WAIT_FOREVER))

#define NET_BUF_ALLOC()                                                 \
    netClusterGet (pDrvCtrl->endObj.pNetPool, pDrvCtrl->pClPoolId)	\

#define NET_TO_MOT_FEC_BUF(netBuf)                              	\
    (((UINT32) (netBuf) + MOT_FEC_BD_ALIGN - 1) 			\
      & ~(MOT_FEC_BD_ALIGN - 1))

#define NET_BUF_FREE(pBuffer)                                           \
    netClFree (pDrvCtrl->endObj.pNetPool, (pBuffer))
 
#define NET_MBLK_ALLOC()                                                \
    netMblkGet (pDrvCtrl->endObj.pNetPool, M_DONTWAIT, MT_DATA)
 
#define NET_MBLK_FREE(pMblock)                                          \
    netMblkFree (pDrvCtrl->endObj.pNetPool, (M_BLK_ID) (pMblock))
 
#define NET_CL_BLK_ALLOC()                                              \
    netClBlkGet (pDrvCtrl->endObj.pNetPool, M_DONTWAIT)
 
#define NET_CL_BLK_FREE(pClBlock)                                       \
    netClBlkFree (pDrvCtrl->endObj.pNetPool, (CL_BLK_ID) (pClBlock))
 
#define NET_MBLK_BUF_FREE(pMblock)                                      \
    netMblkClFree ((M_BLK_ID) (pMblock))
 
#define NET_MBLK_CL_JOIN(pMblock, pClBlock, ret)                        \
    ret = netMblkClJoin ((pMblock), (pClBlock))
 
#define NET_CL_BLK_JOIN(pClBlock, pBuffer, length, ret)                 \
    ret = netClBlkJoin ((pClBlock), (pBuffer), (length), NULL, 0, 0, 0)
 
/* globals */

/* locals */

/* intermediate remainders for table-driven CRC calculations */

LOCAL UINT32  crctable[256] =