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computer00 发表于 2005-6-17 19:39 <FONT
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style="FONT-SIZE: 12px; LINE-HEIGHT: 18px">/*H**************************************************************************<BR>*
NAME: regsnd1.h <BR>*----------------------------------------------------------------------------<BR>*
Copyright (c) 2003
Atmel.<BR>*----------------------------------------------------------------------------<BR>*
RELEASE: snd1c-refd-nf-4_0_3 <BR>*
REVISION: 1.6 <BR>*----------------------------------------------------------------------------<BR>*
PURPOSE:<BR>* This file defines the T8xC51SND1
component:<BR>* - Register
SFRs<BR>* - Bit
SFRs<BR>*****************************************************************************/<BR><BR><BR>/////////////////////////////////////////////////////////////////////////////<BR>// Edited
by
Computer-lov 2005.3.19<BR>// AT89C51SND1C.H
FILE<BR>////////////////////////////////////////////////////////////////////////////<BR><BR><BR>#ifndef
__AT89C51SND1C_H__<BR>#define __AT89C51SND1C_H__<BR><BR>#define
Sfr(name,address) sfr name = address<BR>#define Sfr16(name,address)
sfr16 name = address<BR>#define Sbit(name,reg,bit_address) sbit name
= reg ^ bit_address<BR><BR>/*_____ I N C L U D E S
____________________________________________________*/<BR><BR><BR>/*_____
M A C R O S
________________________________________________________*/<BR><BR><BR>/*
C51 CORE */<BR><BR>Sfr (A ,
0xE0);<BR>Sfr (ACC , 0xE0);<BR>Sfr
(B , 0xF0);<BR>Sfr
(PSW , 0xD0);<BR>Sfr
(SP , 0x81);<BR>Sfr
(DPL , 0x82);<BR>Sfr
(DPH , 0x83);<BR>Sfr16
(DPTR , 0x82);<BR><BR>Sbit
(CY , PSW ,
7);<BR>Sbit (AC ,
PSW , 6);<BR>Sbit
(F0 , PSW ,
5);<BR>Sbit (RS1 , PSW ,
4);<BR>Sbit (RS0 , PSW ,
3);<BR>Sbit (OV ,
PSW , 2);<BR>Sbit
(F1 , PSW ,
1);<BR>Sbit (P ,
PSW , 0);<BR><BR><BR>/* SYSTEM MANAGEMENT
*/<BR><BR>Sfr (PCON , 0x87);<BR>Sfr
(AUXR , 0x8E);<BR>Sfr
(AUXR1 , 0xA2);<BR>Sfr (NVERS ,
0xFB);<BR><BR><BR>/* PLL & CLOCK */<BR><BR>Sfr
(CKCON , 0x8F);<BR>Sfr (PLLCON ,
0xE9);<BR>Sfr (PLLDIV0 , 0xEE);<BR>Sfr (PLLNDIV , 0xEE);<BR>Sfr
(PLLDIV1 , 0xEF);<BR>Sfr (PLLRDIV , 0xEF);<BR><BR><BR>/* INTERRUPT
*/<BR><BR>Sfr (IEN0 , 0xA8);<BR>Sfr
(IPL0 , 0xB8);<BR>Sfr
(IPH0 , 0xB7);<BR>Sfr
(IEN1 , 0xB1);<BR>Sfr
(IPL1 , 0xB2);<BR>Sfr
(IPH1 , 0xB3);<BR><BR>Sbit
(EA , IEN0 , 7);<BR>Sbit
(EAUD , IEN0 , 6);<BR>Sbit
(EMP3 , IEN0 , 5);<BR>Sbit
(ES , IEN0 , 4);<BR>Sbit
(ET1 , IEN0 , 3);<BR>Sbit
(EX1 , IEN0 , 2);<BR>Sbit
(ET0 , IEN0 , 1);<BR>Sbit
(EX0 , IEN0 , 0);<BR><BR>Sbit
(IPLAUD , IPL0 , 6);<BR>Sbit (IPLMP3 , IPL0 ,
5);<BR>Sbit (IPLS , IPL0 , 4);<BR>Sbit
(IPLT1 , IPL0 , 3);<BR>Sbit
(IPLX1 , IPL0 , 2);<BR>Sbit
(IPLT0 , IPL0 , 1);<BR>Sbit
(IPLX0 , IPL0 , 0);<BR><BR><BR>/* PORTS
*/<BR><BR>Sfr (P0 , 0x80);<BR>Sfr
(P1 , 0x90);<BR>Sfr
(P2 , 0xA0);<BR>Sfr
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