test1.c

cache测试软件

  memcpy(tmpbuf_1,tmpbuf_0,BUF_WIDTH);
  
  /*simulate data transfer from cache to ram memory by DMA*/
  //for(j=0;j<BUF_WIDTH;j++) 
  //*((volatile_noncached unsigned char *)(buf_1+i*BUF_WIDTH+j))=tmpbuf_1[j];
  memcpy((volatile_noncached unsigned char *)(buf_1+i*BUF_WIDTH+j),tmpbuf_1,BUF_SIZE);
  //=memcpy((buf_1+i*BUF_WIDTH+j),tmpbuf_1,BUF_SIZE); 
 }
 #else //by memcpy
 
 #endif
 
 dcache_flush();//make cache consistent with ram memory before any operation
 #if 1
 {
  FILE *fptr;
  
  if((fptr = fopen("c:/eti_tools/filter/check.yuv","wb")) == NULL)
  {
    printf("Could not open file %s\n","c:/eti_tools/filter/check.yuv" );
    exit(1);
  }	
  //using volatible noncached or not makes no difference;
  //=fwrite((volatile_noncached unsigned char*)buf_1, sizeof(unsigned char),BUF_SIZE, fptr);
  fwrite(buf_1, sizeof(unsigned char),BUF_SIZE, fptr);  
  fclose(fptr);
  //printf("done!\n");
  exit(1);
 }	   
 #endif 
 //------------------------------------------------------------------------
 
 /*
  analysis:
  Ram memory maight be coherent with cache,but it will be if we do cache flush before 
  any operation.At this time when flushed, it reflects the lastest state of ram memory.
 */
}


int test_10(void)
{//use memory copy to do data transfer,but can't achieve the expected resutl!
 int i,j;

 init();//to simualte the inital states of the two buffers,buf_0 and buf_1; 
 
 /*
 ... //the two buffers might be accessed before the following operation,data transfer.
 */
 
 dcache_flush();//make cache consistent with ram memory before any operation
 
 #if 1
 {
  FILE *fptr;
  
  if((fptr = fopen("c:/eti_tools/filter/check_src.yuv","wb")) == NULL)
  {
    printf("Could not open file %s\n","c:/eti_tools/filter/check_src.yuv" );
    exit(1);
  }	
  //using volatible noncached or not makes no difference;
  fwrite(buf_0, sizeof(unsigned char),BUF_SIZE, fptr);  
  fclose(fptr);
 }	   
 #endif 
 
 
 dcache_flush();//make cache consistent with ram memory before any operation
 
 /*doing data transfer and check*/
 //------------------------------------------------------------------------
 #if 1 //by diret read
  /*simulate data transfer from ram memory to cache by DMA*/
 for(i=0;i<BUF_HEIGHT;i++)
 {
  for(j=0;j<BUF_WIDTH;j++)
   tmpbuf_0[j]=*((volatile_noncached unsigned char *)(buf_0+i*BUF_WIDTH+j));
 
   /*simulate cpu's copying data from cache to cache*/
  for(j=0;j<BUF_WIDTH;j++) 
  tmpbuf_1[j]=tmpbuf_0[j];

  /*simulate data transfer from cache to ram memory by DMA*/
  for(j=0;j<BUF_WIDTH;j++) 
  *((volatile_noncached unsigned char *)(buf_1+i*BUF_WIDTH+j))=tmpbuf_1[j];
 }
 #endif
 
 dcache_flush();//make cache consistent with ram memory before any operation
 #if 1
 {
  FILE *fptr;
  
  if((fptr = fopen("c:/eti_tools/filter/check_dst.yuv","wb")) == NULL)
  {
    printf("Could not open file %s\n","c:/eti_tools/filter/check_dst.yuv" );
    exit(1);
  }	
  //using volatible noncached or not makes no difference;
  fwrite(buf_1, sizeof(unsigned char),BUF_SIZE, fptr);  
  fclose(fptr);
  //printf("done!\n");
  exit(1);
 }	   
 #endif 
 //------------------------------------------------------------------------
 
 /*
  analysis:
  Ram memory maight be coherent with cache,but it will be if we do cache flush before 
  any operation.At this time when flushed, it reflects the lastest state of ram memory.
 */
}



int test_11(void)
{//use memory copy to do data transfer,but can't achieve the expected resutl!
 int i,j,k;

 for(k=0;k<3;k++)
 {
 init();//to simulate inputting new images 
 dcache_flush();
 
 /*
 ... //the two buffers might be accessed before the following operation,data transfer.
 */
 //dcache_flush();//make cache consistent with ram memory before any operation
 
 #if 1
 {
  FILE *fptr;
  
  if((fptr = fopen("c:/eti_tools/filter/check_src0.yuv","wb")) == NULL)
  {
    printf("Could not open file %s\n","c:/eti_tools/filter/check_src0.yuv" );
    exit(1);
  }	
  //using volatible noncached or not makes no difference;
  fwrite(buf_0, sizeof(unsigned char),BUF_SIZE, fptr);  
  fclose(fptr);
 }	   
 #endif 
 
 
 //dcache_flush();//make cache consistent with ram memory before any operation
 
 /*doing data transfer and check*/
 //------------------------------------------------------------------------
 #if 0 //by diret read
  /*simulate data transfer from ram memory to cache by DMA*/
 for(i=0;i<BUF_HEIGHT;i++)
 {
  for(j=0;j<BUF_WIDTH;j++)
  *((volatile_noncached unsigned char *)(buf_1+i*BUF_WIDTH+j))=*((volatile_noncached unsigned char *)(buf_0+i*BUF_WIDTH+j));
 }
 #else
 /*simulate data transfer from ram memory to cache by DMA*/
 for(i=0;i<BUF_HEIGHT;i++)
 {
  for(j=0;j<BUF_WIDTH;j++)
   tmpbuf_0[j]=*((volatile_noncached unsigned char *)(buf_0+i*BUF_WIDTH+j));
 
   /*simulate cpu's copying data from cache to cache*/
  for(j=0;j<BUF_WIDTH;j++) 
  tmpbuf_1[j]=tmpbuf_0[j];

  /*simulate data transfer from cache to ram memory by DMA*/
  for(j=0;j<BUF_WIDTH;j++) 
  *((volatile_noncached unsigned char *)(buf_1+i*BUF_WIDTH+j))=tmpbuf_1[j];
 }
 #endif
 
 //dcache_flush();//make cache consistent with ram memory before any operation
 #if 1
 {
  FILE *fptr;
  
  if((fptr = fopen("c:/eti_tools/filter/check_dst0.yuv","wb")) == NULL)
  {
    printf("Could not open file %s\n","c:/eti_tools/filter/check_dst0.yuv" );
    exit(1);
  }	
  //using volatible noncached or not makes no difference;
  fwrite(buf_1, sizeof(unsigned char),BUF_SIZE, fptr);  
  fclose(fptr);
  //printf("done!\n");
  //exit(1);
 }	   
 #endif 
 //------------------------------------------------------------------------


//dcache_flush();//make cache consistent with ram memory before any operation
 
  #if 1
 {
  FILE *fptr;
  
  if((fptr = fopen("c:/eti_tools/filter/check_src1.yuv","wb")) == NULL)
  {
    printf("Could not open file %s\n","c:/eti_tools/filter/check_src1.yuv" );
    exit(1);
  }	
  //using volatible noncached or not makes no difference;
  fwrite(buf_1, sizeof(unsigned char),BUF_SIZE, fptr);  
  fclose(fptr);
 }	   
 #endif 
 
 /*doing data transfer and check*/
 //------------------------------------------------------------------------
 #if 0 //by diret read
  /*simulate data transfer from ram memory to cache by DMA*/
 for(i=0;i<BUF_HEIGHT;i++)
 {
  for(j=0;j<BUF_WIDTH;j++)
  *((volatile_noncached unsigned char *)(buf_2+i*BUF_WIDTH+j))=*((volatile_noncached unsigned char *)(buf_1+i*BUF_WIDTH+j));
 }
 #else
 /*simulate data transfer from ram memory to cache by DMA*/
 for(i=0;i<BUF_HEIGHT;i++)
 {
  for(j=0;j<BUF_WIDTH;j++)
   tmpbuf_0[j]=*((volatile_noncached unsigned char *)(buf_1+i*BUF_WIDTH+j));
 
   /*simulate cpu's copying data from cache to cache*/
  for(j=0;j<BUF_WIDTH;j++) 
  tmpbuf_1[j]=tmpbuf_0[j];

  /*simulate data transfer from cache to ram memory by DMA*/
  for(j=0;j<BUF_WIDTH;j++) 
  *((volatile_noncached unsigned char *)(buf_2+i*BUF_WIDTH+j))=tmpbuf_1[j];
 }
 #endif
 
 //dcache_flush();//make cache consistent with ram memory before any operation
 #if 1
 {
  FILE *fptr;
  
  if((fptr = fopen("c:/eti_tools/filter/check_dst1.yuv","wb")) == NULL)
  {
    printf("Could not open file %s\n","c:/eti_tools/filter/check_dst1.yuv" );
    exit(1);
  }	
  //using volatible noncached or not makes no difference;
  fwrite(buf_2, sizeof(unsigned char),BUF_SIZE, fptr);  
  fclose(fptr);
  //printf("done!\n");
  //exit(1);
 }	   
 #endif 
 //------------------------------------------------------------------------






} 
 /*
  analysis:
  Ram memory maight be coherent with cache,but it will be if we do cache flush before 
  any operation.At this time when flushed, it reflects the lastest state of ram memory.
 */
}



tst_func_init(void)
{
  test[0]=&test_1;
  test[1]=&test_2;
  test[2]=&test_3; 
  test[3]=&test_4; 
  test[4]=&test_5; 
  test[5]=&test_6; 
  test[6]=&test_7; 
  test[7]=&test_8; 
  test[8]=&test_9; 
  test[9]=&test_10; 
  test[10]=&test_11; 
}



int main(int argc,char *argv[])
{ 
 int index=atoi(argv[1])-1;
 
 if(argc!=2) return 0;
 
 if(index>19) return 0;
 
 tst_func_init();
  
 //printf("%d\n",atoi(argv[1]));
 test[index]();
  
}




























/*
static unsigned char buf_0[352], buf_1[352];
static unsigned char tmpbuf_0[16], tmpbuf_1[16];

static void init()
{
    int i;
    
    for ( i=0; i<352; i++ )
    {
        buf_0[i] = (i%256)+10;//10,11...
        buf_1[i] = 256 - buf_0[i];//246,245...
    }
}

static void cleardcache()
{

    int i, temp[32*1024/4];
    
    for ( i=0; i<32*1024/4; i++ )
        temp[i] = i;//just put a cache size data into cache to make a flush operation
}

int main(int argc, char *argv[])
{
    int i;

    init();
    
    cleardcache();

    for ( i=0; i<16; i++ )
        tmpbuf_0[i] = *(volatile_noncached unsigned char *)(buf_0+i);
    for ( i=0; i<16; i++ )
        tmpbuf_1[i] = tmpbuf_0[i];
    for ( i=0; i<16; i++ )
         *(volatile_noncached unsigned char *)(buf_1+i) = tmpbuf_1[i];
    
    kprintf("%d, %d\n", buf_0[0], buf_1[0]);//=fwrite
//  kprintf("%d, %d\n", *(volatile_noncached unsigned char *)buf_0, *(volatile_noncached unsigned char *)buf_1);
}
*/