dma.c

本source code 為s3c4510的bootloader

       case 'H' : iop_con ^= dreq_hight;     break; // DREQ Active Hight
       case 'F' : iop_con ^= dreq_filter_on; break; // DREQ Filtering on	
       case 'E' : iop_con ^= dreq_en;        break; // DREQ Enable bit
       case 'A' : iop_con ^= dack_hight;     break; // DACK Active Hight
       case 'N' : iop_con ^= dack_en;        break; // DACK Enable/Disable bit
       default  : break; 
      }     
    }
  }

// 
 Print("\nStart GDMA operation                 [Y/N]"); 
 it = get_upper();
 if(it != 'Y')
  {
   return;
  } 

//
 if(mode == GDMACON_MODE_U1)
  {
   UARTCONT1 = uartcont;
  }
 else
 if(mode == GDMACON_MODE_U0)
  {
   UARTCONT0 = uartcont;
  } 

//
 TimerReset(1);
 TimerInit(1,(ONE_SECOND/TICKS_PER_SECOND));
 TimerStart(1);

// Enable GDMA Channel Interrupt, Clear Done Flag and Global enable interrupt //  
 GdmaIntEnable(gdma);			// 
 Enable_Int(nGLOBAL_INT);

// Run GDMA Channel ////////////////////////////////////////////////////////////

 if(gdma) 
  {
   Gdma1DoneFlag = 0;
   GDMA1_RUN_ENABLE = 1;		// run GDMA1  
  }
 else  
  {
   Gdma0DoneFlag = 0;
   GDMA0_RUN_ENABLE = 1;		// run GDMA0
  }

// 
 if(gdmacon & GDMACON_SI)
  {
// Stop Interrupt Enable => wait done interrupt //////////////////////////////// 

   if(gdma) 
    {
     while(Gdma1DoneFlag == 0)  
      {					// wait GDMA1 
      }					// done interrupt 
    }
   else 
    {
     while(Gdma0DoneFlag == 0)  
      {					// wait GDMA0 
      } 				// done interrupt 
    }
  }
 else
  {
// Stop Interrupt disabled => wait busy bit clearing /////////////////////////// 
   if(gdma == 1)
    {
     while((GDMACON1 & GDMACON_BS) != 0)
      {
      } 
    }
   else
   if(gdma == 0)
    {
     while((GDMACON0 & GDMACON_BS) != 0)
      {
      } 
    }
  } 

 Disable_Int(nGLOBAL_INT); 
 GdmaIntDisable(gdma);

////////////////////////////////////////////////////////////////////////////////
// restore UART configuration //////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////

 uartcont &= ~(UARTCON_TXM | UARTCON_RXM);
 uartcont |= UARTCON_TXM_INTREQ | UARTCON_RXM_INTREQ; 

 if(mode == GDMACON_MODE_U1)
  {
   UARTCONT1 = uartcont;
  }
 else
 if(mode == GDMACON_MODE_U0)
  {
   UARTCONT0 = uartcont;
  } 
 else
 if(mode == GDMACON_MODE_EXTDREQ)
  {
   IOPCON = iopcon; 			// restore IOPCON register 
  }

//           
 TimerStop(1);
 Print("\n");

 GetSysTime(1,& tm); 
 TimerReset(1);
 Print
  (
   "GDMA Transfer time %d:%d:%d.%d",
    tm.tm_hour	,
    tm.tm_min	,
    tm.tm_sec	,
    tm.tm_ms
  );
}


////////////////////////////////////////////////////////////////////////////////
// GDMA TEST TOP MEMU SELECT FUNCTION //////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////

void GdmaTest(void)
{
 char item;

 SysSetInterrupt(nGDMA0_INT , GDMA0isr);
 SysSetInterrupt(nGDMA1_INT , GDMA1isr);

 do 
  {
   Print("\n\nGDMA TEST");
   Print("\n[0] GDMA0 configuration view.");
   Print("\n[1] GDMA1 configuration view.");
   Print("\n[T] GDMA Memory to Memory test.");
   Print("\n[U] GDMA UART0/UART1 to Memory transfer test.");
   Print("\n[M] GDMA Memory to UART0/UART1 transfer test.");
   Print("\n[C] GDMA start up dialog for setup DMA mode.");
   Print("\n[Q] QUIT - Return to main menu.");
   Print("\nSelect Item");
   item = get_upper();

   switch(item) 
    {
     case '0': GDMAConfigView(0); break;	// view GDM0 configuration
     case '1': GDMAConfigView(1); break;	// view GDM1 configuration
      
     case 'C': 
// GDMA start up dialog for setup DMA mode /////////////////////////////////////
      GDMAStartUpDialog(); 	   		// GDMA Configure dialog
      break;

     case 'T': 
// GDMA Memory to Memory test //////////////////////////////////////////////////
      GdmaMemMemTest();    			// Memory to memory transfer 
      break;

     case 'U':
// UART0/UART1 to memory test ////////////////////////////////////////////////// 
      UartToMemTest();	   		  	// UART0/UART1 to memory test
      break;

     case 'M':
// GDMA Memory to UART0/UART1 transfer test //////////////////////////////////// 
      MemToUartTest();	   		  	// UART0/UART1 to memory test
      break;

     case 'Q':
// QUIT - Return to main menu //////////////////////////////////////////////////
      return; 

     default : 
      break;
    }

   Print("\nPress any key to continue.\n");
   get_byte();
  } 
 while(item != 'Q');
}


/////////////////////////////////////////////////////////////////////////////////
// copy function, using GDMA0 interrupt /////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////

//
// dmadst = destination address
// dmasrc = source address
// tcnt   = transfer count (transfer size = tcnt * (2**width) )
// Width  = bus width (0 = byte, 1 = half word, 2 = word)
//

void gdma0copy(U32 dmadst, U32 dmasrc,int tcnt, int Width)
{
 U32 DMA_CON_SET;			// control register content

// 
 Disable_Int(nGDMA0_INT); 		// Disable GDMA 0 interupt
 SysSetInterrupt(nGDMA0_INT, GDMA0isr); // Vector setup
 Gdma0DoneFlag = 0;       		// clear GDMA0 transmit done flag

// 
 GDMASRC0 = dmasrc;			// GDMA0 source address 
 GDMADST0 = dmadst;			// GDMA0 destination address 
 GDMACNT0 = tcnt;			// transfer count

 DMA_CON_SET = GDMACON_MODE_MEMMEM;
	
 switch(Width) 
  {
   case 0 : 
// transfer width = byte ///////////////////////////////////////////////////////
    DMA_CON_SET |= GDMACON_TW_BYTE; 
    break;        

   case 1 : 
// transfer width = half word //////////////////////////////////////////////////
    DMA_CON_SET |= GDMACON_TW_HALFWORD; 
    break;

   case 2 : 
   default: 
// transfer width = word ///////////////////////////////////////////////////////
    DMA_CON_SET |= GDMACON_TW_WORD; 
    break;
  }

 Enable_Int(nGDMA0_INT);    		// Enable GDMA 0 interrupt
 Enable_Int(nGLOBAL_INT);		// Enable global interrupt
 GDMACON0 = 
  DMA_CON_SET | 
  GDMACON_RE;  		   		// Run Enable

// 
 while(!Gdma0DoneFlag);			// wait GDMA 0 Done Interrupt 
}

/////////////////////////////////////////////////////////////////////////////////
// Copy function, using GDMA1 ///////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////

void gdma1copy(U32 dmadst, U32 dmasrc,int tcnt, int Width)
{
 long DMA_CON_SET;

// 
 Disable_Int(nGDMA1_INT); 		// Disable GDMA 1 interupt
 SysSetInterrupt(nGDMA1_INT, GDMA1isr); // Set GDMA channel 1 ISR
 Gdma1DoneFlag = 0;       		// clear GDMA1 done flag

// configure GDMA channel 1 registers //////////////////////////////////////////

 GDMASRC1 = dmasrc;			// source address register 
 GDMADST1 = dmadst;			// destination address register 
 GDMACNT1 = tcnt;			// transfer count 

// GDMA 1 Control register /////////////////////////////////////////////////////
 DMA_CON_SET = GDMACON_MODE_MEMMEM;	// mode = memory to memory transfer 
	
 switch(Width) 
  {
   case 0 : 
// Transfer Width byte /////////////////////////////////////////////////////////
    DMA_CON_SET |= GDMACON_TW_BYTE; 	// 
    break;        

   case 1 : 
// Transfer Width = half word //////////////////////////////////////////////////
    DMA_CON_SET |= GDMACON_TW_HALFWORD; 	// 
    break;

   case 2 : 
   default: 
// Transfer Width = word ///////////////////////////////////////////////////////
    DMA_CON_SET |= GDMACON_TW_WORD; 	//
    break;
  }

// 
 Enable_Int(nGDMA1_INT);    		// Enable GDMA 0 interrupt
 Enable_Int(nGLOBAL_INT);		// Enable global Int 
 GDMACON1 = 				// Set GDMA 1 control register
  DMA_CON_SET | 
  GDMACON_RE;				// Run Enable 

 while(!Gdma1DoneFlag);
}

/////////////////////////////////////////////////////////////////////////////////
// DMA auto test ////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////

// src   = source address
// dst   = destination address
// tsize = size in words
//  

int DmaAutoTest(U32 src, U32 dst, int tsize,int lsize)
{
 U32 * ptr;
 int cnt;
 int pat;
 int i;

// For use non-cacheable area
 dst |= 0x4000000;
 src |= 0x4000000;

// Word Test

 ptr = (U32 *) src;			/* source address */
 cnt = tsize;				/* source size in words */ 
 pat = 0;				/* start parameter for PatternGen */

 while(cnt--) 
  {
   *ptr++ = (U32) PatternGen(pat++);
  }


 Print("\n    DMA Channel 0 Test (Long) ....    ");

 for(i = 0; i < lsize ; i++) 
  {
   gdma0copy(src, dst, tsize, 2) ;
   if( !wcomp((U32 *)src, (U32 *)dst, tsize, 0) )
    { 
     Print("Fail.") ;
     return(0);
    }
   PrintRotSlash(i%4) ;
  }
 Print("Ok.") ;

// 
 ptr = (U32 *) dst;
 cnt = tsize;
 while(cnt--) { *ptr++ = 0; } 

// Half Word Test
 Print("\n    DMA Channel 0 Test (Short) ...    ") ;
 for( i = 0; i < lsize ; ++i) 
  {
   gdma0copy(src, dst, tsize * 2, 1) ;
   if( !scomp((U16 *)src, (U16 *)dst, tsize, 0) )
    { 
     Print("Fail.") ;
     return(0);
    }
   PrintRotSlash(i%4) ;
  }
 Print("Ok.");

// 
 ptr = (U32 *) dst;
 cnt = tsize;
 while(cnt--) { *ptr++ = 0; } 

// Byte Test
 Print("\n    DMA Channel 0 Test (Byte) ....    ");
 for (i=0 ; i < lsize ; i++) 
  {
   gdma0copy(src, dst, tsize * 4, 0);
   if( !bcomp((U8 *)src, (U8 *)dst, tsize, 0) )
    { 
     Print("Fail.");
     return(0);
    }
   PrintRotSlash(i%4);
  }
 Print("Ok.");

// 
 ptr = (U32 *) dst;
 cnt = tsize;
 while(cnt--) { *ptr++ = 0; } 

// Word Test
 Print("\n    DMA Channel 1 Test (Long) ....    ");
 for (i = 0; i < lsize; i++) 
  {
   gdma1copy(src, dst, tsize, 2);
   if( !wcomp((U32 *)src, (U32 *)dst, tsize, 0) )
    { 
     Print("Fail.");
     return(0);
    }
   PrintRotSlash(i%4);
  }
 Print("Ok.");

// 
 ptr = (U32 *) dst;
 cnt = tsize;
 while(cnt--) { *ptr++ = 0; } 

// Half Word Test
 Print("\n    DMA Channel 1 Test (Short) ...    ") ;
 for (i = 0; i < lsize ; i++) 
  {
   gdma1copy(src, dst, tsize * 2, 1);
   if ( !scomp((U16 *)src, (U16 *)dst, tsize, 0) )
    { 
     Print("Fail.");
     return 0;
    }
   PrintRotSlash(i%4);
  }
 Print("Ok.");

// 
 ptr = (U32 *) dst;
 cnt = tsize;
 while(cnt--) { *ptr++ = 0; } 

// Byte Test
 Print("\n    DMA Channel 1 Test (Byte) ....    ") ;
 for (i=0 ; i < lsize ; i++) 
  {
   gdma1copy(src, dst, tsize * 4, 0);
   if ( !bcomp((U8 *)src, (U8 *)dst, tsize, 0) )
    { 
     Print("Fail.") ;
     return(0);
    }
   PrintRotSlash(i%4) ;
  }
 Print("Ok") ;
 return(1);
}