dma.c

本source code 為s3c4510的bootloader

    } 
  }


 if(inpsrc == 1)
  {
////////////////////////////////////////////////////////////////////////////////
// Input Source Address and Source address increment or decrement //////////////
////////////////////////////////////////////////////////////////////////////////

   Print("\nTo select default source address 0x%08x\npress CR.", 
     (U32) GDMATestSrc
    );
   Print("\nInput source Address                    0x");
   gdmasrc = get_number(16,0);
   if(gdmasrc == 0) 
    {
     gdmasrc = (U32) GDMATestSrc;  	// default source address
    }

////////////////////////////////////////////////////////////////////////////////    
// Source address direction ////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////    
   while(1)
    {
     Print("\nSource address decrement or increment[D/I/Q]");      
     it = get_upper();
     if(it == 'Q')
      {
       return;
      }
     else
     if(it == 'D')
      {
// source address decrement ////////////////////////////////////////////////////    
       gdmacon |= GDMACON_SRC_DEC;
       break;
      }
     else
     if(it == 'I')
      {
       break;
      }
    } 

// source address fix //////////////////////////////////////////////////////////    

   while(1)
    {
     Print("\nSource address fix                   [F/N/Q]");      
     it = get_upper();
     if(it == 'Q')
      {
       return;
      }
     else
     if(it == 'F')
      {
       gdmacon |= GDMACON_SRC_FIX;
       break;
      }
     else
     if(it == 'N')
      {
       break;
      }
    }
  }

 if(inpdst == 1)
  {
////////////////////////////////////////////////////////////////////////////////    
// Input Destination Address ///////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////    

   Print("\nTo select default dest. address  0x%08x\npress CR.", 
    (U32) GDMATestDst
    );

   Print("\nInput destination Address               0x");
   gdmadst = get_number(16,0);
   if(gdmadst == 0) 
    {
     gdmadst = (U32) GDMATestDst;  	// default destination address
    }

////////////////////////////////////////////////////////////////////////////////    
// Destination address direction ///////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////    
   while(1) 
    {
     Print("\nDest. address decrement or increment [D/I/Q]");
     it = get_upper();
     if(it == 'Q')
      {
       return;
      }
     else
     if(it == 'D')
      {
// destination address decrement ///////////////////////////////////////////////
       gdmacon |= GDMACON_DST_DEC;
       break;
      }
     else
     if(it == 'I')
      {
       break;
      } 
    } 

// destination address fix /////////////////////////////////////////////////////

   while(1)
    {
     Print("\nDestination address fix              [F/N/Q]");
     it = get_upper();
     if(it == 'Q')
      {
       return;
      }
     else
     if(it == 'F')
      {
       gdmacon |= GDMACON_DST_FIX;
       break;
      }
     else
     if(it == 'N')
      {
       break;
      } 
    } 
  }

// Input Memory Size ///////////////////////////////////////////////////////////

 Print("\nInput transfer count                    0x");
 gdmacnt = get_number(16,0);
 if(gdmacnt < 1) 
  {
   gdmacnt = 1;
  }

////////////////////////////////////////////////////////////////////////////////
// [13:12] Transfer width (TW) /////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////

 while(1)
  {
   Print("\n\nTransfer width");
   Print("\n[B] Byte(8bit).");
   Print("\n[H] Halfword(16bit).");
   Print("\n[W] Word(32bit).");
   Print("\n[Q] Quit.");
   Print("Select Item");
   it = get_upper();
   if(it == 'B')
    {
// Transfer Width byte /////////////////////////////////////////////////////////
     gdmacon |= GDMACON_TW_BYTE; 	// byte	
     break;
    }
   else
   if(it == 'H')
    {
// Transfer Width = half word //////////////////////////////////////////////////
     gdmacon |= GDMACON_TW_HALFWORD; 	// half word 
     break;
    }    
   else
   if(it == 'W')
    {
// Transfer Width = word ///////////////////////////////////////////////////////
     gdmacon |= GDMACON_TW_WORD; 	// word 
     break;
    }
   else
   if(it == 'Q')
    {
     return;
    }
  }


////////////////////////////////////////////////////////////////////////////////
// GDMACON_SB // Single/Block mode (SB) ////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////


 while( mode == GDMACON_MODE_EXTDREQ )
  {
   Print("\nBlock mode or Single mode            [B/S/Q]");
   it = get_upper();
   if(it == 'Q')
    {
     return;
    }
   else
   if(it == 'B') 
    {
// GDMACON_SB_BLOCK // 1 = One nXDREQ initiates a whole DMA operation //////////
     gdmacon |= GDMACON_SB_BLOCK;
     break;
    }
   else
   if(it == 'S')
    {
// GDMACON_SB_SINGLE // 0 = One nXDREQ initiates a single DMA operation ////////
     gdmacon |= GDMACON_SB_SINGLE;
     break;
    }  
  } 

////////////////////////////////////////////////////////////////////////////////
// GDMACON_CM  // [14] Continuous mode (CN) ////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////

 while( (mode != GDMACON_MODE_U0) && (mode != GDMACON_MODE_U1) ) 
  {
   Print("\nContinuous mode                      [Y/N]");
   it = get_upper();
   if(it == 'Q')
    {
     return;
    } 
   else
   if(it == 'Y') 
    {
// Continous mode ////////////////////////////////////////////////////////////// 
     if(mode != GDMACON_MODE_MEMMEM)
      {
/* NOTE: You can use Continuous mode together with a software */
/*       request mode. */
       Print("\nCautious. This mode can be used with");
       Print(" software request mode.");
      }  
     else
     if((gdmacon & GDMACON_SB) == GDMACON_SB_SINGLE)
      {
/*  NOTE: You should not use Block mode together with Demand mode, or */
/*        Single mode in conjunction with Continuous mode. */
       Print("\nCautious. Continuous mode should not");
       Print(" be used with single mode.");
      }
     else 
      {
       gdmacon |= GDMACON_CM;		
      } 
     break;
    }
   else
   if(it == 'N')
    {
     break;
    }    
  } 
           

////////////////////////////////////////////////////////////////////////////////
// GDMACON_DM // [15] Demand mode (DM) /////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////

 while( mode == GDMACON_MODE_EXTDREQ ) 
  {
   Print("\nDemand mode                          [Y/N/Q]");
   it = get_upper();
   if(it == 'Q')
    {
     return;
    } 
   else
   if(it == 'Y') 
    {
     if(
        ((gdmacon & GDMACON_SB) == GDMACON_SB_BLOCK) || // block mode 
/* NOTE: You should not use Block mode together with Demand mode, or */
/*       Single mode in conjunction with Continuous mode. */

         (gdmacon & GDMACON_CM)		// Continuos mode 	
/* NOTE: In Demand mode, you must clear the Single/Block */
/*       and Continuous mode control bits to 0. */
      ) 
      {
       Print("\nCautious. Block & Continuous mode must be zero.");  
      } 
     else
      {
       gdmacon |= GDMACON_DM;		// Demand Mode 
      }
//
     break;
    }
   else
   if(it == 'N')
    {
     break;
    }  
  } 
           

////////////////////////////////////////////////////////////////////////////////
// Configure GDMA channel //////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////

 if(gdma == 1) 
  { 
   GDMASRC1 = gdmasrc;			// GDMA 1 source address
   GDMADST1 = gdmadst;			// GDMA 1 destination address
   GDMACNT1 = gdmacnt;			// GDMA 1 transfer count	
   GDMACON1 = gdmacon;			// GDMA 1 control register 
  }
 else 
 if(gdma == 0)
  {
   GDMASRC0 = gdmasrc;			// GDMA 0 source address
   GDMADST0 = gdmadst;			// GDMA 0 destination address
   GDMACNT0 = gdmacnt;			// GDMA 0 transfer count 
   GDMACON0 = gdmacon;			// GDMA 0 control register
  }

// 
 PrintGDMASRC(gdma);			// GDMA channel gdma source address
 PrintGDMADST(gdma);			// GDMA channel gdma destination address
 PrintGDMACNT(gdma);			// GDMA channel gdma transfer count	
 PrintGDMACON(gdma);			// GDMA channel gdma control register 
 Print("\n");

////////////////////////////////////////////////////////////////////////////////
// configure UART0/UART1 in UART modes /////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////

 if(mode == GDMACON_MODE_U0)
  {
////////////////////////////////////////////////////////////////////////////////
// UART0 ///////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////

   uartcont  =  UARTCONT0;		// save UARTCONT0

   if((gdmacon & GDMACON_TD) == GDMACON_TD_MEMTOU)
    {
// memory => UART0 ///////////////////////////////////////////////////////////// 
     uartcont &= ~UARTCON_TXM;		// clear UART0 Tx mode bits
     uartcont |= (gdma ? UARTCON_TXM_GDMA1REQ : UARTCON_TXM_GDMA0REQ);
    }
   else
    {
// UART0 to memoty /////////////////////////////////////////////////////////////
     uartcont &= ~UARTCON_RXM;		// clear UART0 Rx mode bits
     uartcont |= (gdma ? UARTCON_RXM_GDMA1REQ : UARTCON_RXM_GDMA0REQ);
    }
  }
 else
 if(mode == GDMACON_MODE_U1)
  {
////////////////////////////////////////////////////////////////////////////////
// configure UART1 /////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////

   uartcont  =  UARTCONT1;		// save UARTCONT1 

   if((gdmacon & GDMACON_TD) == GDMACON_TD_MEMTOU)
    {
// memory to UART1 /////////////////////////////////////////////////////////////
     uartcont &= ~UARTCON_TXM;		// clear UART1 Tx mode bits 
     uartcont |= (gdma ? UARTCON_TXM_GDMA1REQ : UARTCON_TXM_GDMA0REQ);
    }
   else
    {
// UART1 to memory /////////////////////////////////////////////////////////////
     uartcont &= ~UARTCON_RXM;		// clear UART1 Tx mode bits 
     uartcont |= (gdma ? UARTCON_RXM_GDMA1REQ : UARTCON_RXM_GDMA0REQ);
    }
  }
 else
 if(mode == GDMACON_MODE_EXTDREQ)
  {
   U32 dreq_hight; 			// DREQ Active Hight mask 
   U32 dreq_filter_on;		 	// DREQ Filtering on mask
   U32 dreq_en;		 		// DREQ Enable bit mask
   U32 dack_hight; 			// DACK Active Hight mask
   U32 dack_en; 			// DACK Enable/Disable bit mask
   U32 iop_con;
  
//  
   dreq_hight     = ((gdma) ? IOPCON_DREQ1_HIGHT     : IOPCON_DREQ0_HIGHT);
   dreq_filter_on = ((gdma) ? IOPCON_DREQ1_FILTER_ON : IOPCON_DREQ0_FILTER_ON);
   dreq_en        = ((gdma) ? IOPCON_DREQ1_EN        : IOPCON_DREQ0_EN);
   dack_hight     = ((gdma) ? IOPCON_DACK1_HIGHT     : IOPCON_DACK0_HIGHT);
   dack_en        = ((gdma) ? IOPCON_DACK1_EN        : IOPCON_DACK0_EN);

// 		
   iopcon = iop_con = IOPCON;		// save IOPCON register 

   while(1)
    {    
     Print("\nDREQ%d & DACK%d configuration. IOPCON register.", gdma, gdma);

     Print("\n[H] DREQ%d Active Hight       %s", gdma, 
      (iop_con & dreq_hight) ?    	
       "1(active hight)" :		
       "0(active low)"
     ); 
     Print("\n[F] DREQ%d Filtering on       %s", gdma, 
      (iop_con & dreq_filter_on) ?	
       "1(on)"		:
       "0(off)"
     );

     Print("\n[E] DREQ%d Enable bit         %s", gdma, 
      (iop_con & dreq_en) ?       	
      "1(enable)"	:
      "0(disable)"
     ); 

/* Control external DMA acknowledge 0/1 output for port 14/15 (DACK0/DACK1) */
     Print("\n[A] DACK%d Active Hight       %s", gdma, 
      (iop_con & dack_hight) ?
      "1(active hight)"	:
      "0(active low)"	
     ); 

     Print("\n[N] DACK%d Enable/Disable bit %s", gdma, 
      (iop_con & dack_en) ?
      "1(enable)"	:
      "0(disable)"
     ); 

     Print("\n[W] Write IOPCON");
     Print("\n[Q] Quit");
     Print("\n       Select Item");
     if(it == 'Q')
      {
       return;
      } 
     
     if(it == 'W')
      {
       IOPCON = iop_con;
       break;
      }

     switch(iop_con)
      {