mac.c

本source code 為s3c4510的bootloader

     PHY_ECNTL_REG1	, 		// Register Address 
     PHYHWADDR		, 		// PHY Device Address
     phy_ecntl_reg1			// writed value
    );

   if(
     phy_ecntl_reg1 != 			// writed value not equal 
     MiiStationRead			// read value
      ( 
       PHY_ECNTL_REG1	, 		// Register Address
       PHYHWADDR			// PHY Device Address 
      )
    )
    {
     err = 1;
     Print("\nPHY_ECNTL_REG1 Write Error");
    }
  }


 GetSysTime(1,& tm); 
 TimerReset(1);
 Print
  (
   "\nTime %d:%d:%d.%d",
    tm.tm_hour	,
    tm.tm_min	,
    tm.tm_sec	,
    tm.tm_ms
  );


//16.15:0  User Defined This register is intended for use in checking 
//         the MII serial port and has no effect on chip operation.

 if(err == 1)
  {
   Print("\nFail.\n");
  }
 else
  {
   Print("\nOk.\n");
  }
}


////////////////////////////////////////////////////////////////////////////////
// PHY_INTEN_REG // Interrupt Enable Register (Address 17, Hex 11) /////////////
////////////////////////////////////////////////////////////////////////////////

static void PhyStationIntEn(void)
{
 U8 it;
 while(1)
  {
   U32 phy_inten_reg;		// Interrupt Enable Register
   phy_inten_reg = MiiStationRead
    (
     PHY_INTEN_REG	, 
     PHYHWADDR
    );
   Print("\n17.Interrupt Enable Register : 0x%04x ", phy_inten_reg);

// 
   Print("\n17.3 [L] MII driver levels(R/W)...%s",
    ((phy_inten_reg & PHYINTEN_MIIDRVLVL) != 0) ?
     "1(Reduced MII driver levels)" :
     "0(High-strength MII driver levels)"
   );

   Print("\n17.2 [C] Link Loss Criteria(R/W)..%s", 
    ((phy_inten_reg & PHYINTEN_LNK_CRITERIA) != 0) ?	
     "1(Enhanced link loss criteria)" :
     "0(Standard link criteria)"
   );
 
   Print("\n17.1 [E] Enable interrupts(R/W)...%s", 
    ((phy_inten_reg & PHYINTEN_INTEN) != 0) ?	
     "1(Enable interrupts)" :
     "0(Disable interrupts)"
   );


   Print("\n17.0 [T] TINT(R/W)................%s", 
    ((phy_inten_reg & PHYINTEN_TINT) != 0) ?	
     "1(Forces MDINT Low and sets bit 18.15 = 1)" :
     "0(Normal operation)"
   );

   Print("\n         R/W = Read/Write"); 
   Print("\n     [Q] Quit");				// Quit from station management 
   Print("\nSelect Test Item : "); 
   it = get_upper();			
	
   switch(it)
    {
     case 'L' : 
      {
////////////////////////////////////////////////////////////////////////////////
// MII driver levels ///////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////

       Print("\nReduced MII driver levels [Y/N/Q]");
       it = get_upper();
       if(it == 'Q')
        {				// quit from interrupt 	
         return;			// enable register test  
        }
       else
       if(
          it == 'Y' ||
          it == 'N'
        )
        {
         if(it == 'Y')
          {
// 
           Print("\nReduced MII driver levels.");
           phy_inten_reg |= PHYINTEN_MIIDRVLVL; 
          } 
         else
          {
           Print("\nHigh-strength MII driver levels.");
           phy_inten_reg &=~PHYINTEN_MIIDRVLVL; 
          } 

// 
         MiiStationWrite
          (
           PHY_INTEN_REG	, 
           PHYHWADDR		,
           phy_inten_reg 
         );
        } 
      }
      break;

     case 'C' : 
      {
////////////////////////////////////////////////////////////////////////////////
// Link Loss Criteria //////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
       Print("\nEnhanced link loss criteria. Link loss criteria"); 
       Print("\nis independent of symbol error rate. Loss of"); 
       Print("\nscrambler lock for more than 1 - 2 msec will"); 
       Print("\nbrings the link down. Link up criteria is based"); 
       Print("\non symbol error rate.");
       Print("\n");
       Print("\nStandard link criteria. Both link up and link"); 
       Print("\nloss are based on symbol error rate.");

       Print("\nEnable Enhanced link loss criteria [Y/N/Q]");
       it = get_upper();
       if(it == 'Q')
        {
         return;
        }
       else
       if(
          it == 'Y' ||
          it == 'N'
        )
        {
         if(it == 'Y')
          {
           Print("\nEnhanced link loss criteria.");
           phy_inten_reg |= PHYINTEN_LNK_CRITERIA; 
          } 
         else
          {
           Print("\nStandard link criteria");
           phy_inten_reg &=~PHYINTEN_LNK_CRITERIA; 
          } 

// 
         MiiStationWrite
          (
           PHY_INTEN_REG	, 
           PHYHWADDR		,
           phy_inten_reg 
         );
        } 
      }
      break;


     case 'E' : 
      {
////////////////////////////////////////////////////////////////////////////////
// Enable interrupts ///////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
       Print("\nEnable interrupts [Y/N/Q]");
       it = get_upper();
       if(it == 'Q')
        {
         return;
        }
       else
       if(
          it == 'Y' ||
          it == 'N'
        )
        {
         if(it == 'Y')
          {
           Print("\nEnable Interrupts."); 
           phy_inten_reg |= PHYINTEN_INTEN; 
          } 
         else
          {
           Print("\nDisable interrupts.");
           phy_inten_reg &=~PHYINTEN_INTEN; 
          } 

// 
         MiiStationWrite
          (
           PHY_INTEN_REG	, 
           PHYHWADDR		,
           phy_inten_reg 
         );
        } 
      }
      break;


     case 'T' : 
      {
////////////////////////////////////////////////////////////////////////////////
// TINT ////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
       Print("\nForce MDINT Low and set bit 18.15 = 1 [Y/N/Q]");
       it = get_upper();
       if(it == 'Q')
        {
         return;
        }
       else
       if(
          it == 'Y' ||
          it == 'N'
        )
        {
         if(it == 'Y')
          {
           Print("\nForce MDINT Low and sets bit 18.15 = 1.");
           phy_inten_reg |= PHYINTEN_TINT; 
          } 
         else
          {
           Print("\nNormal operation.");
           phy_inten_reg &=~PHYINTEN_TINT; 
          } 

// 
         MiiStationWrite
          (
           PHY_INTEN_REG	, 
           PHYHWADDR		,
           phy_inten_reg 
         );
        } 
      }
      break;


     case 'Q' : return;
     default  : 
      Print("\nInvalid Test Item Selected") ; 
      break;
    }

   Print("\nPress any key to continue");
   it = get_upper();
   if(it == 'Q')
    {
     break;
    } 
  }
}

////////////////////////////////////////////////////////////////////////////////
// PHY_10BOP_REG // Interrupt Status Register //////////////////////////////////
////////////////////////////////////////////////////////////////////////////////

static void PhyStationIntStat(void)
{
 U32 phy_intstat_reg;		// Interrupt Status Register
 phy_intstat_reg = MiiStationRead
  (
   PHY_INTSTAT_REG	, 
   PHYHWADDR
  );
 Print("\n18.Interrupt Status Register : 0x%04x ",phy_intstat_reg);

 Print("\n18.15 MINT (RO)....%s", 
  (phy_intstat_reg & PHYINTSTAT_MINT) ?  
   "1(MII interrupt pending)" :
   "0(no MII interrupt pending)"
  );

 Print("\n18.14 XTAL OK (RO).%s", 
  (phy_intstat_reg & PHYINTSTAT_XTALOK) ?
   "1(LXT970A powered up and the on-chip clocks are stable)" :
   "0(XTAL circuit is not stable)"
 );

 Print("\n      RO = Read Only");
}
////////////////////////////////////////////////////////////////////////////////
// PHY_ECNTL_REG2  // Extended control register ////////////////////////////////
////////////////////////////////////////////////////////////////////////////////

static void PhyStationIntEcntl(void)
{
 U8 it; 

 while(1) 
  {
   U32 phy_ecntl_reg;			// Extended control register
   phy_ecntl_reg = MiiStationRead	// read control register 
    ( 
     PHY_ECNTL_REG2	, 		// register address
     PHYHWADDR				// PHY address
    );
   Print("\n19. Configuration Register : 0x%04x ", phy_ecntl_reg);

// Txmit Test (100BASE-TX) ///////////////////////////////////////////////////// 
   Print("\n19.14 [T] Txmit Test(100BASE-TX)(R/W)...%s", 
    ((phy_ecntl_reg & PHYECNTL_100BASETX_TXMIT_TEST) != 0) ?
     "1(100BASE-T transmit test enabled)" :
     "0(Normal operation)"
   );

// PHYECNTL_REPEATER_MODE // Repeater Mode /////////////////////////////////////
   Print("\n19.13 [R] Repeater Mode (R/W)...........%s", 
    ((phy_ecntl_reg & PHYECNTL_REPEATER_MODE) != 0) ?
     "1(Enable Repeater Mode)" :
     "0(Enable DTE Mode)"
   );

// MDIO_INT // PHYECNTL_MDIO_INT ///////////////////////////////////////////////
   Print("\n19.12 [M] MDIO_INT (R/W)................%s",  
    ((phy_ecntl_reg & PHYECNTL_MDIO_INT) != 0) ?
     "1(Enable interrupt signaling on MDIO)" :
     "0(Normal operation)"
   );

// TP Loopback (10BASE-T)(PHYECNTL_10BASET_TPLOOPBACK) /////////////////////////
   Print("\n19.11 [P] TP Loopback(10BASE-T)(R/W)....%s", 
    ((phy_ecntl_reg & PHYECNTL_10BASET_TPLOOPBACK) != 0) ?
     "1(Disable 10Base TP Loopback)" :
     "0(Enable 10Base TP Loopback)"
   );

// SQE (10BASE-T)(PHYECNTL_10BASET_SQE) ////////////////////////////////////////
   Print("\n19.10 [E] SQE (10BASE-T) (R/W)..........%s", 
    ((phy_ecntl_reg & PHYECNTL_10BASET_SQE) != 0) ?
     "1(Enable SQE)" :
     "0(Disable SQE)"
   ); 

// Jabber (10BASE-T)(PHYECNTL_10BASET_JABBER) //////////////////////////////////
   Print("\n19.9  [J] Jabber (10BASE-T)(R/W)........%s", 
    ((phy_ecntl_reg & PHYECNTL_10BASET_JABBER) != 0) ?
     "1(Disable jabber)" :
     "0(Normal operation)"
   );

// Link Test (10BASE-T)(PHYECNTL_10BASET_LINK_TEST) ////////////////////////////
   Print("\n19.8  [L] Link Test (10BASE-T)(R/W).....%s", 
    ((phy_ecntl_reg & PHYECNTL_10BASET_LINK_TEST) != 0) ?
     "1(Disable 10BASE-T link integrity test)." :
     "0(Normal operation)"
   ); 

// LEDC Programming bits(PHYECNTL_LEDC_MODE) ///////////////////////////////////
   Print("\n19.7:6[C] LEDC Programming bits(R/W)....");
   switch(phy_ecntl_reg & PHYECNTL_LEDC_MODE)	/* LEDC Mode */
    {
     case PHYECNTL_LEDC_COL	:		/* collision */
      Print("00 LEDC indicates collision");
      break;
  
     case PHYECNTL_LEDC_OFF       :		/* LEDC is off */
      Print("01 LEDC is off");
      break;
 
     case PHYECNTL_LEDC_ACT       :		/* LEDC indicate activity */
      Print("10 LEDC indicates activity");
      break;

     case PHYECNTL_LEDC_ON        :		/* LEDC is on */
      Print("11 LEDC is continuously on");
      break;
    }

// Advance TX Clock(PHYECNTL_ADVTXCLOCK) ///////////////////////////////////////
   Print("\n19.5  [A] Advance TX Clock(R/W).........%s", 
    ((phy_ecntl_r