mac.c

本source code 為s3c4510的bootloader

         it == 'Y' ||			// select speed 100Mbps
         it == 'N'			// select speed 10Mbps		
        )
        {
         if(it == 'Y')
          {
// set speed to 100Mbps ////////////////////////////////////////////////////////
           Print("\nSelected speed 100Mbps."); 
           phy_ctrl |= DR_100MB;	// set 100Mbps bit  
          }
         else
          {
           Print("\nSelected speed 10Mbps."); 
           phy_ctrl &=~DR_100MB;	// clear 100Mbps bit
          }

// 
         MiiStationWrite		// write to control register
          (
           PHY_CNTL_REG	, 		// register address
           PHYHWADDR	, 		// PHY address
           phy_ctrl			// register value
          );
        } 
      }
      break;

     case 'A' : 
      {
////////////////////////////////////////////////////////////////////////////////
// Auto-Negotiation Enable (R/W) ///////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////

       Print("\nAuto-Negotiation Enable [Y/N/Q]");
       it = get_upper();
       if(it == 'Q')
        {				// quit from PHY control register 
         return;			// test 
        } 
       else
       if(
         it == 'Y' ||			// enable auto-negotiation  
         it == 'N'			// disable auto-negotiation 
        )
        {
         if(it == 'Y')
          { 
           Print("\nAuto-Negotiation Enabled.");
           phy_ctrl |= ENABLE_AN;	// set auto-negotiation bit
          }  
         else
          {
           Print("\nAuto-Negotiation Disabled.");
           phy_ctrl &=~ENABLE_AN;	// clear auto-negotiation bit
          }

//
         MiiStationWrite		// write to control register
          (
           PHY_CNTL_REG	, 		// register address
           PHYHWADDR	, 		// PHY address
           phy_ctrl			// register value
          );
        } 
      }
      break;

     case 'P' : 
      {
////////////////////////////////////////////////////////////////////////////////
// Power Down //////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
       Print("\n\nPower Down [Y/N/Q]");
       it = get_upper();
       if(it == 'Q')
        {				// return from PHY control 
         return;			// register test 
        } 
       else
       if(
          it == 'Y' ||			// enable power down 
          it == 'N'			// disable power down
        )
        {
         if(it == 'Y')
          {
           Print("\nPower down enabled.");
           phy_ctrl |= PHY_POWER_DOWN;	// set power down bit 
          }
         else
          {
           Print("\nPower down disabled.");
           phy_ctrl &=~PHY_POWER_DOWN;	// clear power down bit 
          }

// 
         MiiStationWrite		// write to control register
          (
           PHY_CNTL_REG	, 		// register address
           PHYHWADDR	, 		// PHY address
           phy_ctrl			// register value
          );
        }  
      }
      break;

     case 'I' : 
      {
////////////////////////////////////////////////////////////////////////////////
// Isolate (R/W) ///////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////

       Print("\n\nElectrically Isolate PHY from MII [Y/N/Q]"); 
       it = get_upper();
       if(it == 'Q')
        { 				// quit from PHY control register 
         return;			// test 
        }
       else
       if(
          it == 'Y' ||  		// isolate PHY
          it == 'N'			// dont isolate
        )
        {
         if(it == 'Y')
          {
           Print("\nPHY Electrically isolated from MII.");
           phy_ctrl |= PHY_MAC_ISOLATE;	// set isolate bit 
          }
         else
          {
           Print("\nPHY connected to MII.");
           phy_ctrl &=~PHY_MAC_ISOLATE;	// clear isolate bit	
          }
         
         MiiStationWrite		// write to control register
          (
           PHY_CNTL_REG	, 		// register address
           PHYHWADDR	, 		// PHY address
           phy_ctrl			// register value
          );
        }  
      }
      break;

     case 'N' : 
      {
////////////////////////////////////////////////////////////////////////////////
// Restart Auto-Negotiation (R/W/SC) ///////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
       Print("\n\nRestart Auto-Negotiation [Y/N/Q]");
       it = get_upper();
       if(it == 'Q')
        {				// quit from PHY 
         return;			// control register test 
        } 
       else
       if(it == 'Y')
        {
// Restart Auto-negotiation ////////////////////////////////////////////////////
         Print("\nAuto-negotiation restarted.");
         phy_ctrl |= RESTART_AN;	// set restart auto-negotiation bit	
         MiiStationWrite		// write to control register
          (
           PHY_CNTL_REG	, 		// register address
           PHYHWADDR	, 		// PHY address
           phy_ctrl			// register value
          );
        }
      }
      break;

     case 'F' : 
      {
////////////////////////////////////////////////////////////////////////////////
// Duplex mode (R/W) ///////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
       Print("\nFull-Duplex mode [Y/N/Q]"); 
       it = get_upper();
       if(it == 'Q')
        {				// quit from PHY control 
         return;			// register test 
        } 
       else
       if( 
          it == 'Y' ||
          it == 'N'
        )
        {
         if(it == 'Y')
          {
           Print("\nFull-duplex enabled.");
           phy_ctrl |= PHY_FULLDUPLEX;	// set full-duplex bit 
          }
         else
          {
           Print("\nFull-duplex disabled.");
           phy_ctrl &=~PHY_FULLDUPLEX;	// clear full-duplex bit 
          } 
// 
         MiiStationWrite		// write to control register
          (
           PHY_CNTL_REG	, 		// register address
           PHYHWADDR	, 		// PHY address
           phy_ctrl			// register value
          );
        }
      }
      break;

     case 'C' : 
      {
////////////////////////////////////////////////////////////////////////////////
// Colision Test ///////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////

       Print("\n\nColision Test [Y/N/Q]"); 
       it = get_upper(); 
       if(it == 'Q')
        {				// quit from PHY conrol 
         return;			// register test 
        } 
       else
       if(
          it == 'Y' ||			// 
          it == 'N'			// 
        )
        {
         if(it == 'Y')
          {
           Print("\nColision Test enabled."); 
           Print("\nBit 0.14 must be enabled to use this bit."); 
           Print("\nThis bit is used in conjunction with bit 0.14");
           Print("\nto test the COL output.");
//
           phy_ctrl |= PHY_COL_TEST;	// set collision test bit 
          } 
         else
          {
           Print("\nColision Test disabled."); 
           phy_ctrl &=~PHY_COL_TEST;	// clear collision test bit 
          } 
// 
         MiiStationWrite		// write to control register
          (
           PHY_CNTL_REG	, 		// register address
           PHYHWADDR	, 		// PHY address
           phy_ctrl			// register value
          );
        }       
      }
      break;

     case 'Q' : 
      return;

     default  : 
      Print("\nInvalid Test Item Selected") ; 
      break;
    }

   Print("\nPress any key to continue");
   it = get_upper();
   if(it == 'Q')
    {
     return;
    }  
  }
}


////////////////////////////////////////////////////////////////////////////////
// PHY_STATUS_REG // Status register (Address 1) ///////////////////////////////
////////////////////////////////////////////////////////////////////////////////

static void PhyStationStatus(void)
{
 U32 phy_stat_reg;			// PHY status register 
 phy_stat_reg = MiiStationRead
  (
   PHY_STATUS_REG	, 		// status register address
   PHYHWADDR				// PHY address
  );

// 
 Print("\n\n1. Status Register : 0x%04x ", phy_stat_reg);

// 100Base-T4 support (PHYSTAT_100BASET4) //////////////////////////////////////
 Print("\n1.15 100BASE-T4 (RO).....................%s", 
  ((phy_stat_reg & PHYSTAT_100BASET4) != 0) ?	
   "1(Supported)" :			// 100Base-T4
   "0(Not Supported"
 );

// 100Base-X full-duplex (PHYSTAT_100BASEX_FD) /////////////////////////////////
 Print("\n1.14 100BASE-X full-duplex (RO)..........%s", 
  ((phy_stat_reg & PHYSTAT_100BASEX_FD) != 0) ?
   "1(Supported)" :			// 100Base-X full-duplex
   "0(Not Supported)"
 );

// 100BASE-X half-duplex (PHYSTAT_100BASEX_HD) ///////////////////////////////// 
 Print("\n1.13 100BASE-X half-duplex (RO)..........%s", 
  ((phy_stat_reg & PHYSTAT_100BASEX_HD) != 0) ?
   "1(Supported)" : 			// 100BaseX half-duplex
   "0(Not Supported)"
 ); 

// 10 Mb/s full-duplex (PHYSTAT_10BASE_FD) /////////////////////////////////////
 Print("\n1.12 10 Mb/s full-duplex (RO)............%s",
  ((phy_stat_reg & PHYSTAT_10BASE_FD) != 0) ?
   "1(Supported)" :			// 10BaseT full-duplex 
   "0(Not Supported)"
 );

// 10 Mb/s half-duplex (PHYSTAT_10BASE_HD) ///////////////////////////////////// 
 Print("\n1.11 10 Mb/s half-duplex (RO)............%s", 
  ((phy_stat_reg & PHYSTAT_10BASE_HD) != 0) ?
   "1(Supported)" :			// 10BaseT half-duplex
   "0(Not Supported)"
 );
  
// 100BASE-T2 full-duplex (PHYSTAT_100BASET2_FD) ///////////////////////////////
 Print("\n1.10 100BASE-T2 full-duplex (RO).........%s", 
  ((phy_stat_reg & PHYSTAT_100BASET2_FD) != 0) ?	
   "1(Supported)" :			// 100BaseT2 full-duplex
   "0(Not Supported)"
 );

// 100BASE-T2 half-duplex (PHYSTAT_100BASET2_HD) ///////////////////////////////
 Print("\n1.9  100BASE-T2 half-duplex (RO).........%s", 
  ((phy_stat_reg & PHYSTAT_100BASET2_HD) != 0)	?
   "1(Supported)" :			// 100BaseT2 half-duplex
   "0(Not Supported)"
 );

// Master-Slave Configuration Fault (PHYSTAT_MASTERSL_FAULT) ///////////////////
 Print("\n1.7  Master-Slave Configuration Fault....%s", 
  ((phy_stat_reg & PHYSTAT_MASTERSL_FAULT) != 0) ?	 
   "1(Supported)" :			// Master-Slave Fault
   "0(Not Supported)"
 );

// MF Preamble Suppression (PHYSTAT_MFPREAMB_SUPPR) ////////////////////////////
 Print("\n1.6  MF Preamble Suppression (RO)........%s", 
  ((phy_stat_reg & PHYSTAT_MFPREAMB_SUPPR) != 0) ?
   "1(Supported)" :
   "0(Not Supported)"
 );

// Auto-Negotiation Complete (PHYSTAT_AN_COMPLETE) /////////////////////////////
 Print("\n1.5  Auto-Negotiation Complete (RO)......%s", 
  ((phy_stat_reg & PHYSTAT_AN_COMPLETE) != 0) ?
   "1(Auto-negotiation process complete)" :
   "0(Auto-negotiation process not complete)"
 ); 

// Remote Fault (PHYSTAT_REMOTE_FAULT) /////////////////////////////////////////
 Print("\n1.4  Remote Fault (RO/LH)................%s", 
  ((phy_stat_reg & PHYSTAT_REMOTE_FAULT) != 0) ?
   "1(Remote fault condition detected)" :
   "0(No remote fault condition detected)"
 );

// Ato-Neg ability (PHYSTAT_AUTO_NEG_AB) ///////////////////////////////////////
 Print("\n1.3  Auto-Neg. Ability (RO)..............%s", 
  ((phy_stat_reg & PHYSTAT_AUTO_NEG_AB) != 0) ?
   "1(Supported)" :			// Ato-Neg ability
   "0(Not Supported)"
 );
 
// Link Status (PHYSTAT_LINK_UP) ///////////////////////////////////////////////
 Print("\n1.2  Link Status (RO/LL).................%s", 
  ((phy_stat_reg & PHYSTAT_LINK_UP) != 0) ?	
   "1(Link is up)" :			// Link Up Flag
   "0(Link is down)"
 );

// Jabber Detect (10BASE-T Only) (PHYSTAT_JUBBER_DET) //////////////////////////
 Print("\n1.1  Jabber Detect(10BASE-TOnly)(RO/LH)..%s", 
  ((phy_stat_reg & PHYSTAT_JUBBER_DET) != 0) ?
   "1(Jabber condition detected" : 	// Jubber detect
   "0(No jabber condition detected)"
 );

// Extended capability (PHYSTAT_EXT_CAP) ///////////////////////////////////////
 Print("\n1.0  Extended Register Capability (RO)...%s", 
  (phy_stat_reg & PHYSTAT_EXT_CAP) ?	/* Extended capability */	 
   "1(Supported)" :
   "0(No Supported)"
 );

// 
 Print("\n     RO = Read Only");
 Print("\n     LL = Latching Low");
 Print("\n     LH = Latching High");
}


////////////////////////////////////////////////////////////////////////////////
// View PHY Identification register 1, 2 (Address 2, 3) ////////////////////////