📄 mac.c
字号:
/*************************************************************************//* *//* FILE NAME VERSION *//* *//* mac.c KS32C5000, KS32C50100 : version 1.0 *//* *//* COMPONENT *//* *//* *//* DESCRIPTION *//* *//* *//* AUTHOR *//* *//* *//* DATA STRUCTURES *//* *//* *//* FUNCTIONS *//* *//* Main function of MAC Test Program *//* *//* DEPENDENCIES *//* *//* *//* HISTORY *//* *//* NAME DATE REMARKS *//* *//* hbahn 09-15-1998 Created initial version 1.0 *//* *//*************************************************************************//* *//* Modified by *//* Dmitriy Cherkashin *//* dch@ucrouter.ru *//* 2002 *//* *///#include <string.h>#include "ks32c50.h"#include "evm50100.h"#include "mac.h"#define MAC_PRINT_ERR_FRAME// Global Variable for MAC/BDMA and CAM Configurationextern volatile U32 gMacCon; /* MAC control register value */extern volatile U32 gMacTxCon; /* MAC transmit control register value */extern volatile U32 gMacRxCon; /* MAC receive control register value */extern volatile U32 gBdmaTxCon; /* BDMA transmit control register value */extern volatile U32 gBdmaRxCon; /* BDMA receive control register value */extern volatile U32 gCamCon; /* CAM control register value */extern volatile U32 gStaCon; /* MDC clock (15:13 STACON)*/ extern volatile U32 CntlPktTxDone; /*-*/// Control Packet Tx Done Flagextern volatile U32 gCam0_Addr0; /* CAM 0 */extern volatile U32 gCam0_Addr1; /* CAM 1 */extern volatile U32 gCTxFDPtr; extern volatile U32 gWTxFDPtr; extern volatile U32 gCRxFDPtr; extern volatile U8 MyMacSrcAddr[6]; /* MAC Address */// Global variable structure for store status //////////////////////////////////extern pMACTxStatus gsMacTxStatus; /* MAC Transmit Status */ extern pMACRxStatus gsMacRxStatus; /* MAC Receive Status */extern pBDMATxStatus gsBdmaTxStatus; /* BDMA Transmit Status */extern pBDMARxStatus gsBdmaRxStatus; /* BDMA Receive Status */extern TIME tm0 ;/////////////////////////////////////////////////////////////////////////////////// Read Error Status and Time ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////void ReadErrReport(void) {// MAC Transmit Status ///////////////////////////////////////////////////////// Print("\nError Report"); /*0*/ Print("\nMAC Tx Count...........%8d",gsMacTxStatus.MacTxGood); /*1*/ // Transmit collission count ////////////////////////////////////////////////// Print("\nTransmit collission ...%8d",gsMacTxStatus.ExCollErr); /*2*/// Transmit deferred /////////////////////////////////////////////////////////// Print( " Transmit deferred......%8d", gsMacTxStatus.TxDefferedErr);/*2*/// Print("\nPaused.................%8d", gsMacTxStatus.sPaused); /*3*/ Print( " Underrun...............%8d", gsMacTxStatus.UnderErr); /*3*/// Deferral //////////////////////////////////////////////////////////////////// Print("\nDeferral...............%8d", gsMacTxStatus.DeferErr); /*4*/// No carrier ////////////////////////////////////////////////////////////////// Print( " No carrier.............%8d", gsMacTxStatus.NCarrErr); /*4*/// Signal quality error //////////////////////////////////////////////////////// Print("\nSignal quality error...%8d", gsMacTxStatus.sSQE); /*5*/// Late collision ////////////////////////////////////////////////////////////// Print( " Late collision.........%8d", gsMacTxStatus.LateCollErr);/*5*/// Transmit parity error /////////////////////////////////////////////////////// Print("\nTransmit parity error..%8d", gsMacTxStatus.TxParErr); /*6*/// Transmission halted ///////////////////////////////////////////////////////// Print( " Transmission halted....%8d", gsMacTxStatus.sTxHalted); /*6*/// MAC Receive Status ////////////////////////////////////////////////////////// // Control frame received ////////////////////////////////////////////////////// Print("\nControl frame received.%8d", gsMacRxStatus.sCtlRecd); /*7*/// Receive 10-Mb/s status ////////////////////////////////////////////////////// Print( " Receive 10-Mb/s status.%8d", gsMacRxStatus.sRx10Stat); /*7*/// Alignment error (Allign) //////////////////////////////////////////////////// Print("\nAlignment error........%8d", gsMacRxStatus.AllgnErr); /*8*/// CRC error /////////////////////////////////////////////////////////////////// Print( " CRC error..............%8d", gsMacRxStatus.sCRCErr); /*8*/// Overflow error ////////////////////////////////////////////////////////////// Print("\nOverflow error.........%8d", gsMacRxStatus.OverflowErr);/*9*/// Long error ////////////////////////////////////////////////////////////////// Print( " Long error.............%8d", gsMacRxStatus.sLongErr); /*9*/// Receive parity error //////////////////////////////////////////////////////// Print("\nReceive parity error...%8d", gsMacRxStatus.RxParErr); /*10*/// Reception halted //////////////////////////////////////////////////////////// Print( " Reception halted ......%8d", gsMacRxStatus.sRxHalted); /*10*/// OvMaxSize;////////////////////////////////////////////////////////////////////////////////// BDMA Tx Status //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// BDMA Tx null list (BTxNL) /////////////////////////////////////////////////// Print("\nBDMA Tx null list......%8d",gsBdmaTxStatus.BTxNLErr); /*11*/// BDMA Tx not owner (BTxNO) /////////////////////////////////////////////////// Print( " BDMA Tx not owner......%8d",gsBdmaTxStatus.BTxNOErr); /*11*/// BDMA Tx buffer empty (BTxEmpty) ///////////////////////////////////////////// Print("\nBDMA Tx buffer empty...%8d",gsBdmaTxStatus.BTxEmptyErr);/*12*/// Print("\nBDMA Received good.....%8d",gsBdmaRxStatus.BdmaRxGood);/*13*/// BDMA Rx null list (BRxNL) /////////////////////////////////////////////////// Print( " BDMA Rx null list......%8d",gsBdmaRxStatus.BRxNLErr); /*13*/ // BDMA Rx not owner (BRxNO) /////////////////////////////////////////////////// Print("\nBDMA Rx not owner......%8d",gsBdmaRxStatus.BRxNOErr); /*14*/// BDMA Rx maximum size over (BRxMSO) ////////////////////////////////////////// Print( " BDMA Rx max size over..%8d",gsBdmaRxStatus.BRxMSOErr); /*14*/// Print("\nMissed Error Count.....%8d",EMISSCNT); /*15*/}////////////////////////////////////////////////////////////////////////////////// Clear Error Report Area /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////void ClearErrReport(void) {// Clear Error Report Variable ///////////////////////////////////////////////// gsMacTxStatus.MacTxGood = 0; gsMacTxStatus.ExCollErr = 0; // Transmit collission count gsMacTxStatus.TxDefferedErr= 0; // Transmit deferred gsMacTxStatus.sPaused = 0; // Paused gsMacTxStatus.UnderErr = 0; // Underrun gsMacTxStatus.DeferErr = 0; // Deferral gsMacTxStatus.NCarrErr = 0; // No carrier gsMacTxStatus.sSQE = 0; // Signal quality error gsMacTxStatus.LateCollErr = 0; // Late collision gsMacTxStatus.TxParErr = 0; // Transmit parity error gsMacTxStatus.sTxHalted = 0; // Transmission halted gsMacRxStatus.OvMaxSize = 0; gsMacRxStatus.sCtlRecd = 0; // Control frame received gsMacRxStatus.sRx10Stat = 0; // Receive 10-Mb/s status gsMacRxStatus.AllgnErr = 0; // Alignment error gsMacRxStatus.sCRCErr = 0; // CRC error gsMacRxStatus.OverflowErr = 0; // Overflow error gsMacRxStatus.sLongErr = 0; // Long error gsMacRxStatus.RxParErr = 0; // Receive parity error gsMacRxStatus.sRxHalted = 0; // Reception halted gsBdmaTxStatus.BTxNLErr = 0; // BDMA Tx null list (BTxNL) gsBdmaTxStatus.BTxNOErr = 0; // BDMA Tx not owner (BTxNO) gsBdmaTxStatus.BTxEmptyErr = 0; // BDMA Tx buffer empty (BTxEmpty) gsBdmaRxStatus.BdmaRxCnt = 0; gsBdmaRxStatus.BdmaRxGood = 0; gsBdmaRxStatus.BRxNLErr = 0; // BDMA Rx null list (BRxNL) gsBdmaRxStatus.BRxNOErr = 0; // BDMA Rx not owner (BRxNO) gsBdmaRxStatus.BRxMSOErr = 0; // BDMA Rx maximum size over (BRxMSO)}////////////////////////////////////////////////////////////////////////////////// View PHY Control register (address 0) ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////static void PhyStationCtrl(void){////////////////////////////////////////////////////////////////////////////////// Control register (PHY_CNTL_REG) ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// while(1) { U8 it;// read and print PHY Control register ///////////////////////////////////////// U32 phy_ctrl; // PHY control register value phy_ctrl = MiiStationRead // read control register ( PHY_CNTL_REG , // address off ontrol register (0) PHYHWADDR // PHY address ); Print("\n\n0.Control Register : 0x%04x ",phy_ctrl);// Reset (R/W,Self Clearing) 0.15 ////////////////////////////////////////////// Print("\n0.15 [R] Reset (R/W/SC) ...................%s", ((phy_ctrl & RESET_PHY) != 0) ? "1(Reset chip)" : // Reset Chip "0(Enable normal operation)" ); // Loopback mode (R/W) (ENABLE_LOOPBACK) /////////////////////////////////////// Print("\n0.14 [L] Loopback mode (R/W) ..............%s", ((phy_ctrl & ENABLE_LOOPBACK) != 0) ? "1(Enable loopback mode)" : "0(Disable loopback mode)" );// Speed selection (R/W) (DR_100MB) //////////////////////////////////////////// Print("\n0.13 [S] Speed Selection (R/W) ............%s", ((phy_ctrl & DR_100MB) != 0) ? "1(100Mbps)" : // 100 Mbit "0(10Mbps)" // 10 Mbit );// Auto-Negotiatiation Enable (R/W) (ENABLE_AN) //////////////////////////////// Print("\n0.12 [A] Auto-Negotiation Enable (R/W) ....%s", ((phy_ctrl & ENABLE_AN) != 0) ? "1(Enable auto-negotiate process)" : "0(Disable auto-negotiate process)" );// Power down (PHY_POWER_DOWN) ///////////////////////////////////////////////// Print("\n0.11 [P] Power Down (R/W) .................%s", ((phy_ctrl & PHY_POWER_DOWN) != 0) ? "1(Enable power down)" : "0(Enable normal operation)" ); // Isolate (PHY_MAC_ISOLATE) /////////////////////////////////////////////////// Print("\n0.10 [I] Isolate (R/W) ....................%s", ((phy_ctrl & PHY_MAC_ISOLATE) != 0) ? "1(Electrically isolate from MII)" : "0(Normal operation)" );// Restart Auto-negotiation (R/W, Self Cleared) (RESTART_AN) /////////////////// Print("\n0.9 [N] Restart Auto-Negotiation (R/W/SC) %s", ((phy_ctrl & RESTART_AN) != 0) ? "1(Restart AN)" : "0(Normal operation)" );// 0.8 Duplex mode (PHY_FULLDUPLEX) //////////////////////////////////////////// Print("\n0.8 [F] Duplex mode (R/W) ................%s", ((phy_ctrl & PHY_FULLDUPLEX) != 0) ? "1(Enable full-duplex)" : "0(Disable full-duplex)" ); // 0.7 Colision Test (PHY_COL_TEST) //////////////////////////////////////////// Print("\n0.7 [C] Colision Test (R/W) ..............%s", ((phy_ctrl & PHY_COL_TEST) != 0) ? "1(Enable COL signal test)" : "0(Disable COL signal test)" );// 0.6:4 Transceiver Test Mode Not Supported. (RO) ///////////////////////////// Print("\n0.6:0.4 Transceiver Test Mode (RO) .......%d", ((phy_ctrl & PHY_TX_TEST_MODE) >> 4) ); Print("(Not Supported)"); // 0.3 Master-Slave Enable. Not Supported. (RO) //////////////////////////////// Print("\n0.3 Master-Slave Enable (RO) .........%s", ((phy_ctrl & PHY_MASTER_SL_EN) != 0) ? "1(Enable)" : "0(Disable)" );// 0.2 Master-SlaveValue. Not Supported. (RO) //////////////////////////////// Print("\n0.2 Master-SlaveValue (RO)............%s", ((phy_ctrl & PHY_MASTER_SL_VAL) != 0) ? "1" : "0" ); Print("(Not Supported)");// Print("\n R/W = Read/Write."); Print("\n SC = Self Clearing."); // quit from PHY Control register test ///////////////////////////////////////// Print("\n [Q] Quit PHY Control Register Test."); Print("\nSelect Test Item : "); // it = get_upper(); // get upper character from console switch(it) { case 'R' : {////////////////////////////////////////////////////////////////////////////////// Reset (R/W) ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// Print("\n\nReset PHY [Y/N/Q]"); // reset PHY prompt message it = get_upper(); // get upper case character from console if(it == 'Q') { // quit from PHY control return; // register test } else if(it == 'Y') {////////////////////////////////////////////////////////////////////////////////// reset PHY /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// Print("\nReseting PHY..."); phy_ctrl |= RESET_PHY; // set bit 0.15 (Reset bit) MiiStationWrite // write to control register ( PHY_CNTL_REG , // register address PHYHWADDR , // PHY address phy_ctrl // register value ); } } break; case 'L' : {////////////////////////////////////////////////////////////////////////////////// Enable/Diasble Loopback mode //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// Print("\n\nEnable loopback mode [Y/N/Q]"); it = get_upper(); if(it == 'Q') { // quit from PHY control return; // register test } else if( it == 'Y' || // enable loopback it == 'N' // disable loopback ) { if(it == 'Y') {// enable loopback ///////////////////////////////////////////////////////////// Print("\nLoopback mode enabled."); // phy_ctrl |= ENABLE_LOOPBACK; // set enable loopback mode bit } else {// disable loopback //////////////////////////////////////////////////////////// Print("\nLoopback mode disabled."); phy_ctrl &=~ENABLE_LOOPBACK; // clear enable loopback mode bit }// MiiStationWrite // write to control register ( PHY_CNTL_REG , // register address PHYHWADDR , // PHY address phy_ctrl // register value ); } } break; case 'S' : {////////////////////////////////////////////////////////////////////////////////// Speed Selection ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// Print("\n\nSpeed Selection. Enable 100Mbps [Y/N/Q]"); it = get_upper(); if(it == 'Q') { // quit from PHY control return; // register test } else if(
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -