isr.c

本source code 為s3c4510的bootloader

/*************************************************************************/
/*                                                                       */
/* FILE NAME                                      VERSION                */
/*                                                                       */
/*      isr.c                      KS32C5000, KS32C50100   : version 1.0 */
/*                                                                       */
/* COMPONENT                                                             */
/*                                                                       */
/*                                                                       */
/* DESCRIPTION                                                           */
/*                                                                       */
/*                                                                       */
/* AUTHOR                                                                */
/*                                                                       */
/*                                                                       */
/* DATA STRUCTURES                                                       */
/*                                                                       */
/*                                                                       */
/* FUNCTIONS                                                             */
/*                                                                       */
/*      Interrupt handler                                                */
/*                                                                       */
/* DEPENDENCIES                                                          */
/*                                                                       */
/*                                                                       */
/* HISTORY                                                               */
/*                                                                       */
/*         NAME            DATE                    REMARKS               */
/*                                                                       */
/*      hbahn           09-15-1998      Created initial version 1.0      */
/*      in4maker        12-18-1998      Some functions added & updated   */
/*************************************************************************/

/* 			*/
/* Modified by 		*/
/* Dmitriy Cherkashin 	*/
/* [e-mail]	*/
/* 2002, 2003		*/
/*			*/

#include "ks32c50.h"
#include "evm50100.h"


#define ISR_CHECK
#define ISR_DEBUG

volatile U32  IrqOffSet;		// content of INTOFFSET
volatile U32  FiqOffSet;		// content of INTOFFSET

#ifdef ISR_DEBUG  
volatile U32 ISR_UndefCount   = 0;	// count of ISR_UndefHandler calling
volatile U32 ISR_PrefetchCount= 0; 	// count of ISR_PrefetchHandler calling
volatile U32 ISR_AbortCount   = 0; 	// count of ISR_AbortHandler calling
volatile U32 ISR_SwiCount     = 0; 	// count of ISR_SwiHandler calling
volatile U32 ISR_IrqCount     = 0; 	// count of ISR_IrqHandler calling
volatile U32 ISR_FiqCount     = 0; 	// count of ISR_FiqHandler calling
#endif 								// ISR_DEBUG  

/***************************************************************/
/* Dummy Function Prototype for Interrupt Service Vector Table */
/***************************************************************/
static void DummyIsr(void) {}

void (*InterruptHandlers[MAXHNDLRS])(void);

#ifdef ISR_DEBUG
U32    InterruptCount[MAXHNDLRS];
#endif 								// ISR_DEBUG

void ClrIntStatus(void)
{
 INTMASK = 0x3fffff;  // All interrupt disabled include global bit
 INTPEND = 0x1fffff;  // All clear pending
 INTMODE = 0x00000000 /* 0x1fffff*/;  // All IRQ mode
}


/****************************************************************/
/*    Exception Handler Function    				*/
/****************************************************************/

void ISR_UndefHandler(REG32 *adr)
{
#ifdef ISR_DEBUG  
 ISR_UndefCount++;			// count of ISR_UndefHandler calling
#endif 								// ISR_DEBUG
 Print("\nUndefined Address : %08x ",adr);
 Print("\nUndefined Data : %08x ",*adr);
}

// 

void ISR_PrefetchHandler(REG32 *adr)
{
#ifdef ISR_DEBUG  
 ISR_PrefetchCount++;	 		// count of ISR_PrefetchHandler calling
#endif 								// ISR_DEBUG
 Print("\nPrefetch Abort Address : %08x ",adr);
 Print("\nPrefetch Abort Data : %08x ",*adr);
}

void ISR_AbortHandler(REG32 *adr)
{
#ifdef ISR_DEBUG  
 ISR_AbortCount++; 			// count of ISR_AbortHandler calling
#endif 								// ISR_DEBUG
 Print("\nData Abort Address : %08x ",adr);
 Print("\nData Abort Data : %08x ",*adr);
}


void ISR_SwiHandler(void)
{
#ifdef ISR_DEBUG  
 ISR_SwiCount++; 			// count of ISR_SwiHandler calling
#endif 								// ISR_DEBUG
 Print("\n** Trap : SWI Handler\n") ;
}

void ISR_IrqHandler(void)
{
 IrqOffSet = ((U32) INTOFFSET) >> 2;		
#ifdef ISR_CHECK
 if(IrqOffSet >= MAXHNDLRS)			// IrqOffSet unsigned
  {
   return;
  }
 
 if(InterruptHandlers[IrqOffSet] == 0)
  {
   return;
  } 
#endif 

 Clear_PendingBit  (IrqOffSet);			// 		
#ifdef ISR_DEBUG  
 ISR_IrqCount++; 				// count of ISR_IrqHandler calling
 InterruptCount[IrqOffSet]++;
#endif 								// ISR_DEBUG
(*InterruptHandlers[IrqOffSet])(); 		// Call interrupt service routine
}

void ISR_FiqHandler(void)
{
 FiqOffSet = ((U32)INTOFFSET) >> 2;
#ifdef ISR_CHECK
 if(FiqOffSet >= MAXHNDLRS)			// FiqOffSet - unsigned
  {
   return;
  }
  
 if(InterruptHandlers[FiqOffSet] == 0)
  {
   return;
  }   
#endif  
   Clear_PendingBit (FiqOffSet);		// Clear Interrupt Pending bit 
#ifdef ISR_DEBUG  
 ISR_FiqCount++; 				// count of ISR_FiqHandler calling
 InterruptCount[FiqOffSet]++;
#endif 								// ISR_DEBUG
 (*InterruptHandlers[FiqOffSet])(); 		// Call interrupt service routine
}


/***********************************************************************/
/* InitIntHandlerTable: Initialize the interrupt handler table         */
/*     NOTE(S): This should be called during system initialization     */
/***********************************************************************/

void InitIntHandlerTable(void)
{
 int i;

#ifdef ISR_DEBUG
// clear Int count
 ISR_UndefCount   = 0;			// count of ISR_UndefHandler calling
 ISR_PrefetchCount= 0; 			// count of ISR_PrefetchHandler calling
 ISR_AbortCount   = 0; 			// count of ISR_AbortHandler calling
 ISR_SwiCount     = 0; 			// count of ISR_SwiHandler calling
 ISR_IrqCount     = 0; 			// count of ISR_IrqHandler calling
 ISR_FiqCount     = 0; 			// count of ISR_FiqHandler calling
#endif 								// ISR_DEBUG 

 
 for (i = 0; i < MAXHNDLRS; i++)
  {
   InterruptHandlers[i] = DummyIsr;
#ifdef ISR_DEBUG  
   InterruptCount[IrqOffSet] = 0;
#endif 								// ISR_DEBUG  
  }
}

/*********************************************************/
/* SysSetInterrupt: Setup Interrupt Handler Vector Table */
/*********************************************************/

void SysSetInterrupt(int vector, void (*handler)(void))
{
 if(vector >= MAXHNDLRS)			
  {
   return;
  }
// Print("\nvector = %d, handler = %x\n", vector, handler);
 InterruptHandlers[vector] = handler;
}

void * SysGetInterrupt(int vector)
{
 if(vector >= MAXHNDLRS)			
  {
   return(0);
  }

// 
 return((void*)InterruptHandlers[vector]);
}

/*********************************************************/
/* InitInterrupt: Initialize Interrupt		 */
/*********************************************************/

void InitInterrupt(void) 
{
 ClrIntStatus();         			/* Clear All interrupt */ 
 InitIntHandlerTable() ;			/* set Dummy ISR */
}

/*  =================================================
 *  Monitoring the interrupt related system register
 *  =================================================
 */

struct 
{
 int    bit;			// bit number
 char * name;			// bit name
}
INTBITS[MAXHNDLRS] = 
{
// [0] external interrupt 0 ////////////////////////////////////////////////////
 { 
   nEXT0_INT, 					//
  "[0] External interrupt 0"			//
 },

// [1] external interrupt 1 ////////////////////////////////////////////////////
 { 
   nEXT1_INT, 					//
  "[1] External interrupt 1"			//
 },

// [2] external interrupt 2 ////////////////////////////////////////////////////
 { 
   nEXT2_INT, 					//
  "[2] External interrupt 2"			//
 },

// [3] external interrupt 3 ////////////////////////////////////////////////////
 { 
   nEXT3_INT, 					//
  "[3] External interrupt 3"			//
 },

// [4] UART 0 transmit interrupt ///////////////////////////////////////////////
 { 
   nUART0_TX_INT, 				//
  "[4] UART0 tx interrupt"			//
 },

// [5] UART 0 receive & error interrupt ////////////////////////////////////////
 { 
   nUART0_RX_ERR_INT, 				//
  "[5] UART0 rx & error int"			//
 },

// [6] UART 1 transmit interrupt ///////////////////////////////////////////////
 { 
   nUART1_TX_INT, 				//
  "[6] UART1 tx interrupt"			//
 },

// [7] UART 1 receive & error interrupt ////////////////////////////////////////
 { 
   nUART1_RX_ERR_INT, 				//
  "[7] UART1 rx & error int"			//
 },

// [8] GDMA channel 0 interrupt ////////////////////////////////////////////////
 { 
   nGDMA0_INT, 					//
  "[8] GDMA0 interrupt"				//
 },

// [9] GDMA channel 1 interrupt ////////////////////////////////////////////////
 { 
   nGDMA1_INT, 					//
  "[9] GDMA1 interrupt"				//
 },

// [10] Timer 0 interrupt //////////////////////////////////////////////////////
 { 
   nTIMER0_INT, 				//
  "[10] Timer 0 interrupt"			//
 },

// [11] Timer 1 interrupt //////////////////////////////////////////////////////
 { 
   nTIMER1_INT, 				//
  "[11] Timer 1 interrupt"			//
 },

// [12] HDLC channel A Tx interrupt ////////////////////////////////////////////
 { 
   nHDLCTxA_INT, 				//
  "[12] HDLCA Tx interrupt"			//
 },

// [13] HDLC channel A Rx interrupt ////////////////////////////////////////////
 { 
   nHDLCRxA_INT, 				//
  "[13] HDLCA Rx interrupt"			//
 },

// [14] HDLC channel B Tx interrupt ////////////////////////////////////////////
 { 
   nHDLCTxB_INT, 				//
  "[14] HDLCB Tx interrupt"			//
 },

// [15] HDLC channel B Rx interrupt ////////////////////////////////////////////
 { 
   nHDLCRxB_INT, 				//
  "[15] HDLCB Rx interrupt"			//
 },

// [16] Ethernet controller BDMA Tx interrupt //////////////////////////////////
 { 
   nBDMA_TX_INT, 				//
  "[16] Ethernet BDMA Tx int"			//
 },

// [17] Ethernet controller BDMA Rx interrupt //////////////////////////////////
 { 
   nBDMA_RX_INT, 				//
  "[17] Ethernet BDMA Rx int"			//
 },

// [18] Ethernet controller MAC Tx interrupt ///////////////////////////////////
 { 
   nMAC_TX_INT, 				//
  "[18] Ethernet MAC Tx int"			//
 },

// [19] Ethernet controller MAC Rx interrupt ///////////////////////////////////
 { 
   nMAC_RX_INT, 				//
  "[19] Ethernet MAC Rx int"			//
 },

// [20] I2C bus interrupt //////////////////////////////////////////////////////
 { 
   nIIC_INT, 					//
  "[20] I2C interrupt" 				//		
 }
};

////////////////////////////////////////////////////////////////////////////////
// print int source name, and value (digital or string /////////////////////////
////////////////////////////////////////////////////////////////////////////////


// bn   = bit number (interrup source)
// bnam = alternative bit name 
// val  = digital value 
// sval = string value, if defined digital value not printed 

static int PrintINTBIT(int bn, char * bnam, U32 val, char * sval)
{
 static int intnamlen = 0;		// maximum length 
 int pos;

// 
 if(intnamlen == 0)
  {
// max length not defined 
   int tn;				// temp bit number 
   for(tn = 0; tn < MAXHNDLRS; ++tn)
    {
     char * str;
     str = INTBITS[tn].name;		// 
     for(pos = 0; *str != '\0'; ++pos)
      {
       str++;
      } 
     if(pos > intnamlen)
      {
       intnamlen = pos;
      } 
    }
  }

// 
 Print(" ");
 if(bnam != 0 || (bn >= 0 && bn < MAXHNDLRS))
  {
// correct bit number or defined alt bit name
   char *str;
   if(bnam != 0) { str = bnam; }	// alternative bit name 
   else { str = INTBITS[bn].name; } 	// original bit name
   for(pos = 0; *str != '\0'; ++pos)
    {
     Print("%c", *str++);		// print bit name
    } 
   while(pos++ <= intnamlen) 
    { 					// print name right padding
     Print(".");
    }  	
  } 
 else
  {
   return(0); 
  } 

 if(sval == 0)
  {
   Print("%8d", val);			// print decimal value
  }
 else
  {
   Print("%8s", sval);			// print string value
  }
//
 return(1);
}

////////////////////////////////////////////////////////////////////////////////
// print INTMODE register //////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////

static int PrintINTMODE(void)
{
 int bn;