uart.c

本source code 為s3c4510的bootloader

// 
 Print("\nUARTLCON%d (UART%d line control register) = 0x%08x", 
   num		, 			// UART number 
   num		, 			// UART number 
   uartlcon				// register value
  );

// 1:0 Word length (WL) ////////////////////////////////////////////////////////
 Print("\n1:0 Word length (WL)........");
 switch( (uartlcon & UARTLCON_WL) )	// Word Length mask 
  {
   case UARTLCON_WL5 : Print("00 = 5 bits"); break;	// 5 bits
   case UARTLCON_WL6 : Print("01 = 6 bits"); break;	// 6 bits
   case UARTLCON_WL7 : Print("10 = 7 bits"); break;	// 7 bits
   case UARTLCON_WL8 : Print("11 = 8 bits"); break;	// 8 bits
   default           : break;
  }

// [2] Number of Stop bits /////////////////////////////////////////////////////
 Print("\n2   Number of Stop bits.....%s",
  (uartlcon & UARTLCON_STOP_2)	?
  "1(two Stop bits per frame)"	:	
  "0(one Stop bit per frame)"
  );

// [5:3] Parity mode (PMD) /////////////////////////////////////////////////////
 Print("\n5:3 Parity mode (PMD).......");
 switch( (uartlcon & UARTLCON_PMD) )
  {
   case UARTLCON_PMD_NO   :  Print("000(no parity)"); break;
   case UARTLCON_PMD_ODD  :  Print("100(odd parity)"); break;
   case UARTLCON_PMD_EVEN :  Print("101(even parity)"); break;
   case UARTLCON_PMD_CHK1 :  Print("110(parity is forced,checked as a 1)"); break;
   case UARTLCON_PMD_CHK0 :  Print("111(parity is forced,checked as a 0)"); break;
   default 		  :
    break;
  }

// [6] Serial Clock Selection //////////////////////////////////////////////////
 Print("\n6   Serial Clock Selection..%s",
   (uartlcon & UARTLCON_UCLK)	?	/* for external UART clock */
   "1(External UCLK)"		:
   "0(Internal MCLK)"
  );
 
// [7] Infra-red mode //////////////////////////////////////////////////////////
 Print("\n7   Infra-red mode..........%s",
  (uartlcon & UARTLCON_INFRA_RED) ?
   "1(Infra-red Tx/Rx mode)"	:
   "0(Normal mode operation)"
  );

//
 return(1);
}
#endif

#ifdef _KS32C50100_
/////////////////////////////////////////////////////////////////////////////////
// Print UART0/UART1 Control Register ///////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////
static int PrintUARTCONT(int num)
{
 U32 uartcont;			
 if(num == 0) {			
   uartcont = UARTCONT0;
 } else
 if(num == 1) { 
   uartcont = UARTCONT1;
 } else { 
   return(0);
 }     

// 
 Print("\nUARTCONT%d UART%d Control Register = 0x%08x", 
   num		,
   num		,
   uartcont
 );

// [1:0] Receive mode (RxM) ////////////////////////////////////////////////////
 Print("\n1:0  Receive mode (RxM).................");
 switch(uartcont & UARTCON_RXM) 	/* receive mode mask */	
  {
   case UARTCON_RXM_OFF      : Print("00(receive disabled)"); break;
   case UARTCON_RXM_INTREQ   : Print("01(status int request)"); break;
   case UARTCON_RXM_GDMA0REQ : Print("10(GDMA channel 0 req.)"); break;
   case UARTCON_RXM_GDMA1REQ : Print("11(GDMA channel 1 req.)"); break;
   default                   : break; 
  }

// [2]   Rx status interrupt enable (RxSI) /////////////////////////////////////
 Print("\n2    Rx status interrupt enable (RxSI)..%s",
  (uartcont & UARTCON_RXSTAT_INT) ?	
   "1(enable)"		:	
   "0(disable)"
  );

// [4:3] Transmit mode (TxM) ///////////////////////////////////////////////////
 Print("\n4:3  Transmit mode (TxM)................");
 switch(uartcont & UARTCON_TXM)	
  {
   case UARTCON_TXM_OFF      : Print("00(transmit disabled)"); break;
   case UARTCON_TXM_INTREQ   : Print("01(interrupt request)"); break;
   case UARTCON_TXM_GDMA0REQ : Print("10(GDMA channel 0 req.)"); break;
   case UARTCON_TXM_GDMA1REQ : Print("11(GDMA channel 1 req.)"); break;
   default :
    break;
  }  

// [5]   Data set ready (DSR) //////////////////////////////////////////////////
 Print("\n5    Data set ready (DSR)...............%s",
  (uartcont & UARTCON_DSR)	    ? 	/* Assert DSR output(nUADSR)*/
   "1"	:
   "0"
  );
  
// [6]   Send break (SBK) //////////////////////////////////////////////////////
 Print("\n6    Send break (SBK)...................%s",
  (uartcont & UARTCON_SEND_BREAK) ?
   "1"	:	
   "0"
  );

// [7]   Loop-back mode (LPB) //////////////////////////////////////////////////
 Print("\n7    Loop-back mode (LPB)...............%s",
  (uartcont & UARTCON_LOOPBACK) ?	/* for test only */
   "1"	:
   "0"
  );

//
 return(1);
}
#endif

/////////////////////////////////////////////////////////////////////////////////
// print UART0,1 status register S3C4530 ////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////

// print channel register bit (bits) title //////////////////////////////////////
void PrintMBIT(char * mes)
{
 Print("\n");				// move to new line 
 if(mes != 0)
  {
   int pos = 0;		
   while(*(mes+pos++) != '\0') {;}	// calc string length
   Print("%s", mes);			// print bit (bits) name  
   while(pos++ < 40) {Print(".");} 	// print right padding
  }
}

////////////////////////////////////////////////////////////////////////////////
// print channel register bit value 0 or 1 /////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////

void PrintUBIT(int ch, char * mes, U32 * val, U32 msk)
{
 PrintMBIT(mes); 			// print bit name
 
 if(val != 0)
  {
   int cnt;
   if(ch >= 0) {
// ch >= 0 => ch - register number ///////////////////////////////////////////// 
     Print("%-15d", (*(val+ch)&msk) ? 1 : 0);
   } else {
// ch < 0  => (-ch) - count of regs
     int len;  				// field length 
     int cn;				// channel number 
     cnt = -ch;				// channel count 
     len = 40 / cnt;			// field length 
     if(len > 15) { len = 15; }		// set field length to maximal value
     for(cn = 0; cn < cnt; ++cn) {
       Print("%-*d", len, (*(val+cn)&msk) ? 1 : 0);
     }
   }
  }
}

// print channel register bit value ///////////////////////////////////////////// 
void PrintSBIT(int ch, char * mes, U32 * st, U32 msk, char * v1, char * v0)
{
 int cn, cnt, len;			// channel number, count, field length
 PrintMBIT(mes);			// print register name
 if(st == 0)
  {
   return;
  }

 if(v1 == 0) { v1 = "1"; }		// set v1 to default value
 if(v0 == 0) { v0 = "0"; }  		// set v0 to default value 

 if(ch >= 0) {
    len = 15;
    cnt = ch + 1;
 } else {
    cnt = -ch;
    len = 40 / cnt;
    if(len > 15) { len = 15; }
 }

 for(cn = 0; cn < cnt; ++cn)
  {  
   if(cn == ch || ch < 0)
    {
     if( (*(st+cn) & msk) != 0)		// bit set to 1
      {
 	Print("%-*s", len, v1);		// print v1 for seted bit 
      }	 
     else
      {
	Print("%-*s", len, v0);		// print v0 for cleared bit
      } 
    }  
  }
}

// print channel register bit value ///////////////////////////////////////////// 
void PrintEBIT(int ch, char * mes, U32 * st, U32 msk)
{
 PrintSBIT(ch, mes, st, msk, "1(enable)", "0(disable)");
}

// print channel register bits value //////////////////////////////////////////// 
void PrintABIT(int ch, char * mes, U32 * st, U32 msk, ABIT * abit)
{
 int cn, cnt, len;
 PrintMBIT(mes);				// print bits name 
 if(st == 0 || abit == 0)
  {
   return;
  }

 if(ch >= 0) {
    cnt = ch + 1;
    len = 15;
 } else {
    cnt = -ch;
    len = 40 / cnt;
    if(len > 15) { len = 15; }
 }

 for(cn = 0; cn < cnt; ++cn) 
  {
   int vn, fnd;
   if( (cn == ch || ch < 0) == 0 ) {
     continue;
   }

   fnd = 0;
   for(vn = 0; (abit + vn)->str != NULL; ++vn) 
    {
     if( (*(st + cn) & msk) == (abit + vn)->val ) 
      {
       fnd = 1;
       Print("%-*s", len, (abit + vn)->str); 
       break;
      }
    }
   if(fnd == 0)
    {
     Print("%-*s", len, "(undef)"); 
    }
  }
}

#ifdef _S3C4530_
////////////////////////////////////////////////////////////////////////////////
// print UCON0/UCON1 S3C4530 UART Control register value ///////////////////////
////////////////////////////////////////////////////////////////////////////////
static int PrintUCONT(int ch)
{
 U32 cont[2];				//
 cont[0] = UCON0;			// UART0 control register 
 cont[1] = UCON1;			// UART1 control register

//
 if(ch >= 0 && ch <= 1) 
  {
   Print("\nUCON%d Control Register = 0x%08x", 
     ch, 				// channel number 
     cont[ch]				// channel control reg value
   );
  }   
 else 
  {
   Print("\nUCON 0&1 Control Registers = 0x%08x 0x%08x", cont[0], cont[1]);
  }   

// transmit mode 
 {
  ABIT tx_md[] =  { 			// transmit mode bit definition
   {"00(disable)"  , UCON_TMODE_OFF     },
   {"01(int req)"  , UCON_TMODE_INTREQ  },
   {"10(GDMA0 req)", UCON_TMODE_GDMA0REQ},
   {"11(GDMA1 req)", UCON_TMODE_GDMA1REQ},
    0
  };  

  PrintABIT(ch, "1:0   Transmit mode (TMODE)", cont, UCON_TMODE, tx_md);
 }


// receive mode 
 {
  ABIT rx_md[] = {			// receive mode bit definition 
   {"00(disable)"  , UCON_RMODE_OFF     },
   {"01(int req)",   UCON_RMODE_INTREQ  },
   {"10(GDMA0 req)", UCON_RMODE_GDMA0REQ},
   {"11(GDMA1 req)", UCON_RMODE_GDMA1REQ},
    0 
  };
 PrintABIT(ch, "3:2   Receive mode (RMODE)", cont, UCON_RMODE, rx_md);
 } 

// 
 PrintUBIT(ch, "4     Send Break (SBR)"             , cont, UCON_SBR  );
 PrintSBIT(ch, "5     Serial Clock Selection (UCLK)", cont, UCON_UCLK ,
   "1(UCLK)", "0(MCLK)"
 ); 
 PrintUBIT(ch, "6     Auto Baud Rate Detect (ABRD)" , cont, UCON_ABRD );
 PrintSBIT(ch, "7     Look-back mode (LOOPB)"       , cont, UCON_LOOPB,
  "1(loopback)", "0"
 ); 

// parity mode 
 {
 ABIT p_md[] = {			// parity mode bit definition 
   {"0xx(no)"     , UCON_PMD_NO  },
   {"100(odd)"    , UCON_PMD_ODD },
   {"101(even)"   , UCON_PMD_EVEN},
   {"110(1)"	  , UCON_PMD_CHK1},
   {"111(0)"      , UCON_PMD_CHK0},
    0
  };  
 PrintABIT(ch, "10:8  Parity mode (PMD)", cont, UCON_PMD, p_md);
 }

//
 PrintSBIT(ch, "11    Number of Stop bits (STB)", cont, UCON_STOP_2, "2", "1");

// word length 
 {
  ABIT wd_bt[] = {			// word length bit definition 
   {"00(5 bits)", UCON_WL5}, 
   {"01(6 bits)", UCON_WL6},
   {"10(7 bits)", UCON_WL7},
   {"11(8 bits)", UCON_WL8},
    0
  };
 PrintABIT(ch, "13:12 Word Length (WL)"           , cont, UCON_WL, wd_bt);
 }

//
 PrintSBIT(ch, "14    Infra-red mode"             , cont, UCON_IR, "1", "0");
 Print  ("\n15    Reserved");
 PrintEBIT(ch, "16    Transmit FIFO enable (TFEN)", cont, UCON_TFEN );
 PrintEBIT(ch, "17    Receive FIFO enable (RFEN)" , cont, UCON_RFEN );
 PrintUBIT(ch, "18    Transmit FIFO reset (TFRST)", cont, UCON_TFRST);
 PrintUBIT(ch, "19    Receive FIFO reset (RFRST)" , cont, UCON_RFRST);

//
 {
  ABIT tf_tl[] =  {
   {"00=30/32",UCON_TFTL_30},
   {"01=24/32",UCON_TFTL_24},
   {"10=16/32",UCON_TFTL_16},
   {"11=8/32" ,UCON_TFTL_8 },
    0
  };

 PrintABIT(ch, "21:20 Tx FIFO trigger level (TFTL)..", cont, UCON_TFTL, tf_tl);
 }

// receive fifo trigger level 
 {
 ABIT rf_tl[] =  {
   {"00 = 1/32" , UCON_RFTL_1 },
   {"01 = 8/32" , UCON_RFTL_8 },
   {"10 = 16/32", UCON_RFTL_16},
   {"11 = 24/32", UCON_RFTL_24},
    0
  };  
 PrintABIT(ch, "23:22 Rx FIFO trigger level (RFTL)..", cont, UCON_RFTL, rf_tl); 
 }

 PrintUBIT(ch, "24    Data Terminal Ready to pin (DTR)", cont, UCON_DTR);
 PrintUBIT(ch, "25    Request to Send to pin (RTS)....", cont, UCON_RTS);
 Print  ("\n27:26 Reserved");
 PrintUBIT(ch, "28    Hardware Flow Control En(HFEN)"  , cont, UCON_HFEN);
 PrintUBIT(ch, "29    Software Flow Control En(SFEN)"  , cont, UCON_SFEN);
 Print  ("\n31:30 Reserved");
 return(1);
}
#endif								/* _S3C4530_ */ 


/////////////////////////////////////////////////////////////////////////////////
// Print UART0/UART1 Status Register ////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////

#ifdef _KS32C50100_
static int PrintUARTSTAT(int num)
{
 U32 uartstat;
 if(num == 0)
  {
   uartstat = UARTSTAT0;
  } 
 else
 if(num == 1)
  {
   uartstat = UARTSTAT1;
  }
 else
  {
   return(0);
  } 

 Print("\nUARTSTAT%d UART%d Status Register = 0x%08x",
   num		,
   num 		,
   uartstat
  );

// [0] Overrun error ///////////////////////////////////////////////////////////
 Print("\n0 Overrun error..............%d",
   ((uartstat & UARTSTAT_OVERRUN) != 0)	? 1 : 0		/* overrun error */
  );

// [1] Parity error ////////////////////////////////////////////////////////////
 Print("\n1 Parity error...............%d",
  ((uartstat & UARTSTAT_PARITY) != 0) ? 1 : 0		/* parity error */
  );

// [2] Frame error /////////////////////////////////////////////////////////////
 Print("\n2 Frame error................%d",
   ((uartstat & UARTSTAT_FRAME) != 0) ? 1 : 0		/* frame error */
  );

// [3] Break interrupt /////////////////////////////////////////////////////////
 Print("\n3 Break interrupt............%d",
   ((uartstat & UARTSTAT_BREAK) != 0) ? 1 : 0		/* break interrupt */
  );

// [4] Data terminal ready (DTR) ///////////////////////////////////////////////
 Print("\n4 Data terminal ready (DTR)..%d",
   ((uartstat & UARTSTAT_DTR_LOW) != 0)	? 1 : 0		/* data terminal ready */
  );

// [5] Receive data ready //////////////////////////////////////////////////////
 Print("\n5 Receive data ready.........%d",
   ((uartstat & UARTSTAT_RCV_READY) != 0) ? 1 : 0	/* receive data ready */ 
  );

// [6] Tx Buffer register empty ////////////////////////////////////////////////
 Print("\n6 Tx Buffer register empty...%d",
   ((uartstat & UARTSTAT_TXB_EMPTY) != 0) ? 1 : 0	/* tx buffer empty */
  );