📄 os_cpu_a.asm
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.page
.include "f2407regs.h"
.global I$$SAVE ; externals
.global I$$REST
.global _OSIntEnter
.global _OSIntExit
.global _OSTimeTick ; globally visible internals.
.global _OSTCBCur
.global _OSTCBHighRdy
.global _OSStartHighRdy
.global _OSRunning
.global _OSPrioCur
.global _OSPrioHighRdy
.text
.page
.even
_OSStartHighRdy:
lar AR1,#_OSTCBCur ; point to the pointer to the highest
; priority task.
lar AR1,* ; point to the highest priority task.
lar AR1,* ; get OSTCBCur->OSTCBStkPtr.
lar AR2,#_OSRunning
mar *,AR2
splk #1h,*,AR1
b I$$REST ; go let TI do the hard work.
.page
_OSCtxSw:
.global _OSCtxSw
call I$$SAVE ; save this task's context.
_OSCtxSw_0:
lar AR2,#_OSPrioHighRdy
mar *,AR2
bldd *,#_OSPrioCur
lar AR2,#_OSTCBCur ; point AR2 at the OSTCBCur pointer.
mar *,AR2 ; make AR2 the currently used address register.
lar AR0,*,AR0 ; point AR0 at current TCB, and switch to using AR0.
sar AR1,* ; save the current task's current
; stack ptr in the current TCB.
lar AR0,#_OSTCBHighRdy ; point to OSTCBHighRdy pointer.
lar AR0,* ; point to the highest priority task that is ready.
lar AR1,*,AR2 ; get the new task's stack ptr, switch
; to using AR2 which points to OSTCBCur pointer.
sar AR0,*,AR1 ; move _OSTCBHighRdy to _OSTCBCur,
; and switch to using the new current
; stack pointer.
b I$$REST ; let TI do the hard work of restoring
; this task's context.
.page
.even
_OSIntCtxSw:
.global _OSIntCtxSw
pop ; pop-off the return address
; (from call to this routine)
; never to be used...
sbrk #3 ; clean-up the sw stack's pushed
; frame pointer and return address from
; the call to "OSIntExit."
b _OSCtxSw_0 ; the lazy way...
.page
_OSTickISR:
.global _OSTickISR
ldp #DP_EVA
LACC 2FH
OR #0FFFFH
SACL 2FH
splk #0,T1CNT
clrc INTM ; enable interrupt nesting.
call _OSIntEnter ; inform uC/OS we're in an ISR.
call _OSTimeTick ; increment the uC/OS timer tick.
call _OSIntExit ; inform uC/OS we're leaving the
; the ISR; we may exit through
; that path if there is a context switch.
b I$$REST ; still lazy after all these years.
.end
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