📄 freescale-com.asm
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;**************************************************************
; Programer: Wen HongKui
; Date: 2002/11/1
; Change Date:2002/12/21
; Useage: Com Test Program
;**************************************************************
$Include 'srregs.inc'
org RamStart
ax equ $60
AH EQU $60
AL EQU $61
BX equ $62
BH EQU $62
BL EQU $63
CX equ $64
CH EQU $64
CL EQU $65
DX equ $66
DH EQU $66
DL EQU $67
r0 equ $68 ;
r1 equ $69
r2 equ $6a
r3 equ $6b
r4 equ $6c
r5 equ $6d ;延时用
r6 equ $6e ;延时用
r7 equ $6f ;延时用
m_err equ $8d
m_prgm_sta equ $140
m_prgm_end equ $250
m_command equ $1CE
m_test equ $1CF
m_long equ $7e
m_code equ $7f
m_bufsta equ $80
m_bufend equ $ff
m_add equ $241
End_Variables:
;************************************************************
Main_Init:
jmp Main_Init
;*************************************************************
org $Edef
fcb $0f
org $edf0
M_CodeVer: fcb 'WMainProg1.0',$0
;*************************************************************
; * - End Main Program - *
;*************************************************************
org $EE00
M_Ver: fcb 'WMoniter1.0',$0
**************************************************************
; * - Moniter - *
**************************************************************
Main_moniter:
clra
sta $FFFF
cli ; Allow interrupts to happen
ldhx #$260
txs
sei ; Initialize A,X so that interrupt
jsr m_dly1ms
;**************************************************************
m_Init_sci:
lda #$22 ;(4.9152MHz)20:19200 21:9600 22:4800
sta scbr ;定义波特率19200(4.9152MHZ)
lda #%01000000
sta scc1 ;
lda #%00101100
sta scc2
lda #%00000000
sta scc3
;**************************************************************
Init_test:
bsr m_Link
m_1325:
ldhx #m_code
jsr m_Read_sci
tst m_err
bne m_1325
bsr select
bra m_1325
;***************************************************************
m_Link:
jsr m_dly1ms
jsr m_upload
mov #$10,m_code
ldhx #m_code
mov #$01,cl
bsr m_Transmitte
ldhx #m_code
m_7400: mov #$ff,r6
m_7410: mov #$ff,r5
m_7420: brset 5,scs1,m_7430
dbnz r5,m_7420
sta $ffff
dbnz r6,m_7410
m_7440:
jmp Main_Init
m_7430: jsr m_7435
tst m_err
bne m_7440
lda m_code
cmp #$11
bne m_7440
mov #$00,m_code
ldhx #m_code
mov #$01,cl
bsr m_Transmitte
rts
;***************************************************************
m_Transmitte:
lda cl
add #$02
bsr m_write_sci
tst cl
beq m_3000
m_3020:
add ,x
m_3050: brclr 7,scs1,m_3050
mov x+,scdr
jsr m_dly10us
dec cl
bne m_3020
m_3000: bsr m_write_sci
rts
;*************************************************************
m_write_sci:
brclr 7,scs1,m_write_sci
sta scdr
jsr m_dly10us
rts
;*********************************************************
select:
sta $ffff
lda m_code
cmp #$80
bne m_1339
bra m_ReadVersion ;读版本号
m_1339: cmp #$81
bne m_1330
bra m_ClearFlash ;清除FLASH
m_1330: cmp #$82
bne m_1331
bra m_WriteFlash ;页写FLASH
m_1331: cmp #$83
bne m_1332
bra m_ReadFlash ;读FLASH
m_1332: rts ;未定义
;**************************************************************
m_ReadVersion:
mov #$20,cl
ldhx #m_codever
bsr m_transmitte
rts
;**************************************************************
m_ReadFlash:
ldhx m_bufsta
cphx #$C000
blo m_0400
cphx #$E080
bhs m_0400
m_0430:
mov #$80,cl
bsr m_transmitte
rts
m_0400:
mov #$10,m_code
m_0410:
ldhx #m_code
mov #$01,cl
bsr m_transmitte
rts
;**************************************************************
m_ClearFlash:
ldhx m_bufsta
cphx #$C000
blo m_0400
cphx #$E080
bhs m_0400
lda #$b8 ;ee00:b8 ed80:b6
sta flbpr
jsr m_prgm_sta+2
clra
sta flbpr
clr m_code
bra m_0410
;**************************************************************
m_WriteFlash:
ldhx m_bufsta
cphx #$e000
blo m_0400
cphx #$ECFF
bhi m_0400
lda ,x
cmp #$ff
bne m_0400
sthx dx ;写入地址
ldhx #m_bufsta+3
sthx bx ;数据所在地址
mov m_bufsta+2,cl
lda #$b8
sta flbpr
jsr m_prgm_sta
clra
sta flbpr
ldhx m_bufsta
mov m_bufsta+2,cl
jsr m_transmitte
rts
;****************************************************************
m_Read_sci:
m_0301: sta $ffff
brclr 5,scs1,m_0301
m_7435: lda scdr
cmp #$02
bhs m_0331
mov #$03,m_err ;长度错误
rts
m_0331: sta m_long
sta cl
dec cl
m_0300: mov #$ff,r6
m_0310: mov #$ff,r5
m_0320: brset 5,scs1,m_0330
dbnz r5,m_0320
dbnz r6,m_0310
mov #$01,m_err ;超时
rts
m_0330: dec cl
beq m_0341
mov scdr,al
mov al,x+
add al
bra m_0300
m_0341:
cmp scdr
beq m_0340
mov #$02,m_err ;较验错误
rts
m_0340:
lda m_long
sub #02
sta cl
rts
;**************************************************************
m_0000: bra m_write_page
m_erase_page:
lda #$02
sta flcr ;erase -> 1 mass -> 0
lda flbpr
sta ,x ;写数据
bsr m_dly10us ;10us
lda #$0a ;hven ->1 ;1110
sta flcr
bsr m_dly1ms ;4ms
bra m_end_flsh
;************************************************************
m_write_page:
ldhx dx
lda #$01 ;2
sta flcr ;3 1->pgm
lda flbpr ;3 read flash protect reg
sta ,x ;2
bsr m_dly10us ;25
lda #$09 ;2
sta flcr ;3 1->hven
bsr m_dly10us ;13
m_1010: ldhx bx
mov x+,al
sthx bx
ldhx dx
mov al,x+
sthx dx
bsr m_dly10us
bsr m_dly10us
bsr m_dly10us
dec cl
bne m_1010
;---------------------------------------------------------------------------
m_end_flsh: ;FLASH程序结束
lda #08 ;2
sta flcr ;3 ;0->pgm
bsr m_dly10us ;13;等待5us以上
clra ;1
sta flcr ;3 ;0->hven
rts ;4 26
;-----------A Change--------------------flash program 2---------------------------
;延时子程序
m_dly1ms:
mov #$E4,r7 ;5
bra m_1400 ;4
m_dly10us:
mov #2,r7 ;5
m_1400: mov #2,r6 ;5
m_1410: dbnz r6,m_1410 ;5
dbnz r7,m_1400 ;5
rts ;4
;***************************************************************
m_upload:
ldhx #$0000
m_1999:
lda m_0000,x
sta m_prgm_sta,x
aix #$1
cphx #m_upload-m_0000
blo m_1999
rts
**************************************************************
* DUMMY_ISR - Dummy Interrupt Service Routine. *
* Just does a return from interrupt. *
**************************************************************
dummy_isr:
rti ; return
**************************************************************
* Vectors - Timer Interrupt Service Routine. *
* after a RESET. *
**************************************************************
org VectorStart
dw dummy_isr ; Time Base Vector
dw dummy_isr ; Analog Module Vector
dw dummy_isr ; ADC Conversion Complete
dw dummy_isr ; Keyboard Vector
dw dummy_isr ; SCI Transmit Vector
dw dummy_isr ; SCI Receive Vector
dw dummy_isr ; SCI Error Vector
dw dummy_isr ; MMIIC Vector
dw dummy_isr ; TIM2 Overflow Vector
dw dummy_isr ; TIM2 Channel 1 Vector
dw dummy_isr ; TIM2 Channel 0 Vector
dw dummy_isr ; TIM1 Overflow Vector
dw dummy_isr ; TIM1 Channel 1 Vector
dw dummy_isr ; TIM1 Channel 0 Vector
dw dummy_isr ; PLL Vector
dw dummy_isr ; ~IRQ2 Vector
dw dummy_isr ; ~IRQ1 Vector
dw dummy_isr ; SWI Vector
dw Main_moniter ; Reset Vector
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