cnovbase.c

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/******************************************************************************/
/*  cnovabase.c : Implementation of the AnalogOverlay interface
*  REALmagic Quasar Hardware Library
*  Created by Aurelia Popa-Radu
*  Copyright Sigma Designs Inc
*  Sigma Designs Proprietary and confidential
*  Created on 8/27/99
*  Description:
/******************************************************************************/

/****h* HwLib/IAnalogOverlay_implementation
 * NAME
 *	IAnalogOverlay_implementation
 * DESCRIPTION
 *  CNova_implementation and CNovaLite_implementation describe the implementation
 *  of IAnalogOverlay interface.
 *	Some common access procedures are described next.
 * COPYRIGHT
 *  Copyright Sigma Designs Inc
 *  Sigma Designs Proprietary and confidential
/******************************************************************************/

#include "pch.h"

#if defined NOVA_OBJECT || defined NOVALITE_OBJECT

#include "ci2c.h"
#include "cnovbase.h"

void CNovaBase__SSCK(IAnalogOverlay* pIAnalogOverlay, BOOL clock)
{
	CNovaBase *this = (CNovaBase*) pIAnalogOverlay ;

	if(clock)
		ISetI2CpIO_WrClock(this->pISetI2CpIO, this->m_dwClock1);
	else
		ISetI2CpIO_WrClock(this->pISetI2CpIO, this->m_dwClock0);
	// It seems to work without delay in SSDA but needs delay in SSCK
	OSTimeDelay(1);	// The delay is too long but is not system dependent
					// this "1us" delay is taking between 6.55us - 9.88us on my Pentium 300MHz
}

void CNovaBase__SSDA(IAnalogOverlay* pIAnalogOverlay, BOOL data)
{
	CNovaBase *this = (CNovaBase*) pIAnalogOverlay ;

	if(data)
		ISetI2CpIO_WrData(this->pISetI2CpIO, this->m_dwData1);
	else
		ISetI2CpIO_WrData(this->pISetI2CpIO, this->m_dwData0);
}

/*
 * CNovaBase__ReadByte reads (8 bits = byte) and writes (1 bit = stop)
 * stop can be:	NOVA_CONT/NOVA_STOP
/******************************************************************************/
BYTE CNovaBase__ReadByte(IAnalogOverlay* pIAnalogOverlay, BOOL stop)
{
	CNovaBase *this = (CNovaBase*) pIAnalogOverlay ;
	BYTE byte=0;
	int i;

	ISetI2CpIO_SetDataDir(this->pISetI2CpIO, this->m_dwDataIN );	// SSDA input
	for(i=0;i<8;i++)
	{
		byte = byte<<1;
		byte |= ISetI2CpIO_RdData(this->pISetI2CpIO, this->m_dwData0);
		CNovaBase__SSCK(pIAnalogOverlay, 0);
		CNovaBase__SSCK(pIAnalogOverlay, 1);
	}
	ISetI2CpIO_SetDataDir(this->pISetI2CpIO, this->m_dwDataOUT );	// SSDA output

	CNovaBase__SSCK(pIAnalogOverlay, 0);
	CNovaBase__SSDA(pIAnalogOverlay, stop);
	CNovaBase__SSCK(pIAnalogOverlay, 1);

	QDbgLog((QLOG_TRACE, QDebugLevelTrace, TEXT("NOVA_ReadByte=0x%02x"), byte));
	return byte;
}

/*
 * CNovaBase__WriteByte writes (8 bits = byte) + (1 bit = bit)
 * byte can be: NOVA_ADDRESS=0x01	subaddress=0x0...0xD	data=0xXX
 * bit can be:	RD/WR	NOINC/INC	NOVA_CONT/NOVA_STOP
/******************************************************************************/
void CNovaBase__WriteByte(IAnalogOverlay* pIAnalogOverlay, BYTE byte, BOOL bit)
{
	//	CNovaBase *this = (CNovaBase*) pIAnalogOverlay;
	int i;

	QDbgLog((QLOG_TRACE, QDebugLevelTrace, TEXT("NOVA_Write9Bits = 0x%02x + %x"), byte, bit));
	for(i=0;i<8;i++)
	{
		CNovaBase__SSCK(pIAnalogOverlay, 0);
		CNovaBase__SSDA(pIAnalogOverlay, byte & 0x80);
		CNovaBase__SSCK(pIAnalogOverlay, 1);
		byte = byte<<1;
	}
	CNovaBase__SSCK(pIAnalogOverlay, 0);
	CNovaBase__SSDA(pIAnalogOverlay, bit);
	CNovaBase__SSCK(pIAnalogOverlay, 1);
}

/*
 * CNovaBase__Start writes [1 bit start]+[8 bits=0x01]+[1 bit wr_rd]+[8 bits address]+[1 bit increment]
 * wr_rd = 0 for read, 1 for write command
 * increment = 0 for no increment, 1 for increment
/******************************************************************************/
void CNovaBase__Start(IAnalogOverlay* pIAnalogOverlay, BYTE address, BOOL wr_rd, BOOL increment)
{
	CNovaBase *this = (CNovaBase*) pIAnalogOverlay;

	//start condition
	ISetI2CpIO_SetDataDir(this->pISetI2CpIO, this->m_dwDataOUT );	// SSDA output
	ISetI2CpIO_SetClockDir(this->pISetI2CpIO, this->m_dwClkOUT );	// SSCK output
	CNovaBase__SSCK( pIAnalogOverlay, 1 );
	CNovaBase__SSDA( pIAnalogOverlay, 1 );
	CNovaBase__SSCK( pIAnalogOverlay, 0 );

	CNovaBase__SSDA( pIAnalogOverlay, 1 );
	CNovaBase__SSCK( pIAnalogOverlay, 1 );
	CNovaBase__SSCK( pIAnalogOverlay, 0 );
	CNovaBase__WriteByte( pIAnalogOverlay, NOVA_ADDRESS, wr_rd );
	CNovaBase__WriteByte( pIAnalogOverlay, address, increment);	//subaddress
}

/****f* HwLib/IAnalogOverlay_Read
 * USAGE
 *	BYTE IAnalogOverlay_Read(IAnalogOverlay* pIAnalogOverlay, BYTE address)
 *	BYTE CNovaBase__Read(IAnalogOverlay* pIAnalogOverlay, BYTE address)
 * DESCRIPTION
 *	IAnalogOverlay_Read returns data read from register number "address". The read command
 *	is done through Sigma Serial interface protocol, using two EM8400' PIOs (data, clock),
 *	programmable by user with IID_ISETI2CPIO.
/******************************************************************************/
BYTE CNovaBase__Read(IAnalogOverlay* pIAnalogOverlay, BYTE address)
{
	CNovaBase *this = (CNovaBase*) pIAnalogOverlay;
	BYTE Data;

	CNovaBase__Start( pIAnalogOverlay, address, RD,NOINC );
	Data = CNovaBase__ReadByte( pIAnalogOverlay, NOVA_STOP) ;
	ISetI2CpIO_SetDataDir(this->pISetI2CpIO, this->m_dwDataIN );	// SSDA input
	ISetI2CpIO_SetClockDir(this->pISetI2CpIO, this->m_dwClkIN );	// SSCK input
	QDbgLog((QLOG_TRACE, QDebugLevelTrace, TEXT("Rd 0x%02x = 0x%02x"), address, Data));
	return Data;
}

/****f* HwLib/IAnalogOverlay_Write
 * USAGE
 *	void IAnalogOverlay_Write(IAnalogOverlay* pIAnalogOverlay, BYTE address, BYTE Data)
 *	void CNovaBase__Write(IAnalogOverlay* pIAnalogOverlay, BYTE address, BYTE Data)
 * DESCRIPTION
 *	IAnalogOverlay_Write writes "Data" to register number "address". The write command
 *	is done through Sigma Serial interface protocol, using two EM8400' PIOs (data, clock),
 *	programmable by user with IID_ISETI2CPIO.
/******************************************************************************/
void CNovaBase__Write(IAnalogOverlay* pIAnalogOverlay, BYTE address, BYTE Data)
{
	CNovaBase *this = (CNovaBase*) pIAnalogOverlay;

	CNovaBase__Start(pIAnalogOverlay, address, WR,NOINC);
	CNovaBase__WriteByte(pIAnalogOverlay, Data, NOVA_STOP);
	ISetI2CpIO_SetDataDir(this->pISetI2CpIO, this->m_dwDataIN );	// SSDA input
	ISetI2CpIO_SetClockDir(this->pISetI2CpIO, this->m_dwClkIN );	// SSCK input
	QDbgLog((QLOG_TRACE, QDebugLevelTrace, TEXT("Wr 0x%02x = 0x%02x"), address, Data));
}

/****f* HwLib/CNovaBase_nRead
 * USAGE
 *	NOT PRESENT in IAnalogOverlay interface
 *	void CNovaBase__nRead(IAnalogOverlay* pIAnalogOverlay, BYTE address, BYTE* pData, int Count, int autoinc)
 * DESCRIPTION
 *	IAnalogOverlay_nRead reads "Count" registers starting from "address".
 *	"autoinc" value (INC/NOINC) will decide if the address of the next register to read
 *	is incremented or not.
 *	The read is done through Sigma Serial interface protocol, using two EM8400' PIOs (data, clock),
 *	programmable by user with IID_ISETI2CPIO. The data is returned in "pData" buffer.
/******************************************************************************/
void CNovaBase__nRead(IAnalogOverlay* pIAnalogOverlay, BYTE address, BYTE* pData, int Count, int autoinc)
{
	CNovaBase *this = (CNovaBase*) pIAnalogOverlay;
	int i;
	BYTE *p = pData;

	CNovaBase__Start(pIAnalogOverlay, address,RD,autoinc);
	if(Count > 1)
	{
		for (i=0;i<Count-1;i++)
		{
			*p = CNovaBase__ReadByte( pIAnalogOverlay, NOVA_CONT );
			p++;
		}
	}
	*p = CNovaBase__ReadByte( pIAnalogOverlay, NOVA_STOP );
	ISetI2CpIO_SetDataDir( this->pISetI2CpIO, this->m_dwDataIN );	// SSDA input
	ISetI2CpIO_SetClockDir( this->pISetI2CpIO, this->m_dwClkIN );	// SSCK input
	QDbgLog((QLOG_TRACE, QDebugLevelTrace, TEXT("NOVA_Read at address 0x%02x"), address));
}

/****f* HwLib/CNovaBase_nWrite
 * USAGE
 *	NOT PRESENT in IAnalogOverlay interface
 *	void CNovaBase__nWrite(IAnalogOverlay* pIAnalogOverlay, BYTE address, BYTE* pData, int Count, int autoinc)
 * DESCRIPTION
 *	IAnalogOverlay_nWrite writes "Count" registers starting from "address".
 *	"autoinc" value (INC/NOINC) will decide if the address of the next register to write
 *	is incremented or not.
 *	The write is done through Sigma Serial interface protocol, using two EM8400' PIOs (data, clock),
 *	programmable by user with IID_ISETI2CPIO. The input data is taken from "pData" buffer.
/******************************************************************************/
void CNovaBase__nWrite(IAnalogOverlay* pIAnalogOverlay, BYTE address,BYTE* pData,int Count, int autoinc)
{
	CNovaBase *this = (CNovaBase*) pIAnalogOverlay;
	int i;
	BYTE *p = pData;

	QDbgLog((QLOG_TRACE, QDebugLevelTrace, TEXT("NOVA_Write at address 0x%02x"), address));
	CNovaBase__Start( pIAnalogOverlay, address, WR, autoinc);
	if(Count > 1)
	{
		for (i=0;i<Count-1;i++)
		{
			CNovaBase__WriteByte( pIAnalogOverlay, *p, NOVA_CONT );
			p++;
		}
	}
	CNovaBase__WriteByte( pIAnalogOverlay, *p, NOVA_STOP );
	ISetI2CpIO_SetDataDir( this->pISetI2CpIO, this->m_dwDataIN );	// SSDA input
	ISetI2CpIO_SetClockDir( this->pISetI2CpIO, this->m_dwClkIN );	// SSCK input
}

#endif // NOVA_OBJECT | NOVALITE_OBJECT