📄 mstar.c
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}
// use interrupt to speedup mode changing while input timing is changing
#if UseINT
if (SrcInputType<=Input_Digital)
mStar_WriteByte(INTENA, 0xB0);
else
mStar_WriteByte(INTENA, 0x30); // for YCbCr
#endif
#ifdef LG17LVDS
FixShortLine_LG();
#endif
Clr_FreeRunModeFlag();
return TRUE;
}
//*******************************************************************
// Function Name: mStar_SetupFreeRunMode
//
// Decscription: setup registers for free run mode without any input timing,
//
// caller: mStar_ResetDClkPLL() in mstar.c
// mSar_WriteByte(), mStar_ReadByte(), mStar_WriteWord() in ms_rwreg.c
// callee: mStar_ModeHandler() in detect.c
//*******************************************************************
void mStar_SetupFreeRunMode(void)
{ DWORD factor;
mStar_WriteByte(ISELECT, mStar_ReadByte(ISELECT)|NIS_B);
// disable output Lock mode to enable free run.
factor=FreeRunDClk;
#if (!PanelRSDS && !PanelDualPort)
factor/=2;
#endif
mStar_WriteWord(LPLL_SET_M, factor&0xFFFF);
mStar_WriteByte(LPLL_SET_H, factor>>16); // setup output dot clock
mStar_ResetDClkPLL(); // reset output PLL
// mStar_WriteByte(LPLL_SET_H, 0x24);
mStar_WriteWord(VDTOT_H, PanelVTotal-1); // set output panel vtotal
mStar_WriteWord(HDTOT_H, PanelHTotal-1); // set output panel htotal
Set_FreeRunModeFlag();
// printData("enter free run mode %d", SrcInputType);
}
//*******************************************************************
// Function Name: mStar_SetAnalogInputPort
//
// Decscription: setup registers for Separate Sync/Composite Sync/SOG,
//
// caller: mSar_WriteByte(), mStar_ReadByte() in ms_rwreg.c
//
// callee: mStar_MonitorInputTiming() in detect.c
//*******************************************************************
void mStar_SetAnalogInputPort(void)
{ BYTE regValue=mStar_ReadByte(ISELECT);
if (regValue&COMP_B) // current is SOG
regValue=regValue&0x8F;// swtich to auto-detect
else
regValue=regValue|0x70; // switch to SOG-detect
mStar_WriteByte(ISELECT, regValue);
mStar_WriteByte(SWRST, GPR_B|ADCR_B); // enable software reset function to clear ADC & Graphic port RO register
Delay1ms(2);
mStar_WriteByte(SWRST, 0); // disable software reset
Delay1ms(80); // delay over 1 frame time to wait for status register is ready
}
//*******************************************************************
// Function Name: mStar_SetupInputPort
//
// Decscription: setup input port registers for
// Analog/Digital/YCbCr(Video) input
//
// caller: mSar_WriteByte(), mStar_ReadByte() in ms_rwreg.c
// callee: mStar_MonitorInputTiming() in detect.c
//*******************************************************************
void mStar_SetupInputPort(void)
{ BYTE regByte;
// printData("switch input port %d", SrcInputType);
regByte=mStar_ReadByte(ISELECT)&(NIS_B|IHSU_B);
if (SrcInputType<Input_Digital)
{ regByte|=(SrcInputType==Input_Analog1)?(ISEL_Analog1):(ISEL_Analog2);
// setup ADC bank register
mStar_WriteByte(REGBK, REGBANKADC);
mStar_WriteByte(GCTRL, 0x6); // Coast Polarity as high
mStar_WriteByte(VCOCTRL, 0x15);//D); // set VOC
mStar_WriteByte(SOG_LVL, 0x10); // set SOG level
// enable test mode to program
mStar_WriteByte(TESTEN, TSTEN_B);
//****INPORTANT must enable test mode for programming the following registers
#if ADC2Sets
if (PowerSavingFlag)
{ if (SrcInputType==Input_Analog1)
mStar_WriteByte(TESTA5, 0x9E);//mStar_ReadByte(TESTA5)&(~AMUX_B));
else
mStar_WriteByte(TESTA5, 0xBE);//mStar_ReadByte(TESTA5)|AMUX_B);
}
#endif
#if DChip
mStar_WriteByte(TESTA0, 0x00); //set pll charge pump current for ADC
#else
mStar_WriteByte(TESTA0, 0x20); //set pll charge pump current for ADC
#endif
mStar_WriteByte(TESTEN, 0); // disable test mode
mStar_WriteByte(PLLCTRLV, 0x95);
// setup Scaler bank
mStar_WriteByte(REGBK, REGBANKSCALER);
mStar_WriteByte(IPCTRL2, DEON_B|VSE_B);
mStar_WriteByte(LVL, 0);
mStar_WriteByte(INTMDS, 0x00); // Interlace mode line shift
mStar_WriteByte(COCTRL1, 0x01); // enable ADC coast
mStar_WriteByte(COCTRL2, 0x00); // enable coast window start
mStar_WriteByte(COCTRL3, 0x00); // enable coast window end
mStar_WriteByte(ISCTRL, 0x0);// disable DE glitch removal function & more tolerance for DE
mStar_WriteByte(MISCFC, 0x00);//x20);//
}
else if (SrcInputType==Input_Digital)
{ regByte|=ISEL_DVI|COMP_B;
#if ADC2Sets
if (PowerSavingFlag)
{ mStar_WriteByte(REGBK, REGBANKADC);
mStar_WriteByte(TESTEN, TSTEN_B);
mStar_WriteByte(TESTA0, 0); //+--- set pll charge pump current for ADC
mStar_WriteByte(TESTA5, 0x86);
mStar_WriteByte(TESTEN, 0);
mStar_WriteByte(REGBK, REGBANKSCALER);
}
#endif
#if DChip
{ mStar_WriteByte(REGBK, REGBANKADC);
mStar_WriteByte(TESTEN, TSTEN_B);
mStar_WriteByte(TESTA0, 0x20); //set pll charge pump current for ADC
mStar_WriteByte(TESTEN, 0);
mStar_WriteByte(REGBK, REGBANKSCALER);
}
#endif
// setup Scaler bank
mStar_WriteByte(IPCTRL2, DEON_B|VSE_B|DHSR_B);
mStar_WriteByte(ISCTRL, 0xF8);// enable DE glitch removal function & more tolerance for DE
mStar_WriteByte(MISCFC, 0x20);// enable vsync glitch removal for digital input
mStar_WriteByte(COCTRL1, 0x0); // disable ADC coast
}
else if (SrcInputType==Input_YPbPr) // YPbPr is from Analog port
{
#if 0// 1 for YPbPr
regByte|=CSC_B|0x70;
mStar_WriteByte(REGBK, REGBANKADC);
mStar_WriteByte(GCTRL, 0x6); // Coast Polarity as high
mStar_WriteByte(VCOCTRL, 0x05);//D); // set VOC
mStar_WriteByte(SOG_LVL, RMID_B|BMID_B|OFIR_B|0x08); // set SOG level
mStar_WriteByte(TESTEN, TSTEN_B);
//****INPORTANT must enable test mode for programming the following registers
#if ADC2Sets
if (PowerSavingFlag)
mStar_WriteByte(TESTA5, 0x9E);//mStar_ReadByte(TESTA5)&~AMUX_B);
#endif
mStar_WriteByte(TESTA0, 0); //set pll charge pump current for ADC
mStar_WriteByte(TESTEN, 0);
mStar_WriteByte(PLLCTRLV, 0x95); // PLL contol for Video input
// setup Scaler bank
mStar_WriteByte(REGBK, REGBANKSCALER);
mStar_WriteByte(IPCTRL2, DEON_B|ESLS_B);
#else // for 1080i
regByte|=0x70;
mStar_WriteByte(REGBK, REGBANKADC);
mStar_WriteByte(GCTRL, 0x6); // Coast Polarity as high
mStar_WriteByte(VCOCTRL, 0x15);//D); // set VOC
mStar_WriteByte(SOG_LVL, 0x10);//RMID_B|BMID_B|OFIR_B|0x08); // set SOG level
mStar_WriteByte(TESTEN, TSTEN_B);
//****INPORTANT must enable test mode for programming the following registers
#if ADC2Sets
if (PowerSavingFlag)
mStar_WriteByte(TESTA5, 0x9E);//mStar_ReadByte(TESTA5)&~AMUX_B);
#endif
mStar_WriteByte(TESTA0, 0); //set pll charge pump current for ADC
mStar_WriteByte(TESTEN, 0);
// mStar_WriteByte(PLLCTRLV, 0x95); // PLL contol for Video input
// setup Scaler bank
mStar_WriteByte(REGBK, REGBANKSCALER);
mStar_WriteByte(IPCTRL2, DEON_B|VSE_B);
#endif
mStar_WriteByte(LVL, 4);
mStar_WriteByte(INTMDS, 0x00); // Interlace mode line shift
mStar_WriteByte(COCTRL1, 0x21); // enable ADC coast
mStar_WriteByte(COCTRL2, 0x08); // enable coast window start
mStar_WriteByte(COCTRL3, 0x05); // enable coast window end
mStar_WriteByte(ISCTRL, 0x0);// disable DE glitch removal function & more tolerance for DE
mStar_WriteByte(MISCFC, 0x00);//x20);//
}
mStar_WriteByte(ISELECT, regByte);
Delay1ms(2);
#if 1
mStar_WriteByte(SWRST, GPR_B|ADCR_B); // enable software reset function to clear ADC & Graphic port RO register
Delay1ms(2);
mStar_WriteByte(SWRST, 0); // disable software reset
Delay1ms(20); // delay over 1 frame time to wait for status register is ready
#endif
}
//*******************************************************************
// Function Name: mStar_SetCaptureWindow
//
// Decscription: setup input capture window for display
//
// caller: mSar_WriteWord(), mStar_ReadWord() in ms_rwreg.c
///
// callee: mStar_SetupMode() in mstar.c
//*******************************************************************
Bool mStar_SetCaptureWindow(void)
{ WORD width, height;
if (SrcInputType==Input_Digital)
{
#if 0
BYTE retry;
// read input width & height repeatly to confirm if DVI is stable
for (retry=0; retry<5; retry++)
{ UserPrefHStart=mStar_ReadWord(AOHST_H); // get hsync DE start
UserPrefVStart=mStar_ReadWord(AOVST_H); // get vsync DE start
width=mStar_ReadWord(AOHEND_H)-UserPrefHStart+1; // get DE width
height=mStar_ReadWord(AOVEND_H)-UserPrefVStart+1; // get DE Height
// check if resolution is correct
if (abs(width-StandardModeWidth)<100 && abs(height-StandardModeHeight)<100)
break;
}
if (retry>=5) // if DVI is not stable, then do mode detection again
{ Set_InputTimingChangeFlag();
return FALSE;
}
#else
UserPrefHStart=mStar_ReadWord(AOHST_H); // get hsync DE start
UserPrefVStart=mStar_ReadWord(AOVST_H); // get vsync DE start
width=mStar_ReadWord(AOHEND_H)-UserPrefHStart+1; // get DE width
height=mStar_ReadWord(AOVEND_H)-UserPrefVStart+1; // get DE Height
#endif
#if ChipID>=ChipAD
if (!(mStar_ReadByte(MDCTRL)&BIT7))
#endif
UserPrefHStart-=0x10;
}
else
{ width=StandardModeWidth;
height=StandardModeHeight;
}
mStar_WriteWord(SPRHST_H, UserPrefHStart); // set capture window hstart
mStar_WriteWord(SPRVST_H, UserPrefVStart); // set capture window vstart
mStar_WriteWord(SPRHDC_H, width); // set capture window width according input resolution
mStar_WriteWord(SPRVDC_H, height); // set capture window height according input resolution
#if 0
if (width==PanelWidth && height==PanelHeight) // set native mode flag
SrcFlags|=bNativeMode;
#else
if (width>PanelWidth || height>PanelHeight) // set native mode flag
SrcFlags|=bShrinkMode;
#endif
return TRUE;
}
//*******************************************************************
// Function Name: mStar_SetupADC
//
// Decscription: setup ADC bandwidth/filter, clock, phase for sampling input data
// and R/G/B gains, offsets
// caller: mSar_WriteByte(), mStar_ReadByte() in ms_rwreg.c
///
// callee: mStar_SetupMode() in mstar.c
//*******************************************************************
BYTE code ADCWB[4][3]= // ADC parameter table for setup ADC
{// HS_LVL, BWCOEF, DCOEF
{0x60, 0x06, 0x2}, // <38 MHz //yy 2005.04.23 0x60 0x06// 0x65 0x03 sophie 2005.04.25
{0x40, 0x05, 0x3}, // 38< < 75
{0x20, 0x03, 0x3}, // 75< <155
{0x00, 0x01, 0x3} // >155
};
void mStar_SetupADC(void)
{ WORD tempValue;
mStar_WriteByte(REGBK, REGBANKADC); // switch to ADC bank
if (SrcInputType<Input_Digital || SrcInputType==Input_YPbPr)
{ BYTE regByte=mStar_ReadByte(GCTRL)&~HSP_B;
//mStar_WriteByte(GCTRL, regByte);
// setup ADC bandwidth/filter according input dot clock
tempValue=((DWORD)MST_CLOCK_MHZ*10+SrcHPeriod/2)/SrcHPeriod; //calculate hfreq: round 5
tempValue=((DWORD)tempValue*UserPrefHTotal+5000)/10000; //dclk= hfreq * htotal
// printData("input dclk %d", tempValue);
if (tempValue<38)
tempValue=0;
else if (tempValue<75)//82)
tempValue=1;
else if (tempValue<155)
tempValue=2;
else
tempValue=3;
mStar_WriteByte(HS_LVL, ADCWB[tempValue][0]); // setup ADC bandwidth
mStar_WriteByte(BWCOEF, ADCWB[tempValue][1]); // setup ADC
mStar_WriteByte(DCOEF, ADCWB[tempValue][2]);
//noise sophie 2005.04.25
#if PanelQDI17L
//if (SrcModeIndex==5)
if (StandardModeGroup==Res_640x480)
mStar_WriteByte(HS_LVL, 0xA0);
if (StandardModeGroup==Res_1024x768)
mStar_WriteByte(HS_LVL, 0xB0);
if (StandardModeGroup==Res_1280x1024)
mStar_WriteByte(HS_LVL, 0xB0);
#endif
#if 0
// setup hsync polarity
{ tempValue=mStar_ReadByte(GCTRL);//&~HSP_B;
if (SrcFlags&bHSyncNegative)
tempValue|=HSP_B;
mStar_WriteByte(GCTRL, tempValue);
}
#endif
// setup clock
tempValue=UserPrefHTotal-3;
mStar_WriteByte(PLLDIVM, tempValue>>4);
mStar_WriteByte(PLLDIVL, (tempValue&0xF)<<4);
// setup phase
mStar_WriteByte(CLKCTRL1, UserPrefPhase+8);
mStar_WriteByte(CLKCTRL2, UserPrefPhase);
// setup hsync polarity
{ tempValue=regByte;
if (!(SrcFlags&bHSyncNegative))
regByte|=HSP_B;
mStar_WriteByte(GCTRL, regByte);
}
// setup ADC gain
mStar_WriteByte(REDGAIN, 0xFF-UserPrefAdcRedGain);
mStar_WriteByte(GRNGAIN, 0xFF-UserPrefAdcGreenGain);
mStar_WriteByte(BLUGAIN, 0xFF-UserPrefAdcBlueGain);
// setup ADC offset
mStar_WriteByte(REDOFST, 0xFF-UserPrefAdcRedOffset);
mStar_WriteByte(GRNOFST, 0xFF-UserPrefAdcGreenOffset);
mStar_WriteByte(BLUOFST, 0xFF-UserPrefAdcBlueOffset);
// setup hsync polarity again
{ if (SrcFlags&bHSyncNegative)
tempValue|=HSP_B;
mStar_WriteByte(GCTRL, tempValue);
}
}
else if (SrcInputType==Input_Digital)
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