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📄 sio.c

📁 这是三星公司的arm7 s3c44b0x芯片的所有外设中断程序
💻 C
字号:
//44BTEST : sio.c
#include <string.h>
#include "..\inc\44b.h"
#include "..\inc\44blib.h"
#include "..\inc\sio.h"
#include "..\inc\def.h"
volatile char *sioTxStr,*sioRxStr;
volatile int endSioTx;
void __irq Sio_Int(void)
{
	rI_ISPC=BIT_SIO;
	//rI_ISPC; //is needed only when cache=on & wrbuf=on & BSFRD=0
	*sioRxStr++=rSIODAT;
	if(*sioTxStr!='\0')
	{
		rSIODAT=*sioTxStr++;
		rSIOCON|=(1<<3);
	}
	else
		endSioTx=1;
}
void Test_Sio(void)
{
	unsigned int save_F,save_PF;
	char *txStr,*rxStr;
	Uart_Printf("[SIO Tx/Rx Test]\n");
	Uart_Printf("Connect SIOTXD into SIORXD.\n");
	pISR_SIO=(unsigned)Sio_Int;
	rINTMSK=~(BIT_GLOBAL|BIT_SIO);
	endSioTx=0;
	sioTxStr="ABCDEFGHIJKLMNOPQRSTUVWXYZ";
	sioRxStr=(char *)malloc(strlen((char *)sioTxStr)+1);
	txStr=(char *)sioTxStr;
	rxStr=(char *)sioRxStr;
	save_F=rPCONF;
	save_PF=rPUPF;
	//interrupt,autorun,rising edge,tx&rx,MSB first,internal clk
	rPCONF=(rPCONF&0x3ff)+(3<<19)+(3<<16)+(3<<13)+(3<<10);
	rPUPF |=0x1e0;
	rSBRDR=0x1; //if MCLK=40Mhz,SIOCK=10Mhz
	rIVTCNT=0x1; //if MCLK=40Mhz,Interval=200ns(5Mhz)
	rSIOCON=1|(0<<2)|(1<<4)|(1<<5)|(0<<6);
	rSIODAT='A';sioTxStr++;
	rSIOCON|=(1<<3);
	while(endSioTx==0);
	*sioRxStr='\0';
	Uart_Printf("Tx Strings:%s\n",txStr);
	Uart_Printf("Rx Strings:%s :",rxStr);
	if(strcmp(rxStr,txStr)==0)
		Uart_Printf("O.K.\n");
	else 
		Uart_Printf("ERROR!!!\n");
	rINTMSK=BIT_GLOBAL;
	rPCONF=save_F;
	rPUPF=save_PF;
	free(rxStr);
}
static U8 tx_buffer[100];
volatile int tx_bdma0Done;
void __irq Bdma0Tx_Int(void)
{
	rDCNTZ=0x3;
	tx_bdma0Done=1;
	rI_ISPC=BIT_BDMA0; //clear pending
}
void Test_SIOTX_BDMA0(void)
{
	int i;
	U32 save_F;
	save_F=rPCONF;
	rPCONF=(rPCONF&0x3ff)+(3<<19)+(3<<16)+(3<<13)+(3<<10);
	Uart_Printf("[SIO BDMA Tx test]\n");
	Uart_Printf("This test should be configured two boards.\n");
	Uart_Printf("Start Rx first, then press any key.\n");
	rNCACHBE0= ((int)tx_buffer>>12) + ( (((int)tx_buffer>>12) +1)<<16 );
	for(i=0; i<100; i++)
		tx_buffer[i]=i;
	// tx_buffer[0]=0xff;
	tx_bdma0Done=0;
	pISR_BDMA0 = (unsigned)Bdma0Tx_Int;
	rINTMSK=~(BIT_GLOBAL|BIT_BDMA0);
	rSBRDR = (U32)(((MCLK/2)/500000)-1); //rSBRDR[11:0] = ((MCLK/2)/BRG) - 1
	rIVTCNT = 0xff;
	rDCNTZ = 0x3;
	rDCNTZ = 0x0; // init to zero
	rSIOCON = 0x0|(0<<2)|(0<<4)|(1<<5)|(0<<6)|(0<<7); //dma block
	rBDISRC0 = (0<<30)|(1<<28)|(U32)tx_buffer; // SRCset = byte | fixed | src_addr
	rBDIDES0 = (1<<30)|(3<<28)|(U32)0x1d14004; // DESset = M2IO | fixed | des_addr(little)
	rBDICNT0 = (3<<30)|(1<<26)|(3<<22)|(0<<21)|(0<<20)|(U32)100; // SIO | int.cnt | ALoff |	Disable | cnt.value
	rBDICNT0 |= (1<<20); // enable
	rBDCON0 = (0x0<<2);
	Uart_Getch();
	rSIOCON = 2 | (0<<2) | (0<<4) | (1<<5) | (0<<6) | (0<<7); //dma unblock
	while(tx_bdma0Done==0);
	// rSIOCON = 0x0|(0<<2)|(0<<4)|(1<<5)|(0<<6)|(0<<7); //dma block
	// rDCNTZ = 0x3;
	Uart_Printf("\nBDMA transfer end\n");
	for(i=0; i<100; i++)
	Uart_Printf("0x%02x,",tx_buffer[i]);
	// Uart_Printf("0x%x,",tx_buffer[0]);
	Cache_Flush();
	rNCACHBE0=0x0;
	// rPCONF=save_F;
}
static U8 rx_buffer[100];
volatile int rx_bdma1Done;
void __irq Bdma1Rx_Int(void)
{
	rDCNTZ=0x3;
	rx_bdma1Done=1;
	rI_ISPC=BIT_BDMA1; //clear pending
}

void Test_SIORX_BDMA1(void)
{
	int i,j,error=0;
	U32 save_F;
	Uart_Printf("[SIO DMA Rx Test]\n");
	save_F=rPCONF;
	rNCACHBE0= ((int)rx_buffer>>12) + ( (((int)rx_buffer>>12) +1)<<16 );
	for(i=0;i<100;i++)
	rx_buffer[i]=0x0;
	// rx_buffer[0]=0x0;
	rPCONF=(rPCONF&0x3ff)+(3<<19)+(3<<16)+(3<<13)+(3<<10);//SIO port
	rx_bdma1Done=0;
	pISR_BDMA1 = (unsigned)Bdma1Rx_Int;
	rINTMSK=~(BIT_GLOBAL|BIT_BDMA1);
	rIVTCNT = 0xff;
	rDCNTZ = 0x3;
	rDCNTZ = 0x0; // init to zero
	rSIOCON = 0x3 | (0<<2) | (0<<4) | (0<<5) | (0<<6) | (1<<7);
	//BDMA1,autorun,rising edge,tx&rx,MSB first,internal clk
	rBDISRC1 = (0<<30)|(3<<28)|(U32)0x1d14004; // SRCset = byte | fixed | SIODAT
	rBDIDES1 = (2<<30)|(1<<28)|(U32)rx_buffer; // DESset = IO2M | incre.| des_addr
	rBDICNT1 = (3<<30)|(1<<26)|(3<<22)|(0<<21)|(0<<20)|(U32)100; // SIO | int.cnt | ALoff |	Disable | cnt.value
	rBDICNT1 |= (1<<20);//enable
	rBDCON1 = (0x0<<2);
	rSIOCON = 0x3 | (0<<2) | (1<<3) | (0<<4) | (0<<5) | (0<<6) | (1<<7);//must set the start bit
	while(rx_bdma1Done==0);
	// rSIOCON = 0x0 | (0<<2) | (0<<4) | (0<<5) | (0<<6) | (1<<7);
	// rDCNTZ = 0x3;
	for(i=0;i<100;i++)
		Uart_Printf("0x%02x,",rx_buffer[i]);
	// Uart_Printf("0x%x,",rx_buffer[0]);
	Cache_Flush();
	rNCACHBE0=0x0;
	Uart_Printf("\nBDMA receive end");
	// rPCONF=save_F;
}

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