idma.h

这是motorola公司的powerpc芯片上的嵌入式linux上的驱动程序和测试程序

#ifndef _IDMA_H_
#define _IDMA_H_

#define	IDMA_OK					0
#define	IDMA_BUSY				1

#define PORTB_BIT22				0x00000200                              /* DACK2*/
#define PORTB_BIT23				0x00000100				/* DACK1*/

#define PORTC_BIT14				0x0002					/* DREQ1*/
#define PORTC_BIT15				0x0001					/* DREQ0*/
#define PORTC_BIT10                             0x0020


#define PORTD_BIT9				0x0040					/* IDMA0/IDMA1*/
#define PORTD_BIT10				0x0020					/* read/write*/

#define RCCR_DR1M_LEVEL			0x0080					/* DREQ1 level sensitive*/
#define RCCR_DR0M_LEVEL			0x0040					/* DREQ0 level sensitive*/


#define IDMA_BD_SIZE			0x10
#define NO_IDMA_BD_RX			0x01
#define NO_IDMA_BD_TX			0x08
#define SOURCE_FUNC_CODE                0x10
#define DEST_FUNC_CODE			0x10

#define	BD_READY_BIT			0x8000
#define BD_WRAP_BIT				0x2000
#define BD_INTR_BIT				0x1000
#define	BD_LAST_BIT				0x0800

#define IDMA1_PARAM             0 
#define IDMA2_PARAM		1

#define DPRAM_IDMA1_PARAM	0x3CC0
#define DPRAM_IDMA2_PARAM       0x3DC0      /* IDMA channel 2 parameter */

#define DCMR_SIZE_WORD		0x0000
#define DCMR_SD_MASK            0xFFF9
#define DCMR_SD_RM_WM		0x0000
#define DCMR_SD_RP_WM		0x0002
#define DCMR_SD_RM_WP		0x0004
#define DCMR_SD_RESERVED	0x0006
#define DCMR_SC_SINGLE		0x0001
#define DCMR_SC_DUAL		0x0000

#define IDSRx_AD				0x04
#define IDSRx_DONE				0x02
#define IDSRx_OB				0x01


#define CPM_INT_LEVEL			0x04
#define CICR_SCCd_USB			0x00000000
#define CICR_SCCd_SCC2			0x00400000	
#define CICR_SCCd_SCC3			0x00800000
#define CICR_SCCc_USB			0x00000000
#define CICR_SCCc_SCC2			0x00100000	
#define CICR_SCCc_SCC3			0x00200000
#define CICR_SCCb_USB			0x00000000
#define CICR_SCCb_SCC2			0x00040000	
#define CICR_SCCb_SCC3			0x00080000
#define CICR_SCCa_USB			0x00000000
#define CICR_SCCa_SCC2			0x00010000	
#define CICR_SCCa_SCC3			0x00020000
#define CICR_IRL_4				0x00008000
#define CICR_IDMA1_INT			0x00001500
#define CICR_CPM_INT_ENABLE		0x00000080
#define CICR_SPS_GROUPED        0x00000000
#define CICR_SPS_SPREAD			0x00000001
#define CICR_DEFAULT_SETTING	0x00C99580

#define CPM_PC15				0x80000000
#define CPM_USB					0x40000000
#define CPM_SCC2				0x20000000
#define CPM_SCC3				0x10000000
#define CPM_PC14				0x04000000
#define CPM_TIMER1				0x02000000
#define CPM_PC13				0x01000000
#define CPM_PC12				0x00800000
#define CPM_SDMA				0x00400000
#define CPM_IDMA1				0x00200000
#define CPM_IDMA2				0x00100000
#define CPM_TIMER2				0x00040000
#define CPM_RTT					0x00020000
#define CPM_I2C					0x00010000
#define CPM_PC11				0x00008000
#define CPM_PC10				0x00004000
#define CPM_TIMER3				0x00001000
#define CPM_PC9					0x00000800
#define CPM_PC8					0x00000400
#define CPM_PC7					0x00000200
#define CPM_TIMER4				0x00000080
#define CPM_PC6					0x00000040
#define CPM_SPI					0x00000020
#define CPM_SMC1				0x00000010
#define CPM_SMC2				0x00000008
#define CPM_PC5					0x00000004
#define CPM_PC4					0x00000002

#define SIU_LEVEL_4				0x00400000

#define CHANNEL_IDMA1			1
#define CHANNEL_IDMA2			2
#define IDMA1_MASK				0xFFFE
#define IDMA2_MASK				0xFFFD

#define IDMA_SUCCESS            0
#define IDMA_FAIL		1


typedef struct
{
	U16	status;
	U8	dfcr;
	U8	sfcr;
	U32	len;
	U8	*sBuffer;
	U8	*dBuffer;
} IDMA_BD;	

typedef struct
{
	U16	ibase;
	U16	dcmr;
	U32	sapr;
	U32	dapr;
	U16	ibptr;
	U16	write_sp;
	U32	s_byte_c;
	U32	d_byte_c;
	U32	s_state;
	U32	itemp[4];
	U32	sr_mem;
	U16	read_sp[4];
	U32	d_state;
} IDMA_PARAM;


extern U32  immrValue;
extern void IDMA_Init(void);
extern int  setupWriteIDMA(U8 *sBuffer, U32 len ,U32 lastBufferFlag);
extern void setupReadIDMA(U8 *dBuffer, U32 len);
extern U32  checkIDMADone(U32 channel);
extern void stopReadIDMA(U32 channel)
#endif