📄 start167.a66
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_RDYEN2 EQU 0 ; 0 = READY# function disabled
; ; 1 = READY# function enabled
;
; RDY_AS2: Synchronous / Asynchronous READY# Input (BUSCON2.3):
; Note: This bit is only valid if _RDYEN2 == 1.
_RDY_AS2 EQU 0 ; 0 = synchronous READY# input
; ; 1 = asynchronous READY# input
;
; CSREN2: Read Chip Select Enable bit (BUSCON2.14):
_CSREN2 EQU 0 ; 0 = CS2# is independent of read command (RD#)
; ; 1 = CS2# is generated for the duration of read
;
; CSWEN2: Write Chip Select Enable bit (BUSCON2.15):
_CSWEN2 EQU 0 ; 0 = CS2# is independent of write command (WR#)
; ; 1 = CS2# is generated for the duration of write
;
;
; BUSCON3/ADDRSEL3
; --- Set BUSCON3 = 1 to initialize the BUSCON3/ADDRSEL3 registers
$SET (BUSCON3 = 0)
;
; Define the start address and the address range of Chip Select 3 (CS3#)
; This values are used to set the ADDRSEL3 register
%DEFINE (ADDRESS3) (300000H) ; Set CS3# Start Address (default 300000H)
%DEFINE (RANGE3) (1024K) ; Set CS3# Range (default 1024K = 1MB)
;
; MCTC3: Memory Cycle Time (BUSCON3.0 .. BUSCON3.3):
; Note: if RDYEN3 == 1 a maximum number of 7 waitstates can be selected
_MCTC3 EQU 1 ; Memory wait states is 1 (MCTC3 field = 0EH).
;
; RWDC3: Read/Write Signal Delay (BUSCON3.4):
_RWDC3 EQU 0 ; 0 = Delay Time 0.5 States
; ; 1 = No Delay Time 0 States
;
; MTTC3: Memory Tri-state Time (BUSCON3.5):
_MTTC3 EQU 1 ; 0 = Delay Time 0.5 States
; ; 1 = No Delay Time 0 States
;
; BTYP3: External Bus Configuration Control (BUSCON3.6 .. BUSCON3.7):
_BTYP3 EQU 2 ; 0 = 8 Bit Non Multiplexed
; ; 1 = 8 Bit Multiplexed
; ; 2 = 16 Bit Non Multiplexed
; ; 3 = 16 Bit Multiplexed
;
; ALECTL3: ALE Lengthening Control Bit (BUSCON3.9):
_ALECTL3 EQU 0 ; see data sheet for description
;
; BUSACT3: Bus Active Control Bit (BUSCON3.10):
_BUSACT3 EQU 1 ; = 0 external (ADDRSEL3) bus disabled
; = 1 external (ADDRSEL3) bus enabled
;
; RDYEN3: READY# Input Enable control bit (BUSCON3.12):
_RDYEN3 EQU 0 ; 0 = READY# function disabled
; ; 1 = READY# function enabled
;
; RDY_AS3: Synchronous / Asynchronous READY# Input (BUSCON3.3):
; Note: This bit is only valid if _RDYEN3 == 1.
_RDY_AS3 EQU 0 ; 0 = synchronous READY# input
; ; 1 = asynchronous READY# input
;
; CSREN3: Read Chip Select Enable bit (BUSCON3.14):
_CSREN3 EQU 0 ; 0 = CS3# is independent of read command (RD#)
; ; 1 = CS3# is generated for the duration of read
;
; CSWEN3: Write Chip Select Enable bit (BUSCON3.15):
_CSWEN3 EQU 0 ; 0 = CS3# is independent of write command (WR#)
; ; 1 = CS3# is generated for the duration of write
;
;
; BUSCON4/ADDRSEL4
; --- Set BUSCON4 = 1 to initialize the BUSCON4/ADDRSEL4 registers
$SET (BUSCON4 = 0)
;
; Define the start address and the address range of Chip Select 4 (CS4#)
; This values are used to set the ADDRSEL4 register
%DEFINE (ADDRESS4) (400000H) ; Set CS4# Start Address (default 400000H)
%DEFINE (RANGE4) (1024K) ; Set CS4# Range (default 1024K = 1MB)
;
; MCTC4: Memory Cycle Time (BUSCON4.0 .. BUSCON4.3):
; Note: if RDYEN4 == 1 a maximum number of 7 waitstates can be selected
_MCTC4 EQU 1 ; Memory wait states is 1 (MCTC4 field = 0EH).
;
; RWDC4: Read/Write Signal Delay (BUSCON4.4):
_RWDC4 EQU 0 ; 0 = Delay Time 0.5 States
; ; 1 = No Delay Time 0 States
;
; MTTC4: Memory Tri-state Time (BUSCON4.5):
_MTTC4 EQU 1 ; 0 = Delay Time 0.5 States
; ; 1 = No Delay Time 0 States
;
; BTYP4: External Bus Configuration Control (BUSCON4.6 .. BUSCON4.7):
_BTYP4 EQU 2 ; 0 = 8 Bit Non Multiplexed
; ; 1 = 8 Bit Multiplexed
; ; 2 = 16 Bit Non Multiplexed
; ; 3 = 16 Bit Multiplexed
;
; ALECTL4: ALE Lengthening Control Bit (BUSCON4.9):
_ALECTL4 EQU 0 ; see data sheet for description
;
; BUSACT4: Bus Active Control Bit (BUSCON4.10):
_BUSACT4 EQU 1 ; = 0 external (ADDRSEL4) bus disabled
; = 1 external (ADDRSEL4) bus enabled
;
; RDYEN4: READY# Input Enable control bit (BUSCON4.12):
_RDYEN4 EQU 0 ; 0 = READY# function disabled
; ; 1 = READY# function enabled
;
; RDY_AS4: Synchronous / Asynchronous READY# Input (BUSCON4.3):
; Note: This bit is only valid if _RDYEN4 == 1.
_RDY_AS4 EQU 0 ; 0 = synchronous READY# input
; ; 1 = asynchronous READY# input
;
; CSREN4: Read Chip Select Enable bit (BUSCON4.14):
_CSREN4 EQU 0 ; 0 = CS4# is independent of read command (RD#)
; ; 1 = CS4# is generated for the duration of read
;
; CSWEN4: Write Chip Select Enable bit (BUSCON4.15):
_CSWEN4 EQU 0 ; 0 = CS4# is independent of write command (WR#)
; ; 1 = CS4# is generated for the duration of write
;
;------------------------------------------------------------------------------
$IF TINY
$SET (DPPUSE = 0)
$ENDIF
_STKSZ SET 0
_STKSZ1 SET 0 ; size is 512 Words
$IF (STK_SIZE = 0)
_STKSZ1 SET 1 ; size is 256 Words
$ENDIF
$IF (STK_SIZE = 1)
_STKSZ SET 1
_STKSZ1 SET 2 ; size is 128 Words
$ENDIF
$IF (STK_SIZE = 2)
_STKSZ SET 2
_STKSZ1 SET 3 ; size is 64 Words
$ENDIF
$IF (STK_SIZE = 3)
_STKSZ SET 3
_STKSZ1 SET 4 ; size is 32 Words
$ENDIF
$IF (STK_SIZE = 4)
_STKSZ SET 4
$ENDIF
$IF (STK_SIZE = 5)
_STKSZ SET 5
$ENDIF
$IF (STK_SIZE = 6)
_STKSZ SET 6
$ENDIF
$IF (STK_SIZE = 7)
_STKSZ SET 7
$ENDIF
$IF NOT TINY
ASSUME DPP3:SYSTEM
ASSUME DPP2:NDATA
$ENDIF
NAME ?C_STARTUP
PUBLIC ?C_STARTUP
$IF MEDIUM OR LARGE OR HLARGE
Model LIT 'FAR'
$ELSE
Model LIT 'NEAR'
$ENDIF
EXTRN main:Model
PUBLIC ?C_USRSTKBOT
?C_USERSTACK SECTION DATA PUBLIC 'NDATA'
$IF NOT TINY
NDATA DGROUP ?C_USERSTACK
$ENDIF
?C_USRSTKBOT:
DS USTSZ ; Size of User Stack
?C_USERSTKTOP:
?C_USERSTACK ENDS
?C_MAINREGISTERS REGDEF R0 - R15
$IF (STK_SIZE = 7)
?C_SYSSTACK SECTION DATA PUBLIC 'IDATA'
$IF NOT TINY
SDATA DGROUP ?C_SYSSTACK
$ENDIF
_BOS: ; bottom of system stack
DS SSTSZ ; Size of User Stack
_TOS: ; top of system stack
?C_SYSSTACK ENDS
$ELSE
; Setup Stack Overflow
_TOS EQU 0FC00H ; top of system stack
_BOS EQU _TOS - (1024 >> _STKSZ1) ; bottom of system stack
$ENDIF
PUBLIC ?C_SYSSTKBOT
?C_SYSSTKBOT EQU _BOS
SSKDEF _STKSZ ; System stack size
?C_STARTUP_CODE SECTION CODE 'ICODE'
;------------------------------------------------------------------------------
; Special Function Register Addresses
SYSCON DEFR 0FF12H
BUSCON0 DEFR 0FF0CH
SP DEFR 0FE12H
STKOV DEFR 0FE14H
STKUN DEFR 0FE16H
P3 DEFR 0FFC4H
DP3 DEFR 0FFC6H
BUSCON1 DEFR 0FF14H
BUSCON2 DEFR 0FF16H
BUSCON3 DEFR 0FF18H
BUSCON4 DEFR 0FF1AH
ADDRSEL1 DEFR 0FE18H
ADDRSEL2 DEFR 0FE1AH
ADDRSEL3 DEFR 0FE1CH
ADDRSEL4 DEFR 0FE1EH
SYSCON2 DEFR 0F1D0H
SYSCON3 DEFR 0F1D4H
%*DEFINE (ADDR (Val, Start, Range)) (
%SET (adr, %SUBSTR(%Start,1,(%LEN(%Start)- 3))%SUBSTR(%Start,%LEN(%Start),1))
%IF (%EQS (%Range,4K)) THEN (%SET (adr, (%adr AND 0FFF0H) + 0)) FI
%IF (%EQS (%Range,8K)) THEN (%SET (adr, (%adr AND 0FFE0H) + 1)) FI
%IF (%EQS (%Range,16K)) THEN (%SET (adr, (%adr AND 0FFC0H) + 2)) FI
%IF (%EQS (%Range,32K)) THEN (%SET (adr, (%adr AND 0FF80H) + 3)) FI
%IF (%EQS (%Range,64K)) THEN (%SET (adr, (%adr AND 0FF00H) + 4)) FI
%IF (%EQS (%Range,128K)) THEN (%SET (adr, (%adr AND 0FE00H) + 5)) FI
%IF (%EQS (%Range,256K)) THEN (%SET (adr, (%adr AND 0FC00H) + 6)) FI
%IF (%EQS (%Range,512K)) THEN (%SET (adr, (%adr AND 0F800H) + 7)) FI
%IF (%EQS (%Range,1024K)) THEN (%SET (adr, (%adr AND 0F000H) + 8)) FI
%IF (%EQS (%Range,1M)) THEN (%SET (adr, (%adr AND 0F000H) + 8)) FI
%IF (%EQS (%Range,2048K)) THEN (%SET (adr, (%adr AND 0E000H) + 9)) FI
%IF (%EQS (%Range,2M)) THEN (%SET (adr, (%adr AND 0E000H) + 9)) FI
%IF (%EQS (%Range,4096K)) THEN (%SET (adr, (%adr AND 0C000H) +10)) FI
%IF (%EQS (%Range,4M)) THEN (%SET (adr, (%adr AND 0C000H) +10)) FI
%IF (%EQS (%Range,8192K)) THEN (%SET (adr, (%adr AND 08000H) +11)) FI
%IF (%EQS (%Range,8M)) THEN (%SET (adr, (%adr AND 08000H) +11)) FI
%Val EQU %adr
)
?C_RESET PROC TASK C_STARTUP INTNO RESET = 0
?C_STARTUP: LABEL Model
$IF (WATCHDOG = 0)
DISWDT ; Disable watchdog timer
$ENDIF
$IF (INIT_XPERCON = 1)
; Improtant XPERCON must be set before SYSCON.XPEN is enabled
XPERCON DEFR 0F024H
V_XPERCON SET V_CAN1 OR (V_CAN2 << 1) OR (V_XRAM2 << 10)
V_XPERCON SET V_XPERCON OR (V_XRAM6 << 11) OR (V_XFLASH << 14)
EXTR #1
MOV XPERCON,#V_XPERCON
$ENDIF
BCON0L SET (_MTTC0 << 5) OR (_RWDC0 << 4)
BCON0L SET BCON0L OR ((NOT _MCTC0) AND 0FH)
BCON0L SET BCON0L AND (NOT (_RDYEN0 << 3))
BCON0L SET BCON0L OR (_RDY_AS0 << 3)
BCON0H SET (_ALECTL0 << 1) OR (_RDYEN0 << 4)
BCON0H SET BCON0H OR (_CSREN0 << 6) OR (_CSWEN0 << 7)
$IF (BTYP_ENABLE == 1)
BCON0L SET BCON0L OR (_BTYP0 << 6)
BCON0H SET BCON0H OR (_BUSACT0 << 2)
$ENDIF
$IF (BTYP_ENABLE == 0)
BFLDL BUSCON0,#03FH,#BCON0L
BFLDH BUSCON0,#0D2H,#BCON0H
$ELSE
BFLDL BUSCON0,#0FFH,#BCON0L
BFLDH BUSCON0,#0D6H,#BCON0H
$ENDIF
SYS_BITS SET 0FF6FH
SYS_H SET (_STKSZ << 5) OR (_ROMS1 << 4) OR (_SGTDIS << 3)
SYS_H SET SYS_H OR (_ROMEN << 2) OR (_BYTDIS << 1) OR _CLKEN
SYS_L SET _XPERSHARE OR (_VISIBLE << 1) OR (_XPEN << 2)
SYS_L SET SYS_L OR (_BDRSTEN << 3)
SYS_L SET SYS_L OR (_PWDCFG << 5) OR (_CSCFG << 6)
$IF (WRCFG_ENABLE == 1)
SYS_L SET SYS_L OR (_WRCFG << 7)
SYS_BITS SET SYS_BITS OR 00080H
$ENDIF
$IF (OWDDIS_ENABLE == 1)
SYS_L SET SYS_L OR (_OWDDIS << 4)
SYS_BITS SET SYS_BITS OR 00010H
$ENDIF
; Setup SYSCON Register
BFLDH SYSCON,#HIGH SYS_BITS,#SYS_H
BFLDL SYSCON,#LOW SYS_BITS,#SYS_L
;
$IF (ADVANCED_SYSCON = 1)
SYS_2 SET (PDCON << 4) OR (RTS << 6) OR (SCS << 7)
SYS_2 SET SYS_2 OR (CLKCON << 8) OR (CLKREL << 10)
SYS_3 SET ADCDIS OR (ASC0DIS << 1) OR (SSCDIS << 2)
SYS_3 SET SYS_3 OR (GPTDIS << 3)
SYS_3 SET SYS_3 OR (FMDIS << 5) OR (CC1DIS << 6) OR (CC2DIS << 7)
SYS_3 SET SYS_3 OR (CC6DIS << 8) OR (PWMDIS << 9)
SYS_3 SET SYS_3 OR (ASC1DIS << 10) OR (I2CDIS << 11)
SYS_3 SET SYS_3 OR (CAN1DIS << 13) OR (CAN2DIS << 14)
SYS_3 SET SYS_3 OR (PCDDIS << 15)
EXTR #2
MOV SYSCON2,#SYS_2
MOV SYSCON3,#SYS_3
$ENDIF
;
$IF (BUSCON1 = 1)
BCON1 SET (_MTTC1 << 5) OR (_RWDC1 << 4)
BCON1 SET BCON1 OR ((NOT _MCTC1) AND 0FH)
BCON1 SET BCON1 AND (NOT (_RDYEN1 << 3))
BCON1 SET BCON1 OR (_RDY_AS1 << 3) OR (_BTYP1 << 6)
BCON1 SET BCON1 OR (_ALECTL1 << 9) OR (_BUSACT1 << 10)
BCON1 SET BCON1 OR (_RDYEN1 << 12) OR (_CSREN1 << 14)
BCON1 SET BCON1 OR (_CSWEN1 << 15)
%ADDR (ADDR1,%ADDRESS1,%RANGE1)
MOV ADDRSEL1,#ADDR1
MOV BUSCON1,#BCON1
$ENDIF
$IF (BUSCON2 = 1)
BCON2 SET (_MTTC2 << 5) OR (_RWDC2 << 4)
BCON2 SET BCON2 OR ((NOT _MCTC2) AND 0FH)
BCON2 SET BCON2 AND (NOT (_RDYEN2 << 3))
BCON2 SET BCON2 OR (_RDY_AS2 << 3) OR (_BTYP2 << 6)
BCON2 SET BCON2 OR (_ALECTL2 << 9) OR (_BUSACT2 << 10)
BCON2 SET BCON2 OR (_RDYEN2 << 12) OR (_CSREN2 << 14)
BCON2 SET BCON2 OR (_CSWEN2 << 15)
%ADDR (ADDR2,%ADDRESS2,%RANGE2)
MOV ADDRSEL2,#ADDR2
MOV BUSCON2,#BCON2
$ENDIF
$IF (BUSCON3 = 1)
BCON3 SET (_MTTC3 << 5) OR (_RWDC3 << 4)
BCON3 SET BCON3 OR ((NOT _MCTC3) AND 0FH)
BCON3 SET BCON3 AND (NOT (_RDYEN3 << 3))
BCON3 SET BCON3 OR (_RDY_AS3 << 3) OR (_BTYP3 << 6)
BCON3 SET BCON3 OR (_ALECTL3 << 9) OR (_BUSACT3 << 10)
BCON3 SET BCON3 OR (_RDYEN3 << 12) OR (_CSREN3 << 14)
BCON3 SET BCON3 OR (_CSWEN3 << 15)
%ADDR (ADDR3,%ADDRESS3,%RANGE3)
MOV ADDRSEL3,#ADDR3
MOV BUSCON3,#BCON3
$ENDIF
$IF (BUSCON4 = 1)
BCON4 SET (_MTTC4 << 5) OR (_RWDC4 << 4)
BCON4 SET BCON4 OR ((NOT _MCTC4) AND 0FH)
BCON4 SET BCON4 AND (NOT (_RDYEN4 << 3))
BCON4 SET BCON4 OR (_RDY_AS4 << 3) OR (_BTYP4 << 6)
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