📄 52xx_panel.c
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/*
$Workfile: 52xx_panel.c $
$Revision: 1.3 $
$Date: Feb 10 2004 15:34:40 $
*/
//******************************************************************
//
// Copyright (C) 2001. GENESIS MICROCHIP INC.
// All rights reserved. No part of this program may be reproduced
//
// Genesis Microchip Inc., 165 Commerce Valley Dr. West
// Thornhill, Ontario, Canada, L3T 7V8
//
//================================================================
//
// MODULE: 52xx_panel.c
//
// USAGE : Panel parameters to setup display output registers.
//
// NOTE : Select panel using number the panel number
// defined in enum shown in below.
//
//******************************************************************
#include "inc\all.h"
#if USING_PANEL_ARRAY
BYTE B_PanelIndex;
//**************************************************************
// P A N E L D E F I N I T I O N S
//**************************************************************
PanelArrayType ROM PanelArray[] = {
{
0x01, //LVDS_PANEL
"LG_SXGA_LTM181E06", // Name
0, // TwoPixelPerClk
8, // Depth
1280, // Width
1024, // Height
86, // MaxVFreq Hz
40, // MinVFreq Hz
140000UL, // MaxPClk KHz
1372, // MinHTotal
8, // MinHSyncFrontPorch
8, // MinHSyncWidth
20, // MinHSyncBackPorch
28, // HActiveStart = (MinHSyncWidth + MinHSyncBackPorch)
1308, // PanelHActiveEnd = (HActiveStart + Width)
2047, // MaxVTotal
1066, // TypVTotal
1034, // MinVTotal
1, // MinVSyncFrontPorch
2, // MinVSyncWidth
1, // MinVSyncBackPorch
3, // VActiveStart = (MinVSyncWidth + MinVSyncBackPorch)
1027, // VActiveEnd = (VActiveStart + Height)
0x01, // Invert_DVS
0x01, // Invert_DHS
0x01, // Invert_DCLK
0x00, // Invert_DEN
0x555555UL, // PadDrive
// Define panel power up/down timing. WORD constant used to program registers 0x1D8 and 0x1D9 during power up and power down
//for TCLK=14.318MHz, 1Tick = TCLK/511/32 = 1.14ms.
0x1405, // PowerUpTiming
0x1405, // PowerDownTiming
0x00, // SpreadSpectrumCtrl Value for Spread_Spectrum_Control register
0x00, // Spread_Spect_En
0x01, // LVDS_BusType 0x00: single bus; 0x01: dual bus
0x01, // LVDSBus_EvenOddSwap 0x01 - Swap 0x00 NoSwap
7, // DClkDelay: DCLK display timing delay adjustment in ns unit.
},
{
0x01, //LVDS_PANEL
"Samsung_SXGA_LTM170E4_L01", // Name
0, // TwoPixelPerClk
8, // Depth
1280, // Width
1024, // Height
87, // MaxVFreq Hz
50, // MinVFreq Hz
108000UL, // MaxPClk KHz
1344, // MinHTotal
12, // MinHSyncFrontPorch
16, // MinHSyncWidth
24, // MinHSyncBackPorch
40, // HActiveStart = (MinHSyncWidth + MinHSyncBackPorch)
1320, // PanelHActiveEnd = (HActiveStart + Width)
2047, // MaxVTotal
1066, // TypVTotal
1032, // MinVTotal
1, // MinVSyncFrontPorch
3, // MinVSyncWidth
4, // MinVSyncBackPorch
7, // VActiveStart = (MinVSyncWidth + MinVSyncBackPorch)
1031, // VActiveEnd = (VActiveStart + Height)
0x01, // Invert_DVS
0x01, // Invert_DHS
0x01, // Invert_DCLK
0x00, // Invert_DEN
0x775522UL, // PadDrive
// Define panel power up/down timing. WORD constant used to program registers 0x1D8 and 0x1D9 during power up and power down
//for TCLK=14.318MHz, 1Tick = TCLK/511/32 = 1.14ms.
0xaf57, // PowerUpTiming
0x57af, // PowerDownTiming
0x00, // SpreadSpectrumCtrl Value for Spread_Spectrum_Control register
0x00, // Spread_Spect_En
0x01, // LVDS_BusType 0x00: single bus; 0x01: dual bus
0x01, // LVDSBus_EvenOddSwap 0x01 - Swap 0x00 NoSwap
7, // DClkDelay: DCLK display timing delay adjustment in ns unit.
},
{
0x01, //LVDS_PANEL
"AUO_SXGA_M170EN05", // Name
0, // TwoPixelPerClk
8, // Depth
1280, // Width
1024, // Height
77, // MaxVFreq Hz
57, // MinVFreq Hz
140000UL, // MaxPClk KHz
1600, // MinHTotal
10, // MinHSyncFrontPorch
4, // MinHSyncWidth
20, // MinHSyncBackPorch
24, // HActiveStart = (MinHSyncWidth + MinHSyncBackPorch)
1304, // PanelHActiveEnd = (HActiveStart + Width)
2047, // MaxVTotal
1066, // TypVTotal
1035, // MinVTotal
1, // MinVSyncFrontPorch
3, // MinVSyncWidth
7, // MinVSyncBackPorch
10, // VActiveStart = (MinVSyncWidth + MinVSyncBackPorch)
1034, // VActiveEnd = (VActiveStart + Height)
0x01, // Invert_DVS
0x01, // Invert_DHS
0x01, // Invert_DCLK
0x00, // Invert_DEN
0x775522UL, // PadDrive
// Define panel power up/down timing. WORD constant used to program registers 0x1D8 and 0x1D9 during power up and power down
//for TCLK=14.318MHz, 1Tick = TCLK/511/32 = 1.14ms.
0x9944, // PowerUpTiming
0x9944, // PowerDownTiming
0x00, // SpreadSpectrumCtrl Value for Spread_Spectrum_Control register
0x00, // Spread_Spect_En
0x01, // LVDS_BusType 0x00: single bus; 0x01: dual bus
0x01, // LVDSBus_EvenOddSwap 0x01 - Swap 0x00 NoSwap
7, // DClkDelay: DCLK display timing delay adjustment in ns unit.
},
{
0x01, // LVDS_PANEL
"LG_WXGA_17132P3M08016", // Name
0, // TwoPixelPerClk
8, // Depth
1280, // Width
768, // Height
77, // MaxVFreq Hz
50, // MinVFreq Hz
70000UL, // MaxPClk KHz
1334, // MinHTotal
16, // MinHSyncFrontPorch
8, // MinHSyncWidth
20, // MinHSyncBackPorch
28, // HActiveStart = (MinHSyncWidth + MinHSyncBackPorch)
1308, // PanelHActiveEnd = (HActiveStart + Width)
1000, // MaxVTotal
812, // TypVTotal
772, // MinVTotal
1, // MinVSyncFrontPorch
1, // MinVSyncWidth
2, // MinVSyncBackPorch
3, // VActiveStart = (MinVSyncWidth + MinVSyncBackPorch)
771, // VActiveEnd = (VActiveStart + Height)
0x01, // Invert_DVS
0x01, // Invert_DHS
0x00, // Invert_DCLK
0x00, // Invert_DEN
0x555555UL, // PadDrive
// Define panel power up/down timing. WORD constant used to program registers 0x1D8 and 0x1D9 during power up and power down
//for TCLK=14.318MHz, 1Tick = TCLK/511/32 = 1.14ms.
0x2baf, // PowerUpTiming
0xaf2b, // PowerDownTiming
0x00, // SpreadSpectrumCtrl Value for Spread_Spectrum_Control register
0x00, // Spread_Spect_En
0x00, // LVDS_BusType 0x00: single bus; 0x01: dual bus
0x00, // LVDSBus_EvenOddSwap 0x01 - Swap 0x00 NoSwap
7, // DClkDelay: DCLK display timing delay adjustment in ns unit.
},
{
0x01, //LVDS_PANEL
"Samsung_XGA_LTM150XH_L01", // Name
0, // TwoPixelPerClk
8, // Depth
1024, // Width
768, // Height
76, // MaxVFreq Hz
1, // MinVFreq Hz
80000UL, // MaxPClk KHz
1100, // MinHTotal
10, // MinHSyncFrontPorch
32, // MinHSyncWidth
33, // MinHSyncBackPorch
65, // HActiveStart = (MinHSyncWidth + MinHSyncBackPorch)
1089, // PanelHActiveEnd = (HActiveStart + Width)
1000, // MaxVTotal
806, // TypVTotal
776, // MinVTotal
1, // MinVSyncFrontPorch
2, // MinVSyncWidth
4, // MinVSyncBackPorch
6, // VActiveStart = (MinVSyncWidth + MinVSyncBackPorch)
774, // VActiveEnd = (VActiveStart + Height)
0x01, // Invert_DVS
0x01, // Invert_DHS
0x01, // Invert_DCLK
0x00, // Invert_DEN
0x775522UL, // PadDrive
// Define panel power up/down timing. WORD constant used to program registers 0x1D8 and 0x1D9 during power up and power down
//for TCLK=14.318MHz, 1Tick = TCLK/511/32 = 1.14ms.
0x9944, // PowerUpTiming
0x9944, // PowerDownTiming
0x00, // SpreadSpectrumCtrl Value for Spread_Spectrum_Control register
0x00, // Spread_Spect_En
0x00, // LVDS_BusType 0x00: single bus; 0x01: dual bus
0x00, // LVDSBus_EvenOddSwap 0x01 - Swap 0x00 NoSwap
0, // DClkDelay: DCLK display timing delay adjustment in ns unit.
},
{
0x00, //LVDS_PANEL
"Samsung_XGA_LTM150XH_T01", // Name
0, // TwoPixelPerClk
6, // Depth
1024, // Width
768, // Height
76, // MaxVFreq Hz
1, // MinVFreq Hz
80000UL, // MaxPClk KHz
1100, // MinHTotal
10, // MinHSyncFrontPorch
32, // MinHSyncWidth
33, // MinHSyncBackPorch
65, // HActiveStart = (MinHSyncWidth + MinHSyncBackPorch)
1089, // PanelHActiveEnd = (HActiveStart + Width)
1000, // MaxVTotal
806, // TypVTotal
776, // MinVTotal
1, // MinVSyncFrontPorch
2, // MinVSyncWidth
4, // MinVSyncBackPorch
6, // VActiveStart = (MinVSyncWidth + MinVSyncBackPorch)
774, // VActiveEnd = (VActiveStart + Height)
0x01, // Invert_DVS
0x01, // Invert_DHS
0x01, // Invert_DCLK
0x00, // Invert_DEN
0x775533UL, // PadDrive
// Define panel power up/down timing. WORD constant used to program registers 0x1D8 and 0x1D9 during power up and power down
//for TCLK=14.318MHz, 1Tick = TCLK/511/32 = 1.14ms.
0x9944, // PowerUpTiming
0x9944, // PowerDownTiming
0x0f, // SpreadSpectrumCtrl Value for Spread_Spectrum_Control register
0x01, // Spread_Spect_En
0x00, // LVDS_BusType 0x00: single bus; 0x01: dual bus
0x00, // LVDSBus_EvenOddSwap 0x01 - Swap 0x00 NoSwap
0, // DClkDelay: DCLK display timing delay adjustment in ns unit.
},
{
0x01, //LVDS_PANEL
"Samsung_XGA_LTM150XS_L01", // Name
0, // TwoPixelPerClk
8, // Depth
1024, // Width
768, // Height
76, // MaxVFreq Hz
1, // MinVFreq Hz
80000UL, // MaxPClk KHz
1090, // MinHTotal
1, // MinHSyncFrontPorch
32, // MinHSyncWidth
33, // MinHSyncBackPorch
65, // HActiveStart = (MinHSyncWidth + MinHSyncBackPorch)
1089, // PanelHActiveEnd = (HActiveStart + Width)
1200, // MaxVTotal
806, // TypVTotal
776, // MinVTotal
1, // MinVSyncFrontPorch
2, // MinVSyncWidth
5, // MinVSyncBackPorch
7, // VActiveStart = (MinVSyncWidth + MinVSyncBackPorch)
775, // VActiveEnd = (VActiveStart + Height)
0x01, // Invert_DVS
0x00, // Invert_DHS
0x00, // Invert_DCLK
0x01, // Invert_DEN
0x777777UL, // PadDrive
// Define panel power up/down timing. WORD constant used to program registers 0x1D8 and 0x1D9 during power up and power down
//for TCLK=14.318MHz, 1Tick = TCLK/511/32 = 1.14ms.
0xaf57, // PowerUpTiming
0x57af, // PowerDownTiming
0x00, // SpreadSpectrumCtrl Value for Spread_Spectrum_Control register
0x00, // Spread_Spect_En
0x00, // LVDS_BusType 0x00: single bus; 0x01: dual bus
0x01, // LVDSBus_EvenOddSwap 0x01 - Swap 0x00 NoSwap
7, // DClkDelay: DCLK display timing delay adjustment in ns unit.
},
{
0x01, //LVDS_PANEL
"Samsung_SXGA_LTM170E5_L03", // Name
0, // TwoPixelPerClk
8, // Depth
1280, // Width
1024, // Height
87, // MaxVFreq Hz
1, // inVFreq Hz
140000UL, // MaxPClk KHz
1340, // MinHTotal
20, // MinHSyncFrontPorch
20, // MinHSyncWidth
20, // MinHSyncBackPorch
40, // HActiveStart = (MinHSyncWidth + MinHSyncBackPorch)
1320, // PanelHActiveEnd = (HActiveStart + Width)
1066, // MaxVTotal
1066, // TypVTotal
1032, // MinVTotal
1, // MinVSyncFrontPorch
2, // MinVSyncWidth
4, // MinVSyncBackPorch
6, // VActiveStart = (MinVSyncWidth + MinVSyncBackPorch)
1030, // VActiveEnd = (VActiveStart + Height)
0x01, // Invert_DVS
0x01, // Invert_DHS
0x01, // Invert_DCLK
0x00, // Invert_DEN
0x775522UL, // PadDrive
// Define panel power up/down timing. WORD constant used to program registers 0x1D8 and 0x1D9 during power up and power down
//for TCLK=14.318MHz, 1Tick = TCLK/511/32 = 1.14ms.
0x9944, // PowerUpTiming
0x9944, // PowerDownTiming
0x00, // SpreadSpectrumCtrl Value for Spread_Spectrum_Control register
0x00, // Spread_Spect_En
0x01, // LVDS_BusType 0x00: single bus; 0x01: dual bus
0x01, // LVDSBus_EvenOddSwap 0x01 - Swap 0x00 NoSwap
7, // DClkDelay: DCLK display timing delay adjustment in ns unit.
},
{
0x01, //LVDS_PANEL
"LG_XGA_LM150X06", // Name
0, // TwoPixelPerClk
8, // Depth
1024, // Width
768, // Height
75, // MaxVFreq Hz
1, // MinVFreq Hz
70000UL, // MaxPClk KHz
1096, // MinHTotal
10, // MinHSyncFrontPorch
16, // MinHSyncWidth
20, // MinHSyncBackPorch
36, // HActiveStart = (MinHSyncWidth + MinHSyncBackPorch)
1060, // PanelHActiveEnd = (HActiveStart + Width)
840, // MaxVTotal
806, // TypVTotal
780, // MinVTotal
1, // MinVSyncFrontPorch
2, // MinVSyncWidth
2, // MinVSyncBackPorch
4, // VActiveStart = (MinVSyncWidth + MinVSyncBackPorch)
772, // VActiveEnd = (VActiveStart + Height)
0x01, // Invert_DVS
0x01, // Invert_DHS
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