📄 mcu186.h
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// T0CON Timer0 Mode and Control Register (PCB_BASE + 0x56)
// T1CON Timer1 Mode and Control Register (PCB_BASE + 0x5E)
#define CONT BIT0 // Continuous Mode
#define ALT BIT1 // Alternate Compare
#define EXT BIT2 // External Clock
#define P BIT3 // Prescaler Bit
#define RTG BIT4 // Retrigger Bit
#define MC BIT5 // Maximum Count Bit
//Reserved BIT6 // Set to zero
//Reserved BIT7 // Set to zero
//Reserved BIT8 // Set to zero
//Reserved BIT9 // Set to zero
//Reserved BIT10 // Set to zero
//Reserved BIT11 // Set to zero
#define RIU BIT12 // Register in Use Bit
#define INT BIT13 // Interrupt Bit
#define INH BIT14 // Inhibit Bit
#define EN BIT15 // Enable Bit
// IMASK Interrupt Mask Register (PCB_BASE + 0x28)
#define TMR BIT0 // Timer 0, 1 1nd 2 Interrupt Mask
//Reseved BIT1 // Set to zero
#define D0 BIT2 // DMA0 Chanel Interrupt Mask
#define D1 BIT3 // DMA1 Chanel Interrupt Mask
#define I0 BIT4 // INT0 Mask
#define I1 BIT5 // INT1 Mask
#define I2 BIT6 // INT2 Mask
#define I3 BIT7 // INT3 Mask
#define I4 BIT8 // INT4 Mask
#define SP1 BIT9 // INT5 Mask
#define SP0 BIT10 // Serial Port1 Mask
#define I5 BIT11 // Serial Port0 Mask
#define D2 BIT12 // DMA0 Chanel Interrupt Mask
#define D3 BIT13 // DMA0 Chanel Interrupt Mask
//Reserved BIT14 // Set to zero
//Reserved BIT15 // Set to zero
//******************************************************************************
// INTERRUPT VECTORS ADDRESSES
//******************************************************************************
#define DIV0_VECTOR 0X0000
#define SINGLE_STEP_VECTOR 0x0004
#define NMI_VECTOR 0x0008
#define SWBP_VECTOR 0x000C // INT 3 instruction
#define BOUNDS_VECTOR 0x0014
#define UNUSED_OP_VECTOR 0x0018
#define ESC_VECTOR 0x001C
#define INTO_VECTOR 0x0020 // interrupt on overflow instruction
#define TIMER0_VECTOR 0x0020 //
#define TIMER1_VECTOR 0x0048 //
#define TIMER2_VECTOR 0x004C //
#define DMA0_VECTOR 0x0028 //
#define DMA1_VECTOR 0x002C //
#define DMA2_VECTOR 0x0058 //
#define DMA3_VECTOR 0x005C //
#define INT0_VECTOR 0x0030 //
#define INT1_VECTOR 0x0034 //
#define INT2_VECTOR 0x0038 //
#define INT3_VECTOR 0x003C //
#define INT4_VECTOR 0x0040 //
#define INT5_VECTOR 0x0054 //
#define UART0_VECTOR 0x0050 //
#define UART1_VECTOR 0x0044 //
//******************************************************************************
// INTERRUPT VECTOR TYPES
//******************************************************************************
#define TIMER0_VTYPE 8 //
#define TIMER1_VTYPE 18 //
#define TIMER2_VTYPE 19 //
#define DMA0_VTYPE 10 //
#define DMA1_VTYPE 11 //
#define DMA2_VTYPE 22 //
#define DMA3_VTYPE 23 //
#define INT0_VTYPE 12 //
#define INT1_VTYPE 13 //
#define INT2_VTYPE 14 //
#define INT3_VTYPE 15 //
#define UART1_VTYPE 17 //
#define INT4_VTYPE 16 //
#define INT5_VTYPE 21 //
#define UART0_VTYPE 20 //
//******************************************************************************
// DMA DEFINITIONS
//******************************************************************************
typedef struct DMAChannelsStruct
{
BYTE Channel0;
BYTE Channel1;
} DMAChannelsType;
enum
{
_DMA_Is_Available = 0,
_DMA_SDRAM_Read_Operation = 1,
_DMA_SDRAM_Write_Operation = 2
};
typedef enum
{
_DMA_Channel0 = 0,
_DMA_Channel1 = 1,
_DMA_Channel2 = 2,
_DMA_Channel3 = 3,
_DMA_Is_Not_Available = 4,
_SDRAM_Is_Busy = 5
} DMA_CHANNEL;
//
// DMA channels control data structure
//
extern DMAChannelsType DmaChannels;
//******************************************************************************
// DMA CONTROL REGISTER BIT DEFINITIONS
//******************************************************************************
#define DMA_DEST_POINTER_IS_MEMORY BIT15
#define DMA_DEST_POINTER_IS_IO 0
#define DMA_DEST_POINTER_DEC BIT14
#define DMA_DEST_POINTER_NOT_DEC 0
#define DMA_DEST_POINTER_INC BIT13
#define DMA_DEST_POINTER_NOT_INC 0
#define DMA_SRC_POINTER_IS_MEMORY BIT12
#define DMA_SRC_POINTER_IS_IO 0
#define DMA_SRC_POINTER_DEC BIT11
#define DMA_SRC_POINTER_NOT_DEC 0
#define DMA_SRC_POINTER_INC BIT10
#define DMA_SRC_POINTER_NOT_INC 0
#define DMA_TC_TERMINATE BIT9
#define DMA_TC_NOT_TERMINATE 0
#define DMA_INT_ENABLE_ON_TERM BIT8
#define DMA_INT_DISABLE_ON_TERM 0
#define DMA_NO_SYNC 0
#define DMA_SRC_SYNC BIT6
#define DMA_DEST_SYNC BIT7
#define DMA_HIGH_PRIORITY BIT5
#define DMA_LOW_PRIORITY 0
#define DMA_ENABLE_TIMER_REQ BIT4
#define DMA_DISABLE_TIMER_REQ 0
#define DMA_ENABLE_STOP_BIT_UPDATE BIT2
#define DMA_DISABLE_STOP_BIT_UPDATE 0
#define DMA_START_OPERATIONS BIT1
#define DMA_STOP_OPERATIONS 0
#define DMA_WORD_TRANSFERS BIT0
#define DMA_BYTE_TRANSFERS 0
//******************************************************************************
// M A C R O D E F I N I T I O N S
//******************************************************************************
#ifndef PC_SIMULATION
#define ENABLE_INTERRUPTS asm{ sti }
// BUG - until vautomation core is fixed use function to disable interrupts
#define DISABLE_INTERRUPTS gmi_DisableInterrupts()
//#define DISABLE_INTERRUPTS asm{ cli }
//
// Read/Write to specified WORD in given PCB register
//
#define WRITE_PCB_REG(W_RegAddr, W_RegValue) \
(*((WORD volatile* volatile)(W_RegAddr)) = (WORD)(W_RegValue))
#define READ_PCB_REG(W_RegAddr) \
(*((WORD volatile* volatile)(W_RegAddr)))
//
// Set/Clear the specified bits in given PCB register
//
#define SET_PCB_REG_BITS(W_RegAddr, W_RegValue) \
(*((WORD volatile* volatile)(W_RegAddr)) = *((WORD volatile* volatile)(W_RegAddr)) | (W_RegValue))
#define CLEAR_PCB_REG_BITS(W_RegAddr, W_RegValue) \
(*((WORD volatile* volatile)(W_RegAddr)) = *((WORD volatile* volatile)(W_RegAddr)) & (~(W_RegValue)))
//
// Set interrupt vector address
// NOTE: The high word of the W_CodeAddr is CS, the compiler will copy
// the CS value to the high word of W_VectAddr.
//
#define SET_VECTOR(W_VectAddr, W_CodeAddr) \
*((WORD volatile* volatile)(W_VectAddr)) = (WORD)(W_CodeAddr); \
*((WORD volatile* volatile)(W_VectAddr) + 1) = (WORD) ( ((DWORD)(W_CodeAddr))>>16 )
#else
#define ENABLE_INTERRUPTS
#define DISABLE_INTERRUPTS
//
// Read/Write to specified WORD in given PCB register
//
void WRITE_PCB_REG(WORD W_RegAddr, WORD W_RegValue);
WORD READ_PCB_REG(WORD W_RegAddr);
//
// Set/Clear the specified bits in given PCB register
//
void SET_PCB_REG_BITS(WORD W_RegAddr, WORD W_RegValue);
void CLEAR_PCB_REG_BITS(WORD W_RegAddr, WORD W_RegValue);
//
// Set interrupt vector address
//
#define SET_VECTOR(W_VectAddr, W_CodeAddr)
#endif
//******************************************************************************
// G L O B A L F U N C T I O N P R O T O T Y P E S
//******************************************************************************
void far gmi_McuInit (DWORD D_CpuClock);
DMA_CHANNEL far gmi_DmaRequestChannel(BYTE B_Command);
void far DmaSdramWritingInit (DMA_CHANNEL B_Channel, WORD W_Size, DWORD D_SrcPointer);
void far DmaSdramReadingInit (DMA_CHANNEL B_Channel, WORD W_Size, DWORD D_DestPointer);
void far DmaSdramStartWriting (DMA_CHANNEL B_Channel);
void far DmaSdramStartReading (DMA_CHANNEL B_Channel);
RET_STAT far gmi_InterruptEnable (ISR_NAME W_IsrName, WORD W_IntMaskRegValue);
RET_STAT far gmi_InterruptDisable (ISR_NAME W_IsrName, WORD W_IntMaskRegValue);
RET_STAT far gmi_InterruptSetFunc (ISR_NAME W_IsrName, void far (* IsrFuncPtr) (WORD W_IrqStatus));
void far gmi_IrqSetPriority (IRQ_NUMBER W_IrqNum, ISR_NAME * Wa_Priority);
void far gmi_DisableInterrupts(void);
#endif
//********************************* END **************************************⌨️ 快捷键说明
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