📄 mcu186.h
字号:
#ifndef __MCU186_H__
#define __MCU186_H__
//******************************************************************************
//
// Copyright (C) 2002. GENESIS MICROCHIP INC.
// All rights reserved. No part of this program may be reproduced.
//
// Genesis Microchip Inc., 165 Commerce Valley Dr. West
// Thornhill, Ontario, Canada, L3T 7V8
//
//==============================================================================
//
// MODULE: mcu186.h
//
// USAGE: This module is for MCU Turbo-186 registers definition.
//
//******************************************************************************
//******************************************************************************
// T Y P E D E F I N I T I O N S
//******************************************************************************
#if defined(GSEL_BUILD) || defined(APP_BUILD)
#define RET_STAT gmt_RET_STAT
#endif
typedef enum // Hardware Interrupt Number
{
IRQ0 = 0, // 0
IRQ1, // 1
IRQ2, // 2
IRQ3, // 3
IRQ4, // 4
IRQ5, // 5
NUMBER_IRQ_NUMBER // 6
} IRQ_NUMBER;
typedef enum
{
IRQ0_OCM_INT1 = 0, // 0
IRQ0_OCM_INT2, // 1
IRQ0_BP_IRQ, // 2
IRQ1_I2C_MASTER, // 3
IRQ1_IR_DECORDER, // 4
IRQ1_DDC2BI, // 5
IRQ1_DP_MEM_WR, // 6
IRQ1_DP_MEM_RD, // 7
IRQ1_FSB_WR_DONE, // 8
IRQ2_RS_READY, // 9
IRQ3_IGP, // 10
IRQ4_IVP, // 11
IRQ5_DISPLAY, // 12
NUMBER_ISR_NAME // 13 = number of IRQ name
} ISR_NAME;
typedef enum // Hardware Interrupt Priority
{
LEVEL_ONE = 0, // 0 = The highest
LEVEL_TWO, // 1
LEVEL_THREE, // 2
LEVEL_FOUR, // 3
LEVEL_FIVE, // 4
LEVEL_SIX, // 5
LEVEL_SEVEN, // 6
LEVEL_EIGHT // 7 = The lowest
} IRQ_PRIORITY;
#define INTERRUPT_MSK 8 // MASK bit for interrupt control registers
#define INTERRUPT_LTM 0x10 // bit setting level (1) or edge sensitive (0)
//******************************************************************************
// G L O B A L D E F I N I T I O N S
//******************************************************************************
#define MCU_CLK_24MHz 24000000L // OCM clk (in Hz) for TIPS3
#define MCU_CLK_100MHz 100000000L // OCM clk (in Hz) for T186 hardware
#define MCU_CLK_96MHz 96000000L // ocm clock if tclk of 24mhz resulting in rclk of 192Mhz
#define MCU_CLK_FPGA 14318000L // OCM clk (in Hz) for FPGA board
//
// PCB (Periferal Control Block) Base Address
//
#define PCB_BASE 0xA000 // PCB base address
//
// PCB (Periferal Control Block) Register Map
//
//
// Processor Control Registers
//
#define RELREG (PCB_BASE + 0xFE) // PCB Relocation
#define RESCON (PCB_BASE + 0xF6) // Reset Configuration
#define PRL (PCB_BASE + 0xF4) // Processor Release Level
#define AUXCON (PCB_BASE + 0xF2) // Auxiliary Configuration
#define SYSCON (PCB_BASE + 0xF0) // System Configuration
#define WDTCON (PCB_BASE + 0xE6) // Watchdog timer control
#define EDRAM (PCB_BASE + 0xE4) // Enable RCU
#define CDRAM (PCB_BASE + 0xE2) // Clock Prescaler
#define MDRAM (PCB_BASE + 0xE0) // Memory Partition
//
// DMA Registers
//
#define D1CON (PCB_BASE + 0xDA) // DMA1 Control
#define D1TC (PCB_BASE + 0xD8) // DMA1 Transfer Count
#define D1DSTH (PCB_BASE + 0xD6) // DMA1 Destination Addr. High
#define D1DSTL (PCB_BASE + 0xD4) // DMA1 Destination Addr. Low
#define D1SRCH (PCB_BASE + 0xD2) // DMA1 Source Addr. High
#define D1SRCL (PCB_BASE + 0xD0) // DMA1 Source Addr. Low
#define D0CON (PCB_BASE + 0xCA) // DMA0 Control
#define D0TC (PCB_BASE + 0xC8) // DMA0 Transfer Count
#define D0DSTH (PCB_BASE + 0xC6) // DMA0 Destination Addr. High
#define D0DSTL (PCB_BASE + 0xC4) // DMA0 Destination Addr. Low
#define D0SRCH (PCB_BASE + 0xC2) // DMA0 Source Addr. High
#define D0SRCL (PCB_BASE + 0xC0) // DMA0 Source Addr. Low
//
// Chip-Select Registers
//
#define MPCS (PCB_BASE + 0xA8) // PCS and MCS Auxiliary
#define MMCS (PCB_BASE + 0xA6) // Midrange Memory Chip Select
#define PACS (PCB_BASE + 0xA4) // Peripheral Chip-Select
#define LMCS (PCB_BASE + 0xA2) // Low Memory Chip-Select
#define UMCS (PCB_BASE + 0xA0) // Upper Memory Chip-Select
//
// Serial Port0 Registers
//
#define SP0BAUD (PCB_BASE + 0x88) // Serial Port0 Baud Rate Div.
#define SP0RD (PCB_BASE + 0x86) // Serial Port0 Receive
#define SP0TD (PCB_BASE + 0x84) // Serial Port0 Transmit
#define SP0STS (PCB_BASE + 0x82) // Serial Port0 Status
#define SP0CT (PCB_BASE + 0x80) // Serial Port0 Control
//
// PIO Registers
//
#define PDATA1 (PCB_BASE + 0x7A) // PIO Data 1
#define PDIR1 (PCB_BASE + 0x78) // PIO Direction 1
#define PIOMODE1 (PCB_BASE + 0x76) // PIO Mode 1
#define PDATA0 (PCB_BASE + 0x74) // PIO Data 0
#define PDIR0 (PCB_BASE + 0x72) // PIO Direction 0
#define PIOMODE0 (PCB_BASE + 0x70) // PIO Mode 0
//
// Timer Registers
//
#define T2CON (PCB_BASE + 0x66) // Timer2 Mode/Control
#define T2CMPA (PCB_BASE + 0x62) // Timer2 Max Count Compare A
#define T2CNT (PCB_BASE + 0x60) // Timer2 Count
#define T1CON (PCB_BASE + 0x5E) // Timer1 Mode/Control
#define T1CMPB (PCB_BASE + 0x5C) // Timer1 Max Count Compare B
#define T1CMPA (PCB_BASE + 0x5A) // Timer1 Max Count Compare A
#define T1CNT (PCB_BASE + 0x58) // Timer1 Count
#define T0CON (PCB_BASE + 0x56) // Timer0 Mode/Control
#define T0CMPB (PCB_BASE + 0x54) // Timer0 Max Count Compare B
#define T0CMPA (PCB_BASE + 0x52) // Timer0 Max Count Compare A
#define T0CNT (PCB_BASE + 0x50) // Timer0 Count
//
// Interrupt Registers
//
#define DMA3CON (PCB_BASE + 0x4A) // DMA3 Interrupt Control
#define DMA2CON (PCB_BASE + 0x48) // DMA2 Interrupt Control
#define I5CON (PCB_BASE + 0x46) // INT5 Interrupt Control
#define SP0CON (PCB_BASE + 0x44) // Serial Port0 Interrupt Ctl.
#define SP1CON (PCB_BASE + 0x42) // Serial Port1 Interrupt Ctl.
#define I4CON (PCB_BASE + 0x40) // INT4 Interrupt Control
#define I3CON (PCB_BASE + 0x3E) // INT3 Interrupt Control
#define I2CON (PCB_BASE + 0x3C) // INT2 Interrupt Control
#define I1CON (PCB_BASE + 0x3A) // INT1 Interrupt Control
#define I0CON (PCB_BASE + 0x38) // INT0 Interrupt Control
#define DMA1CON (PCB_BASE + 0x36) // DMA1 Interrupt Control
#define DMA0CON (PCB_BASE + 0x34) // DMA0 Interrupt Control
#define TCUCON (PCB_BASE + 0x32) // Timer Interrupt Control
#define INTSTS (PCB_BASE + 0x30) // Interrupt Status
#define REQST (PCB_BASE + 0x2E) // Interrupt Request
#define INSERV (PCB_BASE + 0x2C) // Interrupt In-Service
#define PRIMSK (PCB_BASE + 0x2A) // Interrupt Priority Mask
#define IMASK (PCB_BASE + 0x28) // Interrupt Mask
#define POLLST (PCB_BASE + 0x26) // Interrupt Poll Status
#define POLL (PCB_BASE + 0x24) // Interrupt Poll
#define EOI (PCB_BASE + 0x22) // End-Of-Interrupt
#define INTVEC (PCB_BASE + 0x20) // Interrupt Vector
//
// Serial Port1 Registers (NOT available in HW)
//
//#define SP1BAUD (PCB_BASE + 0x18) // Serial Port1 Baud Rate Div.
//#define SP1RD (PCB_BASE + 0x16) // Serial Port1 Receive
//#define SP1TD (PCB_BASE + 0x14) // Serial Port1 Transmit
//#define SP1STS (PCB_BASE + 0x12) // Serial Port1 Status
//#define SP1CT (PCB_BASE + 0x10) // Serial Port1 Control
//******************************************************************************
// PCB (Periferal Control Block) Register Bit Definitions
//******************************************************************************
// SP0CT Serial Port0 Control (PCB_BASE + 0x80)
// SP1CT Serial Port1 Control (PCB_BASE + 0x10)
//DataMode BIT0 // Bit0 of DataMode
//DataMode BIT1 // Bit1 of DataMode
//DataMode BIT2 // Bit2 of DataMode
#define PE BIT3 // Parity Enable
#define EVN BIT4 // Even Parity
#define RMODE BIT5 // Receive Mode
#define TMODE BIT6 // Transmit Mode
#define RXIE BIT7 // Receive Data Ready Interrupt Enable
#define TXIE BIT8 // Transmitter Ready Interrupt Enable
#define FC BIT9 // Flow Control Enable
#define TB8 BIT10 // Transmit Bit 8
#define BRK BIT11 // Send Break
#define RSIE BIT12 // Receive Status Enable
//DMA BIT13 // DMA Control Bit 0
//DMA BIT14 // DMA Control Bit 1
//DMA BIT15 // DMA Control Bit 2
// Serial Port Mode settings
#define DATAMODE1 1 // Mode1: 7 or 8 bits; 1 or 0 parity bits; 1 stop bit
#define DATAMODE2 2 // Mode2: 9 bits ; N/A ; 1 stop bit
#define DATAMODE3 3 // Mode3: 8 or 9 bits; 1 or 0 parity bits; 1 stop bit
#define DATAMODE4 4 // Mode4: 7 bits ; N/A ; 1 stop bit
// DMA operation
#define RxNoDMATxNoDMA 0x0000 // Receive: NoDMA; Transmit: NoDMA
#define RxDMA0TxDMA1 0x2000 // Receive: DMA0 ; Transmit: DMA1
#define RxDMA1TxDMA0 0x4000 // Receive: DMA1 ; Transmit: DMA0
#define RxDMA0TxNoDMA 0x8000 // Receive: DMA0 ; Transmit: NoDMA
#define RxDMA1TxNoDMA 0xA000 // Receive: DMA1 ; Transmit: NoDMA
#define RxNoDMATxDMA0 0xC000 // Receive: NoDMA; Transmit: DMA0
#define RXNoDMATxDMA1 0xE000 // Receive: NoDMA; Transmit: DMA1
// SP0STS Serial Port0 Status Register (PCB_BASE + 0x82)
// SP1STS Serial Port1 Status Register (PCB_BASE + 0x12)
#define HSO BIT1 // Handshake Signal 0
#define TEMT BIT2 // Transmitter Empty
#define PER BIT3 // Parity Error Detected
#define OER BIT4 // Overrun Error Detected
#define FER BIT5 // Framing Error Detected
#define THRE BIT6 // Transmit Holding Register Empty
#define RDR BIT7 // Receive Data Ready
#define RB8 BIT8 // Received Bit 8
#define BRK0 BIT9 // Short Break Detected
#define BRK1 BIT10 // Long Break Detected
//Reserved BIT11 //
//Reserved BIT12 //
//Reserved BIT13 //
//Reserved BIT14 //
//Reserved BIT15 //
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -