📄 spitest.c
字号:
Proc1, Proc3, Proc5, Proc2, Proc4, Proc6,
Proc3, Proc5, Proc2, Proc4, Proc6, Proc1,
Proc5, Proc2, Proc4, Proc6, Proc1, Proc3,
Proc2, Proc4, Proc6, Proc1, Proc3, Proc5,
Proc6, Proc1, Proc3, Proc5, Proc2, Proc4,
0 //end of list deliminator
};
void near Test2(void)
{
void (near *procptr)(void);
WORD index =0;
#pragma option -w-pia // suppress "possibly incorrect assigment" warning for next statement
while(procptr = proclist[index++])
#pragma option -w
{
gm_SetRegBitsByte( INPUT_STATUS, SPI_EXCH_FLAG);
procptr();
cacheMissed += gm_ReadRegByte(INPUT_STATUS) & SPI_EXCH_FLAG;
}
}
// marker so we can use map file to determine size of Test2
void Test2End(void)
{}
void near T3proc1 (void)
{
eightNops() \
eightNops() \
eightNops()
}
void near T3proc2 (void)
{
eightNops() \
eightNops() \
eightNops()
}
void near T3proc3 (void)
{
eightNops() \
eightNops() \
eightNops()
}
void near T3proc4 (void)
{
eightNops() \
eightNops() \
eightNops()
}
void near T3proc5 (void)
{
eightNops() \
eightNops() \
eightNops()
}
void near T3proc6 (void)
{
eightNops() \
eightNops() \
eightNops()
}
void (near *proclist2[])(void) =
{
T3proc6, T3proc5, T3proc4, T3proc3,T3proc2,T3proc1,
T3proc6, T3proc5, T3proc4, T3proc3,T3proc2,T3proc1,
T3proc6, T3proc5, T3proc4, T3proc3,T3proc2,T3proc1,
T3proc6, T3proc5, T3proc4, T3proc3,T3proc2,T3proc1,
T3proc6, T3proc5, T3proc4, T3proc3,T3proc2,T3proc1,
T3proc6, T3proc5, T3proc4, T3proc3,T3proc2,T3proc1,
T3proc6, T3proc5, T3proc4, T3proc3,T3proc2,T3proc1,
T3proc6, T3proc5, T3proc4, T3proc3,T3proc2,T3proc1,
T3proc6, T3proc5, T3proc4, T3proc3,T3proc2,T3proc1,
T3proc6, T3proc5, T3proc4, T3proc3,T3proc2,T3proc1,
0 //end of list deliminator
};
// test of overlapping procedures
void near Test3(void)
{
void (near *procptr)(void);
WORD index =0;
#pragma option -w-pia // suppress "possibly incorrect assigment" warning for next statement
while(procptr = proclist2[index++])
#pragma option -w
{
gm_SetRegBitsByte( INPUT_STATUS, SPI_EXCH_FLAG);
procptr();
cacheMissed += gm_ReadRegByte(INPUT_STATUS) & SPI_EXCH_FLAG;
}
}
// marker so we can use map file to determine size of Test3
void Test3End(void)
{}
//
// data for test4 should be in SPI rom
//
#if 1
BYTE ROM pROM_array[] =
{
0,1,2,3,4,5,6,7,8,9,
10,11,12,13,14,15,16,17,18,19,
20,21,22,23,24,25,26,27,28,29,
30,31,32,33,34,35,36,37,38,39,
40,41,42,43,44,45,46,47,48,49,
50,51,52,53,54,55,56,57,58,59,
60,61,62,63,64,65,66,67,68,69,
70,71,72,73,74,75,76,77,78,79,
80,81,82,83,84,85,86,87,88,89,
90,91,92,93,94,95,96,97,98,99,
100,101,102,103,104,105,106,107,108,109,
110,111,112,113,114,115,116,117,118,119,
120,121,122,123,124,125,126,127,128,129,
130,131,132,133,134,135,136,137,138,139,
140,141,142,143,144,145,146,147,148,149,
};
//
// test of program mode changing
// this code must be moved and executed from RAM
//
BYTE ramFunction[300]; // place to store Test4 in RAM
BYTE spiStatus;
WORD far Test4 (void)
{
WORD i;
WORD uiCurrent_wrd;
WORD ucError;
ucError = 0;
for (i = 0; i < (sizeof(pROM_array) - 1); i++)
{
uiCurrent_wrd = pROM_array[i];
// Then enable program mode
gm_SetRegBitsByte(SPI_CONTROL, SPI_PROGRAM_EN);
// Read flash status
gm_SetRegBitsByte(SPI_CONTROL, FLASH_CHIP_SEL); // assert CS to signal start of new command
gmi_WriteSPIByte(0x5); // send read status command
spiStatus = gmi_ReadSPIByte(); // get results
gm_ClearRegBitsByte(SPI_CONTROL, FLASH_CHIP_SEL); // deassert CS to signal start of new command
// Reurn to previous mode
gm_ClearRegBitsByte(SPI_CONTROL, SPI_PROGRAM_EN);
if ( (pROM_array[i+1] - uiCurrent_wrd) != 1 )
{
ucError = 1;
}
}
return ucError;
}
//
// procedure to reset LRU
//
//This command should be RAM procedure which analyze SPI busy signal until
// it is logical one and then enable program mode,
//several nops and then disable program mode and then exit from the procedure.
//This procedure must not change cache mode. This procedure is needed for me to reset LRU.
WORD far Test5 (void)
{
#ifdef PHOENIX
while(gm_ReadRegByte(SPI_STATUS ) & SPI_BUSY); //wait without timeout (as this is a appstest function)
// Then enable program mode
gm_SetRegBitsByte(SPI_CONTROL, SPI_PROGRAM_EN);
asm nop;
asm nop;
gm_ClearRegBitsByte(SPI_CONTROL, SPI_PROGRAM_EN);
return 1;
#else
gm_Print("Test 5 not availble on this chip",0); //BECAUSE SPI_BUSY not defined
return 0;
#endif
}
void markEndTest4(void) {}
#endif
//
// Invoke various tests (called from appstest
//
#if 1
void far spiTest(WORD testSel)
{
DWORD starttime;
WORD iteration;
WORD time;
// fist do test1
gm_Delay10ms(20);
gm_Print("spi test selected %d",testSel);
if (testSel == 0)
{
gm_Print("appstest 58 1 for 400 byte loop test",0);
gm_Print("appstest 58 2 to invoke 6 different procedure test",0);
gm_Print("appstest 58 3 to invoke reverse orde contiguous proc test",0);
gm_Print("appstest 58 4 to test switching from normal to register access mode",0);
gm_Print("appstest 58 5 to reset LRU",0);
gm_Print("appstest 58 255 to invoke test 1-4",0);
gm_Print("appstest 58 254 to invoke different size large loop tests (simular to test1)",0);
return;
}
if ((testSel == 1) || (testSel == 255) || (testSel == 254))
{
msg(" ",0);
msg("Starting Test 1 (loop size 400)",0);
msg("test 1 will invoke a function that runs a 400 byte loop 100 times",0);
msg("To pass, cacheMissed should be no greater than 3",0);
// for (iteration = 0; iteration < 10; iteration++)
{
starttime = gm_ReadSystemTime();
test1();
time = (WORD) (gm_ReadSystemTime() - starttime);
msg("400 loop timer = %d",time);
msg("cache misses %d",cacheMissed/128) ;
cacheMissed = 0;
}
}
if (testSel == 254) // test variouse combinations of loop sizes
{
// for (iteration = 0; iteration < 10; iteration++)
{
starttime = gm_ReadSystemTime();
nop341();
time = (WORD) (gm_ReadSystemTime() - starttime);
msg("341 loop timer = %d",time);
msg("cache misses %d",cacheMissed/128) ;
cacheMissed = 0;
}
// for (iteration = 0; iteration < 10; iteration++)
{
starttime = gm_ReadSystemTime();
nop342();
time = (WORD) (gm_ReadSystemTime() - starttime);
msg("342 loop timer = %d",time);
msg("cache misses %d",cacheMissed/128) ;
cacheMissed = 0;
}
// for (iteration = 0; iteration < 10; iteration++)
{
starttime = gm_ReadSystemTime();
nop343();
time = (WORD) (gm_ReadSystemTime() - starttime);
msg("343 loop timer = %d",time);
msg("cache misses %d",cacheMissed/128) ;
cacheMissed = 0;
}
#if 1
// for (iteration = 0; iteration < 10; iteration++)
{
starttime = gm_ReadSystemTime();
nop344();
time = (WORD) (gm_ReadSystemTime() - starttime);
msg("344 loop timer = %d",time);
msg("cache misses %d",cacheMissed/128) ;
cacheMissed = 0;
}
// for (iteration = 0; iteration < 10; iteration++)
{
starttime = gm_ReadSystemTime();
nop345();
time = (WORD) (gm_ReadSystemTime() - starttime);
msg("345 loop timer = %d",time);
msg("cache misses %d",cacheMissed/128) ;
cacheMissed = 0;
}
// for (iteration = 0; iteration < 10; iteration++)
{
starttime = gm_ReadSystemTime();
nop346();
time = (WORD) (gm_ReadSystemTime() - starttime);
msg("346 loop timer = %d",time);
msg("cache misses %d",cacheMissed/128) ;
cacheMissed = 0;
}
// for (iteration = 0; iteration < 10; iteration++)
{
starttime = gm_ReadSystemTime();
nop347();
time = (WORD) (gm_ReadSystemTime() - starttime);
msg("347 loop timer = %d",time);
msg("cache misses %d",cacheMissed/128) ;
cacheMissed = 0;
}
#endif
}
if ((testSel == 2) || (testSel == 255))
{
msg(" ",0);
msg("Starting Test 2 (execution of different procedures)",0);
msg("This test will invoke 6 differnt procedures of length 52 bytes",0);
msg("in different orders from a common procedure",0);
msg("Test passed is indicated by cacheMissed being no greater than 7 (1 miss per initial call of each procedure)",0);
for (iteration = 0; iteration < 10; iteration++)
{
starttime = gm_ReadSystemTime();
Test2();
time = (WORD) (gm_ReadSystemTime() - starttime);
msg("loop timer = %d",time);
msg("cache misses %d",cacheMissed/128) ;
cacheMissed = 0;
}
}
if ((testSel == 3) || (testSel == 255 ))
{
msg(" ",0);
msg("Starting Test 3 (executin of contiguous procedures in reverse order",0);
msg("same pass indication as test2",0);
for (iteration = 0; iteration < 10; iteration++)
{
starttime = gm_ReadSystemTime();
Test3();
time = (WORD) (gm_ReadSystemTime() - starttime);
msg("loop timer = %d",time);
msg("cache misses %d",cacheMissed/128) ;
cacheMissed = 0;
}
}
// test 4, first copy routine to ram
if ((testSel == 4) || (testSel == 255 ))
{
msg(" ",0);
gm_Print("Starting test 4",0);
_fmemcpy(ramFunction,Test4,sizeof(ramFunction));
{
WORD (*test4ptr)(void);
WORD ucError;
test4ptr = (WORD (*)(void))ramFunction;
ucError = test4ptr();
if (ucError)
{
gm_Print("test 4 failed, status = 0x%x",spiStatus);
}
else
{
gm_Print("test 4 passed, spi status = 0x%x",spiStatus);
}
}
}
// test 4, first copy routine to ram
if ((testSel == 5) )
{
msg(" ",0);
gm_Print("Starting test 5",0);
gm_Print("Waiting for spi busy and return",0);
_fmemcpy(ramFunction,Test5,sizeof(ramFunction));
{
WORD (*test5ptr)(void);
WORD ucError;
test5ptr = (WORD (*)(void))ramFunction;
ucError = test5ptr();
gm_Print("test 5 completed",ucError);
}
}
}
void markendspiTest(void)
{
}
#endif
#endif //ENABLE_CACHE_APPSTEST
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