signature_u.asm

GM5621原代码

;/*
;	$Workfile:   signature_u.asm  $
;	$Revision:   1.0  $
;	$Date:   Dec 01 2005 02:39:46  $
;*/
;//******************************************************************************
;//
;//              Copyright (C) 2003.  GENESIS MICROCHIP INC.
;//      All rights reserved.  No part of this program may be reproduced.
;//
;//     Genesis Microchip Inc., 2150 Gold St
;//     Alviso, CA 95002 
;//	   USA
;//
;//==============================================================================
;//
;// MODULE:      Bootup.asm
;//
;// USAGE:       1) This module contains bootup code for XROM.
;//              	The Boot code address is 0x8010:0000.
;//                 The signature is at 0x8000:00F0
;//
;//******************************************************************************

.186

;If we are using Atmel Dataflashes (45DB series) on the board, make sure
;to enable TCLK in the Flags. This is due to an IROM bug (PDR# 8960) which
;erroneously sets up SPI clock divisor to 2 instead of 9. So, if FCLK is
;enabled, the OCM clock will be set to (FCLK / 2), which could be 50 MHz,
;if FCLK is 100 MHz. This is way above the spec of 20 MHz for the SPI
;clock for Atmel Dataflash. Just comment out the first line and uncomment
;the second line for Atmel Dataflashes. This bug is in silicon Rev AA. It
;will be fixed in the next tapeout.

FLAGS 	EQU 00h		;Use this flag for standard flashes (default)
;FLAGS	EQU 02h		;Use this flag for Atmel Dataflashes (AT45DB series)


;//******************************************************************************
;//  E X T E R N A L    F U N C T I O N S
;//******************************************************************************
extrn __startup:far

;//******************************************************************************
;//*  C O D E
;//******************************************************************************
;;;
;;; Define the _SIGNATURE_SEGMENT 
;;;    typedef struct xromconfig_struct
;{
;	BYTE  MainJmp[5];  // jump to main external rom startup code
;	BYTE  flags;       // bit 0 if non-zero, IROM should crc check main code
;							 // bit 1 if non-zero TCLK should be used instead of FCLK
;  BYTE pad1[2];
;	DWORD CodeCrc;     // crc of code, crc of code data region (starting immediatly after configuration table
;							 // and ending at end of flash (determine by flashsize
;	DWORD FlashSize;   // size in bytes of flash device
;	ROM BYTE *FlashStart;  // address of first byte to be checksummed.  This along with FlashSize
;							 // allows some sectors to be reserved for nvram storage (which is not checksummed)
;	BYTE fw_major;     // major relese number of application (1 or 1.23.156)
;	BYTE fw_minor;     // minor release number (23 of 1.23.156)
;	BYTE fw_build;     // build number (156 of 1.23.156)
;  BYTE pad;
;	DWORD signature;
;	DWORD ConfigCrc;   // crc of configuration data
;} xromconfig_t;


_SIGNATURE_SEG	segment para public 'SIGNATURE_SEGMENT'
	public __signature
__signature label far

		jmp __startup
		db   FLAGS     ;// Flags
		dw   0h        ;// pad1[2]
		dd	  0h 			;// Crc
		dd	  00020000h 	;// FlashSize
		dd   000000h   ;// *FlashStart
		db	  0h			;// fw_major
		db   0h 			;// fw_minor
		db   1h        ;// fw_build
		db   0h        ;// pad
		dd	  4D4F5275h ;// 70 signature
		dd   0h;			;// crc of config data.
_SIGNATURE_SEG 	ends

end __signature



;//*********************************  END  **************************************