register_56xx.h

GM5621原代码

	#define BP_IRQ                                BIT7

	// SYSTEM_STATUS                              (0x800F)
	#define IP_ODD_STATUS                         BIT2
	#define IFM_IRQ                               BIT3
	#define INPUT_IRQ                             BIT4
	#define DISPLAY_IRQ                           BIT5
	#define CLOCK_IRQ                             BIT6

	// IFM_STATUS                                 (0x8010)
	#define NO_HS                                 BIT0
	#define NO_VS                                 BIT1
	#define HS_PERIOD_ERR                         BIT2
	#define VS_PERIOD_ERR                         BIT3
	#define DVI_DE_WIDTH_ERR                      BIT4
	#define BP_IRQ_FLAG                           BIT5
	#define VS_HS_CLOSE_ERR_FLAG                  BIT6
	#define INTLC_ERR                             BIT7

	// INPUT_STATUS                               (0x8011)
	#define IP_ACTIVE                             BIT0
	#define IP_VBLANK                             BIT1
	#define IP_LINEFLAG                           BIT2
	#define INPUT_VS                              BIT3
	#define LBW_ADC_RDY                           BIT4
	#define DDC2BI_IRQ                            BIT6
	#define SPI_EXCH_FLAG                         BIT7

	// DISPLAY_STATUS                             (0x8012)
	#define D_ACTIVE                              BIT0
	#define D_VBLANK                              BIT1
	#define D_LINEFLAG                            BIT2
	#define D_VS_FLAG                             BIT3
	#define D_VS_LEVEL                            BIT4
	#define D_VACTIVE                             BIT5
	#define AFR_ACTIVE_FLAG                       BIT6
	#define AFR_ACTIVE		                      BIT6
	#define BUFFER_OVERRUN                        BIT7

	// CLOCK_STATUS                               (0x8013)
	#define SRC_NOCLK                             BIT0
	#define SRC_CLKERR                            BIT1
	#define SDDS_OPENLOOP                         BIT2
	#define DDDS_OPENLOOP                         BIT3
	#define CLKMEAS_OFLOW                         BIT4
	#define SRC_NOCLK                             BIT0

	// MISC_STATUS                                (0x8014)
	#define IP_VS                                 BIT0
	#define IP_VACTIVE                            BIT1
	#define ADC_CAL                               BIT2

	// RCLK_CONFIG                                (0x8016)
	#define RCLK_POWER_DN                         BIT3
	#define RCLK_RESET                            BIT4

	// RCLK_FREQUENCY                             (0x8017)
	#define RCLK_N                                0X1F
	#define RCLK_M                                0X60

	// RCLK_PLL                                   (0x8018)
	#define RCLK_BW_4M                            BIT0
	#define RCLK_BW_H                             BIT1
	#define RCLK_BW_TRACK                         BIT2
	#define SEL_CLK2                              BIT3
	#define AGCON                                 BIT5
	#define OSCI                                  BIT6

	// OCM_BUS_CONTROL                            (0x8020)
	#define ENABLE_WDT                            BIT0
	#define EN_WDT_INTERRUPT                      BIT1
	#define OCM_RAM_CTRL                          0X0C

	// OCM_BUS_WDT_INIT                           (0x8022)
	#define OCM_WDT_INIT                          0XFF

	// OCM_BUS_WDT_STATUS                         (0x8023)
	#define TRANSACTION_ERR                       BIT0

	// OCM_CONTROL                                (0x8027)
	#define OCM_RESET                             BIT0
	#define OCM_UART_EN                           BIT1
	#define OCM_UART_PIN_SEL                      BIT2
	#define INT_ROM_EN                            BIT4

	// SPI_CONTROL                                (0x802A)
	#define SPI_CPHA                              BIT0
	#define SPI_CLK_INV                           BIT1
	#define SPI_BYTE_EX                           BIT2
	#define SPI_PROGRAM_EN                        BIT3
	#define SPI_CLK_SEL                           0X70
	#define FLASH_CHIP_SEL                        BIT7

	// SPI_STATUS                                 (0x802B)
	#define SPI_EXCH_ACTIVE                       BIT0
	#define SPI_WRITE_ERROR                       BIT1
	#define SPI_BUSY                              BIT2
	#define SPI_ATMEL_ROM                         BIT3

	// SPI_CACHE_CTRL                             (0x802E)
	#define SPI_CACHE_EN                          BIT0
	#define SPI_FAST_READ_EN                      BIT1

	// PWM0_CONFIG                                (0x8030)
	#define PWM0_GPO_EN                           BIT0
	#define PWM0_CLKSEL                           BIT1
	#define PWM0_PRESCALE                         0X0C
	#define PWM0_VSRESET                          BIT4
	#define PWM0_10BIT_PULSE                      BIT5
	#define PWM0_TCLK_DIV                         BIT6

	// PWM1_CONFIG                                (0x8033)
	#define PWM1_GPIO_EN                          BIT0
	#define PWM1_CLKSEL                           BIT1
	#define PWM1_PRESCALE                         0X0C
	#define PWM1_VSRESET                          BIT4
	#define PWM1_10BIT_PULSE                      BIT5
	#define PWM1_TCLK_DIV                         BIT6

	// GPIO_DIRCTRL1                              (0x803C)
	#define GPIO0_IO                              BIT0
	#define GPIO1_IO                              BIT1
	#define GPIO2_IO                              BIT2
	#define GPIO3_IO                              BIT3
	#define GPIO4_IO                              BIT4
	#define GPIO5_IO                              BIT5
	#define GPIO6_IO                              BIT6

	// GPO_OPENDRAIN_EN1                          (0x803D)
	#define GPIO0_OD                              BIT0
	#define GPIO1_OD                              BIT1
	#define GPIO2_OD                              BIT2
	#define GPIO3_OD                              BIT3
	#define GPIO4_OD                              BIT4
	#define GPIO5_OD                              BIT5
	#define GPIO6_OD                              BIT6

	// GPINPUT1                                   (0x803E)
	#define GPIO0_IN                              BIT0
	#define GPIO1_IN                              BIT1
	#define GPIO2_IN                              BIT2
	#define GPIO3_IN                              BIT3
	#define GPIO4_IN                              BIT4
	#define GPIO5_IN                              BIT5
	#define GPIO6_IN                              BIT6

	// GPOUTPUT1                                  (0x803F)
	#define GPIO0_OUT                             BIT0
	#define GPIO1_OUT                             BIT1
	#define GPIO2_OUT                             BIT2
	#define GPIO3_OUT                             BIT3
	#define GPIO4_OUT                             BIT4
	#define GPIO5_OUT                             BIT5
	#define GPIO6_OUT                             BIT6

	// GPO_OUTPUT                                 (0x8040)
	#define GPO0_OUT                              BIT0
	#define GPO1_OUT                              BIT1
	#define GPO2_OUT                              BIT2
	#define GPO3_OUT                              BIT3
	#define GPO4_OUT                              BIT4
	#define GPO5_OUT                              BIT5

	// GPO_OPENDRAIN_EN                           (0x8041)
	#define GPO0_OD                               BIT0
	#define GPO1_OD                               BIT1
	#define GPO2_OD                               BIT2
	#define GPO3_OD                               BIT3
	#define GPO4_OD                               BIT4
	#define GPO5_OD                               BIT5

	// GPINPUT                                    (0x8042)
	#define GPO2_IN                               BIT2

	// LOW_BW_ADC_CTRL                            (0x8048)
	#define LBADC_START_CONV                      BIT0
	#define LBADC_EN                              BIT1
	#define LBADC_INPUT_SEL                       0X0C
	#define LBADC_INPUT_SEL_SHIFT                 2
	#define LBADC_CLKDIV                          0X60

	// LOW_BW_ADC_RESULT                          (0x8049)
	#define LBADC_RD_DATA                         0XFF

	// LOW_BW_ADC_STATUS                          (0x804A)
	#define LBADC_CONV_DONE                       BIT0

	// ADC_CONTROL                                (0x8060)
	#define SOG_SENS                              0X03
	#define SOG_EN                                BIT2
	#define AC_COUPLE_EN                          BIT3
	#define CLAMP_EN                              BIT4
	#define SYNCTIP_EN                            BIT5
	#define ADC_ENABLE                            BIT6
	#define PD_ADC                                BIT7
	#define SOG_SENS_MASK                         0x03
	#define SOG_SENS_SHIFT                        0

	// ADC_SYNC_LEVEL                             (0x8063)
	#define ADC_SYNC_L_H_THRSH                    BIT0
	#define ADC_SYNC_H_L_THRSH                    BIT2
	#define ADC_SYNC_L_H_SHIFT                    0
	#define ADC_SYNC_H_L_SHIFT                    2

	// ADC_FAS1                                   (0x8064)
	#define AMP1_OSADJ                            BIT4
	#define ADC_REFADJ                            0X03
	#define MSB_CLMP                              BIT2
	#define LOCK_MSB                              BIT3
	#define ACLK_INV                              BIT5
	#define PDLL                                  0XC0

	// ADC_FAS2                                   (0x8065)
    #define I_OTHA                                BIT0
    #define I_ITHA                                BIT1
    #define VBG_IB                                BIT4
    #define I_MSB                                 BIT5
    #define I_LSB                                 BIT6
    #define DIS_DERC                              BIT7

	// ADC_TEST1                                  (0x8066)
   #define ADC_EQ										 	 0x7
   #define THREE_BIT_EQ

	// ADC_TEST2                                  (0x8067)
	#define I_BIAS                                0X03
	#define FS_ADJ1                               BIT2
	#define DIS_LSBCLK                            BIT3
	#define DIS_RACLK                             BIT4
	#define RST_DLL                               BIT5
	#define EXT_ACLK                              BIT6
	#define SOG_PULLUP                            BIT7

	// ADC_FLAGS                                  (0x806B)
	#define R_OVFL                                BIT0
	#define R_UNDFL                               BIT1
	#define G_OVFL                                BIT2
	#define G_UNDFL                               BIT3
	#define B_OVFL                                BIT4
	#define B_UNDFL                               BIT5