📄 57xx_options.h
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/*
$Workfile: 57xx_options.h $
$Revision: 1.18 $
$Date: Aug 23 2006 23:13:04 $
*/
//******************************************************************
//
// Copyright (C) 2002. GENESIS MICROCHIP INC.
// All rights reserved. No part of this program may be reproduced
//
// Genesis Microchip Corp., 2150 Gold Street
// Alviso, CA 95002 USA
// Genesis Microchip Inc., 165 Commerce Valley Dr. West
// Thornhill, Ontario, Canada, L3T 7V8
//
//================================================================
//
// MODULE: options.h
//
// USAGE : Header file that defines user option.
//
//******************************************************************
#ifndef _OPTIONS_H_
#define _OPTIONS_H_
#define MIN_INPUT_H_FREQ 149 // in 100Hz units (149 = 14.9KHz)
#define MAX_INPUT_H_FREQ 1710 // in 100Hz units
#define MIN_INPUT_V_FREQ 490 // in 0.1Hz units (499 = 49.9Hz)
#define MAX_INPUT_V_FREQ 1540 // allow 2x max panel freq. since can use Vsyn/2 mode.
// define the maximum input pixel clock that chip can support.
#define MAX_ADC_CLOCK 205 // in MHz for 57xx.
// For dual FIXED DCLK frequency support for EMI purpose.
#define USE_FIXED_DCLK 0 // Default is 0 to use SLOW DCLK. Change to 1 for FIXED DCLK.
//Note: the following FIXED_DCLK_FREQ_HI and FIXED_DCLK_FREQ_LO should
//be modified to match panel spec. for high and low clock.
// Dual fixed DCLKs: 76MHz or 66MHz.
#define FIXED_DCLK_FREQ_HI (DWORD)(76000000UL / PanelHeight * 10) // 76MHz for the high.
#define FIXED_DCLK_FREQ_LO (DWORD)(66000000UL / PanelHeight * 10) // 66MHz for the low.
#define IPHS_ActiveStart 8
#define IPVS_ActiveStart 4
// User Compile Options
#define DEBUG_MSG 1
// Choise of use gamma.
#define USE_GAMMA 0 // Note: when enabled, make sure valid Red/Green/Blue gamma tables are
// generated in gammatable.c file by WB or GCompress utility.
#define SUPPORT_VESA_CVT_MODES 1 // Support VESA CVT
// (Coordinated Video Timings) Modes
// Aging / Burn-in support with internal patterns.
#define USE_TEST_PATTERN 1 // Set to 1 will enable the Aging
// Note: # of patterns and pattern display time can be configured
// in testpattern.h file (PatternTransitionTime, MaxNoOfPatterns)
// Splash screen support.
#define USE_SPLASH_SCREEN 1 // Set to 1 will enable the Splash screen support.
// MODE HANDLER *********************
#define ENABLE_AUTOSCAN 1 // if sync lost modehandler will scan
// other inputs.
#define AUTO_ADJUST_ON_MODE_CHANGE 1 // perform auto adjust on each mode
// change when ModeDependent settings
// not found in NVRAM
#define SAVE_MODE_AFTER_AUTO_ADJ 1 // when 1 will save the mode settings
// to NVRAM after an Auto Adjust.
// Note: if both AUTO_ADJUST_ON_MODE_CHANGE and SAVE_MODE_AFTER_AUTO_ADJ
// are enabled, any mode not found in NVRAM will be saved automatically.
#define ALT_PWR_HANDLER_MTO_MESSAGE 0 // send MTO_MODE_CHANGE only when
// transitioning from gmd_HONVON and gmd_HOFFVOFF and
// send MTO_SYNC_SUSPEND and MTO_SYNC_STANDBY
// for inbetween states.
// HDCP *********************************************************************************************
#define HDCP_ENABLE_4TH 1 // include HDCP routines.
#define HDCP_KEYS_IN_NVRAM 0 // Place HDCP keys in NVRAM (not code)
#define HDCP_GENCRYPT_EN 1 // enables Genesis Gencrypt functionality.
#define HDCP_DDC_ADDR 0x3a // DDC (I2C) interface address
#define HDCP_USE_DVI_HOTPLUG 1 //
#define HDCP_SHOW_DEBUG_SIGNAL 0 // For debug purpose. Don't turn on for normal operation
#if HDCP_ENABLE_4TH && HDCP_SHOW_DEBUG_SIGNAL
//For HDCP Debug purpose, we need 2 GPO pins to indicate HDCP_BLOCK and DVI_BLOCK On/Off
//Here, re-write this portion based on what GPO pins will be used for the platform
//Usually, the LED control pin can be temporary used for the purpose.
#define Hdcp_Debug_Signal_Ctrl_Set() //Add here if necessary
#define Hdcp_Debug_Signal_HDCP_On() gm_SetRegBitsByte(GPO_OUTPUT, BIT0)
#define Hdcp_Debug_Signal_HDCP_Off() gm_ClearRegBitsByte(GPO_OUTPUT, BIT0)
#define Hdcp_Debug_Signal_DVI_On() gm_SetRegBitsByte(GPO_OUTPUT, BIT1)
#define Hdcp_Debug_Signal_DVI_Off() gm_ClearRegBitsByte(GPO_OUTPUT, BIT1)
#endif
// HDCP *********************************************************************************************
#define DEBUG_JTAG 0 // when set will disable Serial
// interrupts allowing JTAG debugging. when
// zero, UART interrupts will be enabled and
// GProbe will function properly. // debugging.
#define USE_OVERLAPPED_MODE 1
#define USE_CABLE_DETECTION_FEATURE 1 // Note: board should support Cable detection first.
#if USE_CABLE_DETECTION_FEATURE
#define CABLE_DETECT_RUNTIME 100 // run cable detect every 100ms.
#define USE_CABLE_DETECT_TIMER 1 //1: Use timer instead of read system time.
#endif
#define NVRAM_USE_FLASH 1 // store NVRAM contents in FLASH (not EEPROM)
// Note: when enable it, need to specify correct flash type
// in flash_hex.h file to match actual flash on board.
#define USING_PANEL_ARRAY 0 // 1- uses runtime panel parameters
// stored in PanelArray[]
// (see 52xx_panel.c)
// 0- panel parameters stored as
// #defines (see 52xx_panel.h)
#define DDCCI_CUSTOM_SUPPORT 0 // 1-add support for DDCCI commands
// 0-disable DDCCI.
#define USE_POWERDOWN_ROM_CE 0 // Define this to 1 to enable ROM power-down option
#define USE_NVRAM_INTEGRITY_CHECK 1 // Define it to 1 to enable NVRAM integrity check.
#define USE_DDC2BiPrint 0 // Define to 1 to enable print over ddc2bi (must have new version of Gprobe)
#define DDC2Bi_PORT 2 // Defines which port the DDC2Bi
// communication will be on.
// 0 - VGA
// 1 - DVI
// 2 to 255 -DDC2Bi follows active port.
// When changing ports, DDC2Bi comm
// will follow that port.
#define USE_ADC_CALIBRATION_ISR 0 // Performs ADC offset calibration
// during V Blanking interval.
#define USE_VEDID 0 // VEDID handler will be used. Enable VEDID interrupt.
//#define ENABLE_CACHE_APPSTEST // enables code in spitest.c to be invoked by apptest command
#define FAST_FLASH_PAGE_UPDATE 1 // 1: Enable faster flash update for page-write type of flashes.
#define SEL_DE_CHG_THRESH DE_CHG_THRESH_0 // or 4, 16, 64 // #PDR14327, Add DVI DE change threshold level (DE_CHG_THRESH)
// for DVI DE jitter issue (Default 0)
#define USE_FLASHSPEED_AUTODETECT 1 // This is a limited version to set optimal SPI clock speed according to flash
// type when AutoDetection is enabled. Two factors will affect whether this option is appropriate or not,
// 1)a flash with the same chipID may have different speed;
// 2)some flashes does not support auto chip detection;
// so it is up to system builder to check how this mechanism should be used.
// Our code example shows the usage for two flash types only.
#define USE_1K_SECTOR 0 // only available for new PMC serial flash
#define While_Loop_Test 0 // While loop time test
#define Enable_AOC 1 // 1: Enable ADC auto adjustment of Offset. 0: Disable. Louis 0622
#define Enable_BrownOut 0 // 1: Enable Brown-Out function ; 0: Disable Brown-Out function Louis 0307
#define BrownOutLevel BROWN_OUT_27 // _30 // Brown-out level _27 for 2.7V, _30 for 3.0V
#define THEFT_DETERRENCE_SUPPORT 0 // 1- enable theft dererrece support, 0 -disable theft deterrence support
#define ENSURE_SYSTEMTIME 1 // 1 - enable for ensure systemtime reading
#define Support_UXGA 1 // 1125, Support 1600 x 1200 timing ... RCLK to 230 MHz, LCLK to 220 MHz
#define USE_SMT 0// 1 // SMT
#define UART_OFF 0 // UART function, 0 - enabled, 1 - disabled
#define UART_PORT 2 // UART port select, 0 - DDC, 1 - GPO, 2 - AUTO
#define USE_TTL_PANEL 0 // TTL panel function disable/enable, 0 - disabled, 1 - enabled
//******************************************************************
// This section controls Pixel Cruncher Options.
//******************************************************************
//#define USE_PIXEL_CRUNCHER // enable/disable all Pixel Cruncher functions
#ifdef USE_PIXEL_CRUNCHER
#define USE_PIXCR_AUTOPOSITION
#define USE_PIXCR_AUTOCOLORBALANCE
#define USE_PIXCR_DEMO
//#define USE_PIXCR_DATAINVIDEO //@@@ cannot use with the others.
#endif
//#define USE_LINEAR_LIGHTNESS // each digital step has the same perceived luminance
#define USE_3x3Matrix_FOR_SATURATION 1 // 1 - enable software work around for ACM3D
#define REMOVE_APPSTEST 1 // 1 - remove appstest codes
#define UPDATE_BW_BY_MODE 1 // 1 - Update ADC Bandwidth based input mode frequence
#define LINE_BUFFER_OVERRUN_CHECK 1 // 1 - Line Buffer over run check
#if LINE_BUFFER_OVERRUN_CHECK
#define TWO_TAPS_COEFF 2
#endif
#define UN_SAVE_VFSTART BIT15
#define NO_VALID_VFSTART BIT14
#endif
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