📄 57xx_board.h
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/*
$Workfile: 57xx_board.h $
$Revision: 1.10 $
$Date: Aug 24 2006 21:25:24 $
*/
//******************************************************************
//
// Copyright (C) 2002. GENESIS MICROCHIP INC.
// All rights reserved. No part of this program may be reproduced
//
// Genesis Microchip Corp., 2150 Gold Street
// Alviso, CA 95002 USA
// Genesis Microchip Inc., 165 Commerce Valley Dr. West
// Thornhill, Ontario, Canada, L3T 7V8
//
//================================================================
//
// MODULE: 57xx_board.h
//
// USAGE : gm57xx board configuration
//
//******************************************************************
#ifndef __57XX_BOARD_H__
#define __57XX_BOARD_H__
#define EV_BD_57XX 1
#define RD1_57XX 2
#define RD3_57XX 3
#define EV_BD_B_57XX 4
/***************************************************************************/
/* Assign value to BOARD - To customize the Software to be Board Specific */
/***************************************************************************/
#ifdef __EV_BD_57XX__
#define BOARD EV_BD_57XX
#elif defined(__RD1_57XX__)
#define BOARD RD1_57XX
#elif defined(__RD3_57XX__)
#define BOARD RD3_57XX
#elif defined(__EV_BD_B_57XX__)
#define BOARD EV_BD_B_57XX
#else
/***************************************************************************************************/
/*Note: BOARD definition is moved to Paradigm Compiler from version V1.7RC2 as above. */
/***************************************************************************************************/
#define BOARD EV_BD_57XX //
//#define BOARD RD1_57XX //
//#define BOARD RD3_57XX //
//#define BOARD EV_BD_B_57XX //
/***************************************************************************************************/
#endif
//******************************************************************
// BOARD SPECIFIC DEFINITIONS:
//******************************************************************
#if Support_UXGA
#define RCLK_MHZ 230UL // expected Rclk in MHZ
#else
#define RCLK_MHZ 200UL // expected Rclk in MHZ
#endif
#define INIT_SCLK_MHZ 80
#define INIT_DCLK_MHZ 68 // 65
#define SDDS_INIT_FREQ_VAL (((long)INIT_SCLK_MHZ * 4096 * 4096) / RCLK_MHZ)
#define DDDS_INIT_FREQ_VAL (((long)INIT_DCLK_MHZ * 4096 * 4096) / RCLK_MHZ)
//******************************************************************
// Polarity identification definition for GPIO signals
//******************************************************************
#define POS_POL 0
#define NEG_POL 1
//******************************************************************
// EV BOARD
//******************************************************************
#if defined(EV_BD_57XX) && ( BOARD == EV_BD_57XX )
#define CPU_CLK_KHZ 100000UL // in KHz
#define CPU_SPEED 1
#define T_CLK_KHZ 14318
#if Support_UXGA
#define LCLK_MHZ 220UL // Set to 10% above maximum input frequency.
#else
#define LCLK_MHZ 170UL // Set to 10% above maximum input frequency.
#endif
#define FLASH_SPEED_NS 90 // 90ns.
#define I2C_SPEED 400 // 100KHz or 400KHz.
#define OCM_CLK_PWRDOWN_KHZ T_CLK_KHZ
#define RCLK_PLL_VAL (RCLK_MHZ * 1000 / T_CLK_KHZ) - 1 // 15 // RCLK = (15+1) * 14.318 MHz
#define FCLK_FREQ_VAL ((CPU_CLK_KHZ / 1000UL) * 65536 ) / RCLK_MHZ
#define LED_POL POS_POL
// KEYPAD ***************************
#define PORT_ADC_1_USED // Define for LBADC Keypad...
#define GPIOKEYPAD_ALLOWED 0 //PDR 10590, add options for GPIO_Key
// GPIO Keypad settings
#define KeyPolarity 0 // polarity for GPIO keypad.
// LBADC Keypad settings.
#define AdcPolarity 0 // polarity for LBADC keypad.
// Brightness control
#define PWM0_BRIGHTNESS 1 // Use PWM for brightness control
#define BRIGHTNESS_PWM_PORT PWM0_PULSE // address of PWM to use (see register.h)
#if USE_VPORT
#define LED_RED BIT0 // In EV_BOARD revA, LED_RED and SAA7119 "CE"
// are connected to the same pin. So, if VPORT is enalbe,
// We must remove LED_RED to the other GPIO.
// Just temporally move it to BIT0.
#else
#define LED_RED BIT1
#endif
#define LED_GREEN BIT0
#define LED_ORANGE LED_GREEN | LED_RED
#define LED_MASK LED_GREEN | LED_RED | LED_ORANGE
//** GPIO MASKS **************************************
#define GPO_ODEN 0x00
//** GPIO1 is only available if not using TCON pins.
#if (NVRAM_USE_FLASH == 0)
// When not using FLASH to store NVRAM data, must configure GPIO lines
// for I2C FLASH device.
#define NVRAM_GPIO_SCL 0 //GPIO_0
#define NVRAM_GPIO_SDA 1 //GPIO_1
#define NVRAM_GPIO_SCL_MASK BIT0
#define NVRAM_GPIO_SDA_MASK BIT1
#define GPIO1_OUT_MASK (NVRAM_GPIO_SDA_MASK | NVRAM_GPIO_SCL_MASK)
#define GPIO1_ODEN 0x00
#endif
#if USE_CABLE_DETECTION_FEATURE
#define USE_LBADC_CABLE_DETECTION
// phoenix uses LBADC for cable detection. See system\cabledet_lbadc.c
// for functions IsVgaCableConnected and IsDviCableConnected
#endif
//***********************************************************************************
// Note: The board should be rewired to support software power on/off for the flash.
// GPIO2 is used as an example to control power on the flash. "LOW": power off,
// "HIGH": power on. This feature is disabled, until we finalize the power GPIO pin.
//***********************************************************************************
#if USE_POWERDOWN_ROM_CE
// #define DisableXROMPower() gm_ClearRegBitsByte(GPOUTPUT1, BIT2) // GPIO2, LOW
// #define EnableXROMPower() gm_SetRegBitsByte(GPOUTPUT1, BIT2) // GPIO2, HIGH
#define DisableXROMPower()
#define EnableXROMPower()
#endif
// #define MUX_ON_PCD_RGB_ENABLE //If there is a MUX in front of RGB and Component
#ifdef MUX_ON_PCD_RGB_ENABLE
#define MUX_ON_PCD_RGB_CTRL 26 //GPIO26. Now only work on GPIO24,26,28
#define MUX_ON_RGB 0
#define MUX_ON_COMPONENT 1
#endif
#if USE_VPORT
//********** Assign GPIO for I2C Bus for Video Decoder controlling********//
#define DEV_GPIO_SCL 30 //For 57xx AA version, only GPIO30, 31 is workable.
#define DEV_GPIO_SDA 31
//********** Define Video Decoder Device *********************************//
// #define DEV_VIDEO_DECODER DEV_TW9906 //DEV_VPC3230 DEV_SAA7115 DEV_SAA7119 DEV_TVP5160
#define DEV_VIDEO_DECODER DEV_SAA7119 //DEV_VPC3230 DEV_SAA7115 DEV_SAA7119 DEV_TVP5160
#if (DEV_VIDEO_DECODER == DEV_TW9906)
#define DEV_VID_FUNC_ENTRY TW9906_VideoDecoderEntry
//********** Assign GPIO for Video Decoder controlling********//
#define VideoDecoderResetLow() gm_ClearRegBitsByte(GPO_OUTPUT, BIT1)
#define VideoDecoderResetHigh() gm_SetRegBitsByte(GPO_OUTPUT, BIT1)
#define VideoDecoderPowerHigh() gm_SetRegBitsByte(GPOUTPUT3, GPIO24_OUT)
#define VideoDecoderPowerLow() gm_ClearRegBitsByte(GPOUTPUT3, GPIO24_OUT)
#else if (DEV_VIDEO_DECODER == DEV_SAA7119)
//********** Define Function Call: VideoDecoderEntry name ****************//
#define DEV_VID_FUNC_ENTRY saa7119_VideoDecoderEntry
//********** Assign GPIO for Video Decoder controlling********//
#define VideoDEcoderResetControlSetup()
#define VideoDecoderResetLow() gm_ClearRegBitsByte(GPO_OUTPUT, BIT1)
#define VideoDecoderResetHigh() gm_SetRegBitsByte(GPO_OUTPUT, BIT1)
#define VideoDecoderPowerControlSetup() gm_SetRegBitsByte(GPIO_DIRCTRL3, GPIO24_25_IO)
#define VideoDecoderPowerHigh() gm_SetRegBitsByte(GPOUTPUT3, GPIO24_OUT)
#define VideoDecoderPowerLow() gm_ClearRegBitsByte(GPOUTPUT3, GPIO24_OUT)
#define SAA7119_PORT SAA7119_OUTPUT_IPORT // or SAA7119_OUTPUT_XPORT
#endif
#endif // USE_VPORT
#define NVRAM_32KBIT 0 // 1-use 32kbit NVRAM EEPROM driver
// 0-standard 16kbit and less driver
// 32kbit EEPROMS have an additional
// address byte.
#if USE_SMT
#define USE_GETKEY_TIMER_ISR 0 // 0-disable use of Timer ISR, 1- use Timer ISR // PDR 10590, Add option for GPIO_KEY
#else
#define USE_GETKEY_TIMER_ISR 1 // 0-disable use of Timer ISR, 1- use Timer ISR // PDR 10590, Add option for GPIO_KEY
#endif
#define LVDS_DATA_CLK_INVERT 0 // (LVDS/RSDS Data & Clock), 0: not invert, 1:invert
#elif defined(RD1_57XX) && ( BOARD == RD1_57XX )
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