52xx_panel.h

GM5621原代码

/*
	$Workfile:   52xx_panel.h  $
	$Revision:   1.39  $
	$Date:   Aug 23 2006 23:09:38  $
*/

//******************************************************************
//
//		Copyright (C) 2001.  GENESIS MICROCHIP INC.
// All rights reserved.  No part of this program may be reproduced
//
//	Genesis Microchip Inc., 165 Commerce Valley Dr. West
//		Thornhill, Ontario, Canada, L3T 7V8
//
//================================================================
//
// MODULE:  52xx_panel.h
//
// USAGE :  Panel parameters to setup display output registers.
//
// NOTE  :  Select panel using number the panel number
//          defined in enum shown in below.
//
//******************************************************************
#ifndef __PANEL_H__
#define __PANEL_H__

	 #define LG_SXGA_LTM181E06		   		0
	 #define Samsung_SXGA_LTM170E4_L01		1	// with image
	 #define AUO_SXGA_M170EN05		   		2  // LVDS
	 #define LG_WXGA_17132P3M08016	  		3
	 #define Samsung_XGA_LTM150XH_L01		4  // 0: 1 pixel/clk, 8 bit	LVDS
	 #define Samsung_XGA_LTM150XH_T01		5  // 1: 1 pixel/clk, 6 bit
	 #define Samsung_XGA_LTM150XS_L01		6  // 4: 2 pixel/clk, 6 bit
	 #define Samsung_SXGA_LTM170E5_L03	   7
	 #define LG_XGA_LM150X06					8	// 4: 1 pixel/clk, 8 bit	LVDS
	 #define LG_XGA_LM150X07					9	// 6: 1 pixel/clk, 8 bit	LVDS
	 #define LG_XGA_LM151X1						10 // 7: 1 pixel/clk, 8 bit
	 #define LG_XGA_LM151X2          		11	// 8: 1 pixel/clk, 6 bit
	 #define LG_XGA_LM151X05					12	// 9: 1 pixel/clk, 8 bit
	 #define Samsung_SXGA_LTM170E2_131		13	// 4: 1 pixel/clk, 8 bit	LVDS
	 #define CMO_SXGA_170E4						14	// 4: 1 pixel/clk, 8 bit	LVDS
	 #define LG_SXGA_LTM170E01		   		15
	 #define Hannstar_SVGA_HSD096MS11  		16
	 #define Hitachi_TX38D85VC1CAJ			17	//Sony VAIO panel
    #define AU_M170ES05_LTU170ES05E			18 // RSDS panel
	 #define Samsung_WXGA_LTM170W01	 		19
    #define AU_M170ES05_LTU170ES05FD		20 // RSDS panel
    #define LG_SXGA_LM190E03					21
    #define Hannstar_HSD150SXA1           22	// RSDS panel
    #define Samsung_UXGA_LTM213U4_L01     23
    #define Samsung_SXGA_LTM190EX_L21		24
    #define Samsung_SXGA_LTM170EX_L21     25
    #define LG_LM201U04                   26
    #define LG_SXGA_PLUS_LTM201W01        27 // SXGA+
    #define Samsung_UXGA_LTM213U6_L01     30
    #define Samsung_UXGA_LTM201U1_L01     31

	 //**************************************************************
	 //              S E L E C T E D   P A N E L
	 //**************************************************************
//	#define PANEL	Samsung_WXGA_LTM170W01
//	#define PANEL	LG_SXGA_LTM181E06
//	#define PANEL	Samsung_XGA_LTM150XH_L01
//	#define PANEL	Samsung_SXGA_LTM190EX_L21
//	#define PANEL  	Samsung_SXGA_LTM170EX_L21        // SXGA
//	#define PANEL	LG_SXGA_PLUS_LTM201W01           // WSXGA+
//	#define PANEL	Samsung_UXGA_LTM213U4_L01        // UXGA
	#define PANEL	Samsung_UXGA_LTM201U1_L01        // UXGA, default
//	#define PANEL	Samsung_UXGA_LTM213U6_L01        // UXGA, reduce blanking

//	#define PANEL	LG_LM201U04
//	#define PANEL	AUO_SXGA_M170EN05
//	#define PANEL	LG_SXGA_LTM170E01
//	#define PANEL	Hannstar_HSD150SXA1

	#if USING_PANEL_ARRAY
		typedef struct PanelArrayStruct
		{
			WORD	LVDS_PANEL 			  	: 1;
			char 	ROM *Name;

			WORD  TwoPixelPerClk 		: 1;
			BYTE	Depth;

			WORD  Width;
			WORD  Height;

			BYTE  MaxVFreq;
			BYTE  MinVFreq;

			DWORD	MaxPClk;  // KHz

			WORD  MinHTotal;
			BYTE  MinHSyncFrontPorch;
			BYTE  MinHSyncWidth;
			BYTE  MinHSyncBackPorch;
			BYTE  HActiveStart;
			WORD  HActiveEnd;

			WORD  MaxVTotal;
			WORD  TypVTotal;
			WORD  MinVTotal;
			BYTE  MinVSyncFrontPorch;
			BYTE  MinVSyncWidth;
			BYTE  MinVSyncBackPorch;
			BYTE  VActiveStart;
			WORD  VActiveEnd;

			WORD  Invert_DVS 			: 1;
			WORD  Invert_DHS 			: 1;
			WORD  Invert_DCLK 		: 1;
			WORD  Invert_DEN 			: 1;
			DWORD PadDrive;

			// Define panel power up/down timing. WORD constant used to program registers 0x1D8 and 0x1D9 during power up and power down
			WORD  PowerUpTiming;
			WORD  PowerDownTiming;
			BYTE  SpreadSpectrumCtrl;	// Value for Spread_Spectrum_Control register
			WORD  Spread_Spect_En 	: 1;// 0xFF : Enable spectrum, 0x00 : Disable spectrum
			WORD  LVDS_BusType 		: 1;// 0x00: single bus; 0x01: dual bus

			//BYTE  DClkDelay; // DCLK display timing delay adjustment in ns unit. This one in structrue is last one;

			WORD  LVDSBus_EvenOddSwap : 1;//0x01 - Swap 0x00 NoSwap
			BYTE  DClkDelay; // DCLK display timing delay adjustment in ns unit.
		}PanelArrayType;

		extern BYTE B_PanelIndex;
		extern PanelArrayType ROM PanelArray[];

		#define LVDS_PANEL		PanelArray[B_PanelIndex].LVDS_PANEL
		#define PanelName       PanelArray[B_PanelIndex].Name

		#define PanelTwoPixelPerClk  PanelArray[B_PanelIndex].TwoPixelPerClk
		#define PanelDepth           PanelArray[B_PanelIndex].Depth

		#define PanelWidth           PanelArray[B_PanelIndex].Width
		#define PanelHeight          PanelArray[B_PanelIndex].Height

		#define PanelMaxVFreq       PanelArray[B_PanelIndex].MaxVFreq
		#define PanelMinVFreq       PanelArray[B_PanelIndex].MinVFreq

		#define PanelMaxPClk        PanelArray[B_PanelIndex].MaxPClk

		#define PanelMinHTotal            PanelArray[B_PanelIndex].MinHTotal
		#define PanelMinHSyncFrontPorch   PanelArray[B_PanelIndex].MinHSyncFrontPorch
		#define PanelMinHSyncWidth        PanelArray[B_PanelIndex].MinHSyncWidth
		#define PanelMinHSyncBackPorch    PanelArray[B_PanelIndex].MinHSyncBackPorch
		#define PanelHActiveStart         PanelArray[B_PanelIndex].HActiveStart
		#define PanelHActiveEnd           PanelArray[B_PanelIndex].lHActiveEnd

		#define PanelMaxVTotal            PanelArray[B_PanelIndex].MaxVTotal
		#define PanelTypVTotal            PanelArray[B_PanelIndex].TypVTotal
		#define PanelMinVTotal            PanelArray[B_PanelIndex].MinVTotal
		#define PanelMinVSyncFrontPorch   PanelArray[B_PanelIndex].MinVSyncFrontPorch
		#define PanelMinVSyncWidth        PanelArray[B_PanelIndex].MinVSyncWidth
		#define PanelMinVSyncBackPorch    PanelArray[B_PanelIndex].MinVSyncBackPorch
		#define PanelVActiveStart         PanelArray[B_PanelIndex].VActiveStart
		#define PanelVActiveEnd           PanelArray[B_PanelIndex].VActiveEnd

		#define Panel_Invert_DVS          PanelArray[B_PanelIndex].Invert_DVS
		#define Panel_Invert_DHS          PanelArray[B_PanelIndex].Invert_DHS
		#define Panel_Invert_DCLK         PanelArray[B_PanelIndex].Invert_DCLK
		#define Panel_Invert_DEN          PanelArray[B_PanelIndex].Invert_DEN
		#define PanelPadDrive             PanelArray[B_PanelIndex].PadDrive

		#define PowerUpPanelTiming        PanelArray[B_PanelIndex].PowerUpTiming
		#define PowerDownPanelTiming      PanelArray[B_PanelIndex].PowerDownTiming
		#define PanelSpreadSpectrumCtrl   PanelArray[B_PanelIndex].SpreadSpectrumCtrl
		#define Panel_Spread_Spect_En     PanelArray[B_PanelIndex].Spread_Spect_En
		#define Panel_LVDS_BusType        PanelArray[B_PanelIndex].LVDS_BusType
		#define PanelDClkDelay            PanelArray[B_PanelIndex].DClkDelay

		#define Panel_LVDSBus_EvenOddSwap PanelArray[B_PanelIndex].LVDSBus_EvenOddSwap

	// Add Alt_DispLines adjust for panel array
	#if !defined(Alt_DispLines)
 		#define Alt_DispLines	0x08
	#endif
	#else // not USING_PANEL_ARRAY...

	 //**************************************************************
	 //            P A N E L   D E F I N I T I O N S
	//**************************************************************
   #if PANEL == LG_SXGA_PLUS_LTM201W01

      #define LVDS_PANEL      // LVDS panel
      #define PanelName                "LG_SXGA+_LTM201W01"
      #define PanelTwoPixelPerClk      1       // 2 pixel per clock
      #define PanelDepth               8

      #define PanelWidth               1680
      #define PanelHeight              1050

      #define PanelMaxVFreq            85      // Hz
      #define PanelMinVFreq            40      // Hz
      #define PanelMaxHFreq            75000   // Hz

      #define PanelMaxPClk             140000UL
      #define PanelMinPClk             60000UL  //CM Guess

      #define PanelMinHTotal           1840
      #define PanelDefHTotal           1840
      #define PanelMaxHTotal           2000

      #define PanelMinHSyncFrontPorch  48
      #define PanelMinHSyncWidth       32
      #define PanelMinHSyncBackPorch   80
      #define PanelHActiveStart        PanelMinHSyncWidth + PanelMinHSyncBackPorch
      #define PanelHActiveEnd          PanelHActiveStart + PanelWidth

      #define PanelMaxVTotal           1150
      #define PanelTypVTotal           1100
      #define PanelMinVTotal           1080 //1208

      #define PanelMinVSyncFrontPorch  3
      #define PanelMinVSyncWidth       6
      #define PanelMinVSyncBackPorch   21 //2
      #define PanelVActiveStart        PanelMinVSyncWidth + PanelMinVSyncBackPorch
      #define PanelVActiveEnd          PanelVActiveStart + PanelHeight

      #define Panel_Invert_DVS         0x00
      #define Panel_Invert_DHS         0x01
      #define Panel_Invert_DCLK        0x01
      #define Panel_Invert_DEN         0x00
      #define PanelPadDrive            0x775522UL

      // Define panel power up/down timing.
      #define PowerUpPanelTiming       0x0505 //0x1811
      #define PowerDownPanelTiming     0x0505 //0x1811

      // For correct power down sequence.
      #define PowerDownTimeIn10ms      50    //from powerDownSequence enable to data Hiz
      #define PanelSpreadSpectrumCtrl  0xAE  //0  Value for Spread_Spectrum_Control register

      // If LVDS, spread spectrum control is always disabled.
      #ifdef LVDS_PANEL
         #define Panel_Spread_Spect_En 0x00  // 0x01  Enable spectrum, 0x00 : Disable spectrum
         #define Panel_LVDS_BusType    0x01  // 0x00: single bus; 0x01: dual bus
      #else
         #define Panel_Spread_Spect_En 0x01  // 0xFF : Enable spectrum, 0x00 : Disable spectrum
      #endif

      // Added to compliment the PanelPadDrive
      #define PanelDClkDelay           0     // DCLK display timing delay adjustment in ns unit.

      #define Panel_LVDSBus_EvenOddSwap   0x01  //0x01 - Swap 0x00 NoSwap

   #endif      // LG_SXGA+_LTM201W01 panel

	#if PANEL == AUO_SXGA_M170EN05

		#define LVDS_PANEL		// LVDS panel
		#define PanelName				"AUO_SXGA_M170EN05"

		#define PanelTwoPixelPerClk     0       // 2 pixel per clock
		#define PanelDepth              8

		#define PanelWidth				1280
		#define PanelHeight				1024

		#define PanelMaxVFreq           77      // Hz
		#define PanelMinVFreq           57  		// Hz
		#define PanelMaxHFreq			100000   // Hz - none given, only typical (80.06khz) in data sheet

		#define PanelMaxPClk            140000UL   //70000 KHz?

		#define PanelMinHTotal           1600
		#define PanelMinHSyncFrontPorch	10
		#define PanelMinHSyncWidth      4
		#define PanelMinHSyncBackPorch  20
		#define PanelHActiveStart		(PanelMinHSyncWidth + PanelMinHSyncBackPorch)
		#define PanelHActiveEnd			(PanelHActiveStart + PanelWidth)

		#define PanelMaxVTotal			2047
		#define PanelTypVTotal			1066
		#define PanelMinVTotal			1035
		#define PanelMinVSyncFrontPorch	1
		#define PanelMinVSyncWidth      3
		#define PanelMinVSyncBackPorch  7
		#define PanelVActiveStart		(PanelMinVSyncWidth + PanelMinVSyncBackPorch)
		#define PanelVActiveEnd			(PanelVActiveStart + PanelHeight)

		#define Panel_Invert_DVS 		0x01
		#define Panel_Invert_DHS 		0x01
		#define Panel_Invert_DCLK 		0x01
		#define Panel_Invert_DEN 		0x00
		#define PanelPadDrive 			0x775522UL

		// Define panel power up/down timing. WORD constant used to program registers 0x1D8 and 0x1D9 during power up and power down
		#define PowerUpPanelTiming		0x9944
		#define PowerDownPanelTiming	0x9944 // note, this can be different for power down

		// For correct power down sequence.
		#define PowerDownTimeIn10ms		20		//from powerDownSequence enable to data Hiz, PDR#2840, 2884
		#define PanelSpreadSpectrumCtrl	0x0 	// Value for Spread_Spectrum_Control register
		// If LVDS, spread spectrum control is always disabled.
		#ifdef LVDS_PANEL
			#define Panel_Spread_Spect_En	0x00	// 0x01 : Enable spectrum, 0x00 : Disable spectrum
			#define Panel_LVDS_BusType		0x01	//0x00: single bus; 0x01: dual bus
		#else
			#define Panel_Spread_Spect_En	0x01	// 0x01 : Enable spectrum, 0x00 : Disable spectrum
		#endif

		// Added to compliment the PanelPadDrive
		#define PanelDClkDelay			7		// DCLK display timing delay adjustment in ns unit.

		#define Panel_LVDSBus_EvenOddSwap	0x01  //0x01 - Swap 0x00 NoSwap

	#endif

    #if PANEL == Samsung_SXGA_LTM170E5_L03

		#define LVDS_PANEL		// LVDS panel
		#define PanelName				"Samsung_SXGA_LTM170E5_L03"

		#define PanelTwoPixelPerClk     0// 1??       // 2 pixel per clock
		#define PanelDepth              8

		#define PanelWidth				1280
		#define PanelHeight				1024

		#define PanelMaxVFreq           87 //60      // Hz
		#define PanelMinVFreq           1  		// Hz
		#define PanelMaxHFreq			64000   // Hz

		#define PanelMaxPClk            140000UL   //108000 KHz

		#define PanelMinHTotal          1340 //1310 //1688
		#define PanelMinHSyncFrontPorch	20