26xx_board.h

GM5621原代码

		#define KEY_RIGHT		BIT1

		#if USE_LONG_DEMO_KEYPAD
    		#define LED_GREEN		BIT2
         #define LED_RED      BIT3
         #define LED_ORANGE	LED_GREEN | LED_RED
         #define LED_MASK     LED_GREEN | LED_RED | LED_ORANGE
		#else
    		#define LED_GREEN		BIT3
         #define LED_RED      BIT2
         #define LED_ORANGE	LED_GREEN | LED_RED
         #define LED_MASK     LED_GREEN | LED_RED | LED_ORANGE
		#endif

		//** GPIO MASKS **************************************
		#define  GPO_ODEN		0x00

		//** GPIO1 is only available if not using TCON pins.
//		#define  GPIO1_OUT_MASK	( LED_GREEN | LED_ORANGE )
//		#define  GPIO1_ODEN	0x00


		#define  GPIO1_MASK	(LED_GREEN | LED_ORANGE)
		#define  GPIO1_ODEN	( LED_GREEN | LED_ORANGE)

		//***********************************************************************************
		//Note: The board should make corresponding changes to make cable detection work!!!
		// Temporarily Map VGA_CABLE connected signal on GPIO14, Low(0) indicating connection;
		// Temporarily Map DVI_CABLE connected signal on GPIO15, High(1) ndicating connection;
		// This will need direction settion to input for GPIO_DIRCTRL2
		//***********************************************************************************
		#if USE_CABLE_DETECTION_FEATURE
			//#define IsVgaCableConnected()   ((gm_ReadRegByte(GPINPUT2) & BIT6)==0)  	//GPIO14, LOW
			//#define IsDviCableConnected()   ((gm_ReadRegByte(GPINPUT2) & BIT7)!=0)  	//GPIO15, HIGH
			#define IsVgaCableConnected()   ((gm_ReadRegByte(GPINPUT) & BIT6)==0)  	//GPIO14, LOW
			#define IsDviCableConnected()   ((gm_ReadRegByte(GPINPUT) & BIT7)!=0)  	//GPIO15, HIGH
		#endif

		//***********************************************************************************
		// Note: The board should be rewired to support software power on/off for the flash.
		// GPIO2 is used as an example to control power on the flash. "LOW": power off,
		// "HIGH": power on. This feature is disabled, until we finalize the power GPIO pin.
		//***********************************************************************************
		#if USE_POWERDOWN_ROM_CE
		// #define DisableXROMPower()     gm_ClearRegBitsByte(GPOUTPUT1, BIT2)	// GPIO2, LOW
		// #define EnableXROMPower()      gm_SetRegBitsByte(GPOUTPUT1, BIT2)	// GPIO2, HIGH
		#define DisableXROMPower()
		#define EnableXROMPower()
		#endif

		#define VideoDecoderResetLow()	gm_ClearRegBitsByte(GPOUTPUT1, BIT6)
		#define VideoDecoderResetHigh()	gm_SetRegBitsByte(GPOUTPUT1, BIT6)

		#define NVRAM_32KBIT					0 // 1-use 32kbit NVRAM EEPROM driver
													  // 0-standard 16kbit and less driver
													  // 32kbit EEPROMS have an additional
													  // address byte.
		#define USE_GETKEY_TIMER_ISR	1 // 0-disable use of Timer ISR, 1- use Timer ISR	// PDR 10590, Add option for GPIO_KEY
		
	// defines to make phoenix code run on 52xx RD1RevC board.
	 #define EXT_ROM_RD_CTRL                       0x8029	//41 (CORE_HI)
	 #define XROM_OE_WIDTH                         0X1F
	 #define PWM0_GPIOn_EN                         BIT0
	 #define GPIO_DIRCTRL1                         0x803C	//60 (HOST_LO)
	 #define GPO_OPENDRAIN_EN1                     0x803D	//61 (HOST_HI)
	 #define GPIO_DIRCTRL2                         0x8040	//64 (HOST_LO)
	 #define GPO_OPENDRAIN_EN2                     0x8041	//65 (HOST_HI)
	 #define GPOUTPUT1                             0x803F	//63 (HOST_HI)
	 #define OSD_4BPP_FIX_DISABLE   					  BIT6
	 #define THRESH_OPT                            BIT5

	#elif ( BOARD == RD1 )
      #define	CPU_CLK_KHZ		100000UL	// in KHz
      #define CPU_SPEED       1
      #define T_CLK_KHZ 		14318
      #define LCLK_MHZ        170UL // Set to 10% above maximum input frequency.
      #define FLASH_SPEED_NS	   90 // 90ns.
      #define I2C_SPEED		  400 // 100KHz or 400KHz.
      #define OCM_CLK_PWRDOWN_KHZ	T_CLK_KHZ

      #define LED_POL      	POS_POL

      // KEYPAD ***************************

      #define PORT_ADC_1_USED            // Define for LBADC Keypad...
      #define GPIOKEYPAD_ALLOWED		0	//PDR 10590, add options for GPIO_Key 

      // GPIO Keypad settings
      #define KeyPolarity					0	// polarity for GPIO keypad.
      // LBADC Keypad settings.
      #define AdcPolarity					0	// polarity for LBADC keypad.
      // Brightness control
      #define PWM0_BRIGHTNESS    		0	// Use PWM for brightness control
      #define BRIGHTNESS_PWM_PORT     PWM0_PULSE // address of PWM to use (see register.h)

 		#define LED_GREEN		BIT0
      #define LED_RED      BIT1
      #define LED_ORANGE	LED_GREEN | LED_RED
      #define LED_MASK     LED_GREEN | LED_RED | LED_ORANGE

      //** GPIO MASKS **************************************
      #define  GPO_ODEN		0x00

      //RD1 board is not assumed to use NVRAM, GPIO0 and 1 are used for LED_g and RED_R control
      #undef NVRAM_USE_FLASH
      #define NVRAM_USE_FLASH 1

      //** GPIO1 is only available if not using TCON pins.
//      #if (NVRAM_USE_FLASH == 0)
         // When not using FLASH to store NVRAM data, must configure GPIO lines
         // for I2C FLASH device.
//         #define	NVRAM_GPIO_SCL			0		//GPIO_0
//         #define	NVRAM_GPIO_SDA 		1  	//GPIO_1
//         #define	NVRAM_GPIO_SCL_MASK	BIT0
//         #define	NVRAM_GPIO_SDA_MASK	BIT1

//         #define  GPIO1_OUT_MASK	( NVRAM_GPIO_SDA_MASK | NVRAM_GPIO_SCL_MASK )
//         #define  GPIO1_ODEN		0x00
//      #endif

      #if USE_CABLE_DETECTION_FEATURE
         #define USE_LBADC_CABLE_DETECTION
         // phoenix uses LBADC for cable detection.  See system\cabledet_lbadc.c
         // for functions IsVgaCableConnected and IsDviCableConnected
      #endif

      //***********************************************************************************
      // Note: The board should be rewired to support software power on/off for the flash.
      // GPIO2 is used as an example to control power on the flash. "LOW": power off,
      // "HIGH": power on. This feature is disabled, until we finalize the power GPIO pin.
      //***********************************************************************************
      #if USE_POWERDOWN_ROM_CE
      // #define DisableXROMPower()     gm_ClearRegBitsByte(GPOUTPUT1, BIT2)	// GPIO2, LOW
      // #define EnableXROMPower()      gm_SetRegBitsByte(GPOUTPUT1, BIT2)	// GPIO2, HIGH
      #define DisableXROMPower()
      #define EnableXROMPower()
      #endif

      #define VideoDecoderResetLow()
      #define VideoDecoderResetHigh()

      #define NVRAM_32KBIT					0 // 1-use 32kbit NVRAM EEPROM driver
                                         // 0-standard 16kbit and less driver
                                         // 32kbit EEPROMS have an additional
	#define USE_GETKEY_TIMER_ISR	1 // 0-disable use of Timer ISR, 1- use Timer ISR	// PDR 10590, Add option for GPIO_KEY												  // address byte.

		#define LBADC_CABLE_DET_CHANNEL	LBADC_IN2
		// default lbadc cable detect values:
		// LBADC values for EV1 board:
		//  State:    (V)  (ADC counts)
		// No Cable	 1.5V   	116
		// VGA only  1.1V    85
		// DVI only  3.3V    255
		// VGA + DVI 2.5V    193
		#define DVI_THRESH		230 // greater than 230 is dvi cable only
		#define DVI_VGA_THRESH	150 // greater than 150 is dvi+vga
		#define NO_CABLE_THRESH 100 // greater than 100 is no cable


	#endif
	//******************************************************************
	//  END BOARD SPECIFIC DEFINES
	//******************************************************************

	#define CPU_CLK_MHZ		(CPU_CLK_KHZ / 1000)

	#ifndef	T_CLK_KHZ
		#error must define T_CLK_KHZ
	#endif

	#define	T_CLK_MHZ		(T_CLK_KHZ / 1000)

	// SPI clock selection in normal mode (default).
	// #define SPI_DEFAULT_CLOCK_SEL		2

	#define SPI_CLOCK_FREQ_KHZ		25000UL	// SPI clock frequency in kHz

	// Compute the SPI clock divisor based on CPU clock and desired SPI clock freq
	// Round down to the nearest integer
	#if ( (CPU_CLK_KHZ / SPI_CLOCK_FREQ_KHZ) >= 2 )
		// #define SPI_DEFAULT_CLOCK_SEL   ((BYTE)((CPU_CLK_KHZ / SPI_CLOCK_FREQ_KHZ) - 2))
		#define SPI_DEFAULT_CLOCK_SEL	\
			((BYTE)(((10 * CPU_CLK_KHZ) + (9 * SPI_CLOCK_FREQ_KHZ)) / (SPI_CLOCK_FREQ_KHZ * 10) - 2))
	#else
		#define SPI_DEFAULT_CLOCK_SEL   0
	#endif

	#if (T_CLK_MHZ <= 14)
		// 0x20 is 256 tclk and good for from 14318/(2*128) = 55.93KHz to 27.97KHz
		#define INTERLACED_VSYNC_WINDOW		0x20
	#elif (T_CLK_MHZ < 25)
		// 0x30 is 384TClk and good for from 52.08KHz to 26Khz for 20 MHz
		// and 62.5Khz to 31.25Khz for 24MKz
		#define INTERLACED_VSYNC_WINDOW		0x31
	#else 	// (T_CLK_MHZ > 25MHz)
		#define INTERLACED_VSYNC_WINDOW		0x41
	#endif

	/*************************************************************************
		Table of acceptable buad rates:

					Full Pwr |   TCLK		| TCLK/14
		BAUD  |  100.0Mhz | 14.318Mhz | 1.023Mhz
		115200|    Yes    |   No**    |   No
		57600 |    Yes    |   No**    |   No
		56000 |    Yes    |   Yes     |   No
		38400 |    Yes    |   Yes     |   No
		19200 |    Yes    |   Yes     |   No
		14400 |    Yes    |   Yes     |   No
		9600  |    Yes    |   Yes     |   No
		4800  |    Yes    |   Yes     |   No**
		1200  |    Yes    |   Yes     |   Yes
		**means you may be able to see debug output depending on how
		tolorant your PC is, but you're likely not going to be able to
		receive any debug commands.
	**************************************************************************/
	#if CPU_CLK_KHZ > 50000
		#define SERIAL_BAUD_RATE        115200UL
	#else
		#define SERIAL_BAUD_RATE	19200UL
	#endif

	#define SBAUD_IN_LOW_POWER		4800UL		// Baud rate in low power mode

	#ifndef NVRAM_32KBIT
		#define NVRAM_32KBIT			0
	#endif

	// define IsCableConnected for compatibility with single port systems.
	#define IsCableConnected()		IsVgaCableConnected

#endif // __52XX_BOARD_H__