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<!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN"><HTML><HEAD><TITLE>80386 Programmer's Reference Manual -- Opcode LAR</TITLE></HEAD><BODY><B>up:</B> <A HREF="c17.htm">Chapter 17 -- 80386 Instruction Set</A><BR><B>prev:</B><A HREF="LAHF.htm"> LAHF Load Flags into AH Register</A><BR><B>next:</B><A HREF="LEA.htm"> LEA Load Effective Address</A><P><HR><P><H1>LAR -- Load Access Rights Byte</H1><PRE>Opcode Instruction Clocks Description0F 02 /r LAR r16,r/m16 pm=15/16 r16 := r/m16 masked by FF000F 02 /r LAR r32,r/m32 pm=15/16 r32 := r/m32 masked by 00FxFF00</PRE><H2>Description</H2>The LAR instruction stores a marked form of the second doubleword ofthe descriptor for the source selector if the selector is visible at theCPL (modified by the selector's RPL) and is a valid descriptor type. Thedestination register is loaded with the high-order doubleword of thedescriptor masked by 00FxFF00, and ZF is set to 1. The x indicates that thefour bits corresponding to the upper four bits of the limit are undefined inthe value loaded by LAR. If the selector is invisible or of the wrong type,ZF is cleared.<P>If the 32-bit operand size is specified, the entire 32-bit value is loadedinto the 32-bit destination register. If the 16-bit operand size isspecified, the lower 16-bits of this value are stored in the 16-bitdestination register.<P>All code and data segment descriptors are valid for LAR.<P>The valid special segment and gate descriptor types for LAR are givenin the following table:<PRE>Type Name Valid/Invalid 0 Invalid Invalid 1 Available 80286 TSS Valid 2 LDT Valid 3 Busy 80286 TSS Valid 4 80286 call gate Valid 5 80286/80386 task gate Valid 6 80286 trap gate Valid 7 80286 interrupt gate Valid 8 Invalid Invalid 9 Available 80386 TSS Valid A Invalid Invalid B Busy 80386 TSS Valid C 80386 call gate Valid D Invalid Invalid E 80386 trap gate Valid F 80386 interrupt gate Valid</PRE><H2>Flags Affected</H2>ZF as described above<H2>Protected Mode Exceptions</H2>#GP(0) for an illegal memory operand effective address in the CS, DS,ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment;#PF(fault-code) for a page fault<H2>Real Address Mode Exceptions</H2>Interrupt 6; LAR is unrecognized in Real Address Mode<H2>Virtual 8086 Mode Exceptions</H2>Same exceptions as in Real Address Mode<P><HR><P><B>up:</B> <A HREF="c17.htm">Chapter 17 -- 80386 Instruction Set</A><BR><B>prev:</B><A HREF="LAHF.htm"> LAHF Load Flags into AH Register</A><BR><B>next:</B><A HREF="LEA.htm"> LEA Load Effective Address</A></BODY>⌨️ 快捷键说明
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