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📄 stos.htm

📁 Programmer s Reference Manual is an improtant book on Intel processor architecture and programming.
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<!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN"><HTML><HEAD><TITLE>80386 Programmer's Reference Manual -- Opcode STOS</TITLE></HEAD><BODY><B>up:</B> <A HREF="c17.htm">Chapter 17 -- 80386 Instruction Set</A><BR><B>prev:</B><A HREF="STI.htm"> STI Set Interrupt Flag</A><BR><B>next:</B><A HREF="STR.htm"> STR Store Task Register</A><P><HR><P><H1>STOS/STOSB/STOSW/STOSD -- Store String Data</H1><PRE>Opcode  Instruction  Clocks   DescriptionAA      STOS m8      4        Store AL in byte ES:[(E)DI], update (E)DIAB      STOS m16     4        Store AX in word ES:[(E)DI], update (E)DIAB      STOS m32     4        Store EAX in dword ES:[(E)DI], update (E)DIAA      STOSB        4        Store AL in byte ES:[(E)DI], update (E)DIAB      STOSW        4        Store AX in word ES:[(E)DI], update (E)DIAB      STOSD        4        Store EAX in dword ES:[(E)DI], update (E)DI</PRE><H2>Operation</H2><PRE>IF AddressSize = 16THEN use ES:DI for DestRegELSE (* AddressSize = 32 *) use ES:EDI for DestReg;FI;IF byte type of instructionTHEN   (ES:DestReg) := AL;   IF DF = 0   THEN DestReg := DestReg + 1;   ELSE DestReg := DestReg - 1;   FI;ELSE IF OperandSize = 16   THEN      (ES:DestReg) := AX;      IF DF = 0      THEN DestReg := DestReg + 2;      ELSE DestReg := DestReg - 2;      FI;   ELSE (* OperandSize = 32 *)      (ES:DestReg) := EAX;      IF DF = 0      THEN DestReg := DestReg + 4;      ELSE DestReg := DestReg - 4;      FI;   FI;FI;</PRE><H2>Description</H2>STOS transfers the contents of all AL, AX, or EAX register to the memorybyte or word given by the destination register relative to the ES segment.The destination register is DI for an address-size attribute of 16 bits orEDI for an address-size attribute of 32 bits.<P>The destination operand must be addressable from the ES register. A segmentoverride is not possible.<P>The address of the destination is determined by the contents of thedestination register, not by the explicit operand of STOS. This operand isused only to validate ES segment addressability and to determine the datatype. Load the correct index value into the destination register beforeexecuting STOS.<P>After the transfer is made, DI is automatically updated. If the directionflag is 0 (<A HREF="CLD.htm">CLD</A> was executed), DI is incremented; if the direction flag is1 (<A HREF="STD.htm">STD</A> was executed), DI is decremented. DI is incremented or decremented by1 if a byte is stored, by 2 if a word is stored, or by 4 if a doubleword isstored.<P>STOSB, STOSW, and STOSD are synonyms for the byte, word, and doubleword STOSinstructions, that do not require an operand. They are simpler to use, butprovide no type or segment checking.<P>STOS can be preceded by the <A HREF="REP.htm">REP</A> prefix for a block fill of CX or ECX bytes,words, or doublewords. Refer to the <A HREF="REP.htm">REP</A> instruction for further details.<H2>Flags Affected</H2>None<H2>Protected Mode Exceptions</H2>#GP(0) if the result is in a nonwritable segment; #GP(0) for an illegalmemory operand effective address in the CS, DS, ES, FS, or GS segments;#SS(0) for an illegal address in the SS segment; #PF(fault-code) for a pagefault<H2>Real Address Mode Exceptions</H2>Interrupt 13 if any part of the operand would lie outside of the effectiveaddress space from 0 to 0FFFFH<H2>Virtual 8086 Mode Exceptions</H2>Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault<P><HR><P><B>up:</B> <A HREF="c17.htm">Chapter 17 -- 80386 Instruction Set</A><BR><B>prev:</B><A HREF="STI.htm"> STI Set Interrupt Flag</A><BR><B>next:</B><A HREF="STR.htm"> STR Store Task Register</A></BODY>

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