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from the left side of the operand moves to CF before it returns to the
operand as the low-order bit on the next rotation cycle. See 
<A HREF="#fig3-14">Figure 3-14</A>
  .
<P>
<A HREF="RCL.htm">RCR</A> (Rotate Through Carry Right) 
rotates bits in the byte, word, or
doubleword destination operand right by one or by the number of bits
specified in the count operand (an immediate value or the value contained in
CL).
<P>
This instruction differs from <A HREF="RCL.htm">ROR</A> in that it treats CF as a low-order
one-bit extension of the destination operand. Each low-order bit that exits
from the right side of the operand moves to CF before it returns to the
operand as the high-order bit on the next rotation cycle. See 
<A HREF="#fig3-15">Figure 3-15</A>
  .
<P>
<A NAME="fig3-10">
<IMG align=center SRC="fig3-10.gif" border=0>
<P>
<HR>
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<A NAME="fig3-11">
<IMG align=center SRC="fig3-11.gif" border=0>
<P>
<HR>
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<A NAME="fig3-12">
<IMG align=center SRC="fig3-12.gif" border=0>
<P>
<HR>
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<A NAME="fig3-13">
<IMG align=center SRC="fig3-13.gif" border=0>
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<A NAME="fig3-14">
<IMG align=center SRC="fig3-14.gif" border=0>
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<HR>
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<A NAME="fig3-15">
<IMG align=center SRC="fig3-15.gif" border=0>
<P>
<H3>3.4.4.4  Fast "BIT BLT" Using Double Shift Instructions</H3>
One purpose of the double shifts is to implement a bit string move, with
arbitrary misalignment of the bit strings.  This is called a "bit blt" (BIT
BLock Transfer.)  A simple example is to move a bit string from an arbitrary
offset into a doubleword-aligned byte string.  A left-to-right string is
moved 32 bits at a time if a double shift is used inside the move loop.
<PRE>
MOV   ESI,ScrAddr
MOV   EDI,DestAddr
MOV   EBX,WordCnt
MOV   CL,RelOffset      ; relative offset Dest-Src
MOV   EDX,[ESI]         ; load first word of source
ADD   ESI,4             ; bump source address
BltLoop:
LODS                    ; new low order part
SHLD  EDX,EAX,CL        ; EDX overwritten with aligned stuff
XCHG  EDX,EAS           ; Swap high/low order parts
STOS                    ; Write out next aligned chunk
DEC   EBX
JA    BltLoop
</PRE>
This loop is simple yet allows the data to be moved in 32-bit pieces for
the highest possible performance. Without a double shift, the best that can
be achieved is 16 bits per loop iteration by using a 32-bit shift and
replacing the 
<A HREF="XCHG.htm">XCHG</A> with a 
<A HREF="RCL.htm">ROR</A> by 16 to swap high and low order parts of
registers. A more general loop than shown above would require some extra
masking on the first doubleword moved (before the main loop), and on the
last doubleword moved (after the main loop), but would have the same basic
32-bits per loop iteration as the code above.

<H3>3.4.4.5  Fast Bit-String Insert and Extract</H3>
The double shift instructions also enable:
<UL>
<LI> Fast insertion of a bit string from a register into an arbitrary bit
location in a larger bit string in memory without disturbing the bits
on either side of the inserted bits.
<LI> Fast extraction of a bits string into a register from an arbitrary bit
location in a larger bit string in memory without disturbing the bits
on either side of the extracted bits.
</UL>
The following coded examples illustrate bit insertion and extraction under
variousconditions:
<OL>
<LI>Bit String Insert into Memory (when bit string is 1-25 bits long,
i.e., spans four bytes or less):
<PRE>
; Insert a right-justified bit string from register into
; memory bit string.
;
; Assumptions:
; 1) The base of the string array is dword aligned, and
; 2) the length of the bit string is an immediate value
;    but the bit offset is held in a register.
;
; Register ESI holds the right-justified bit string
; to be inserted.
; Register EDI holds the bit offset of the start of the
; substring.
; Registers EAX and ECX are also used by this
; "insert" operation.
;
MOV   ECX,EDI      ; preserve original offset for later use
SHR   EDI,3        ; signed divide offset by 8 (byte address)
AND   CL,7H        ; isolate low three bits of offset in CL
MOV   EAX,[EDI]strg_base      ; move string dword into EAX
ROR   EAX,CL       ; right justify old bit field
SHRD  EAX,ESI,length          ; bring in new bits
ROL   EAX,length   ; right justify new bit field
ROL   EAX,CL       ; bring to final position
MOV   [EDI]strg_base,EAX      ; replace dword in memory
</PRE>
<LI>Bit String Insert into Memory (when bit string is 1-31 bits long, i.e.
spans five bytes or less):
<PRE>
; Insert a right-justified bit string from register into
; memory bit string.
;
; Assumptions:
; 1) The base of the string array is dword aligned, and
; 2) the length of the bit string is an immediate value
;    but the bit offset is held in a register.
;
; Register ESI holds the right-justified bit string
; to be inserted.
; Register EDI holds the bit offset of the start of the
; substring.
; Registers EAX, EBX, ECX, and EDI are also used by
; this "insert" operation.
;
MOV   ECX,EDI     ; temp storage for offset
SHR   EDI,5       ; signed divide offset by 32 (dword address)
SHL   EDI,2       ; multiply by 4 (in byte address format)
AND   CL,1FH      ; isolate low five bits of offset in CL
MOV   EAX,[EDI]strg_base      ; move low string dword into EAX
MOV   EDX,[EDI]strg_base+4    ; other string dword into EDX
MOV   EBX,EAX     ; temp storage for part of string     + rotate
SHRD  EAX,EDX,CL  ; double shift by offset within dword + EDX:EAX
SHRD  EAX,EBX,CL  ; double shift by offset within dword + right
SHRD  EAX,ESI,length          ; bring in new bits
ROL   EAX,length  ; right justify new bit field
MOV   EBX,EAX     ; temp storage for part of string         + rotate
SHLD  EAX,EDX,CL  ; double shift back by offset within word + EDX:EAX
SHLD  EDX,EBX,CL  ; double shift back by offset within word + left
MOV   [EDI]strg_base,EAX      ; replace dword in memory
MOV   [EDI]strg_base+4,EDX    ; replace dword in memory
</PRE>
<LI>Bit String Insert into Memory (when bit string is exactly 32 bits
long, i.e., spans five or four types of memory):
<PRE>
; Insert right-justified bit string from register into
; memory bit string.
;
; Assumptions:
; 1) The base of the string array is dword aligned, and
; 2) the length of the bit string is 32
;    but the bit offset is held in a register.
;
; Register ESI holds the 32-bit string to be inserted.
; Register EDI holds the bit offset of the start of the
; substring.
; Registers EAX, EBX, ECX, and EDI are also used by
; this "insert" operation.
;
MOV   EDX,EDI     ; preserve original offset for later use
SHR   EDI,5       ; signed divide offset by 32 (dword address)
SHL   EDI,2       ; multiply by 4 (in byte address format)
AND   CL,1FH      ; isolate low five bits of offset in CL
MOV   EAX,[EDI]strg_base      ; move low string dword into EAX
MOV   EDX,[EDI]strg_base+4    ; other string dword into EDX
MOV   EBX,EAX     ; temp storage for part of string     + rotate
SHRD  EAX,EDX     ; double shift by offset within dword + EDX:EAX
SHRD  EDX,EBX     ; double shift by offset within dword + right
MOV   EAX,ESI     ; move 32-bit bit field into position
MOV   EBX,EAX     ; temp storage for part of string         + rotate
SHLD  EAX,EDX     ; double shift back by offset within word + EDX:EAX
SHLD  EDX,EBX     ; double shift back by offset within word + left
MOV   [EDI]strg_base,EAX      ; replace dword in memory
MOV   [EDI]strg_base,+4,EDX   ; replace dword in memory
</PRE>
<LI>Bit String Extract from Memory (when bit string is 1-25 bits long,
i.e., spans four bytes or less):
<PRE>
; Extract a right-justified bit string from memory bit
; string into register
;
; Assumptions:
; 1) The base of the string array is dword aligned, and
; 2) the length of the bit string is an immediate value
;    but the bit offset is held in a register.
;
; Register EAX holds the right-justified, zero-padded
; bit string that was extracted.
; Register EDI holds the bit offset of the start of the
; substring.
; Registers EDI, and ECX are also used by this "extract."
;
MOV  ECX,EDI      ; temp storage for offset
SHR  EDI,3        ; signed divide offset by 8 (byte address)
AND  CL,7H        ; isolate low three bits of offset
MOV  EAX,[EDI]strg_base       ; move string dword into EAX
SHR  EAX,CL       ; shift by offset within dword
AND  EAX,mask     ; extracted bit field in EAX
</PRE>
<LI>Bit String Extract from Memory (when bit string is 1-32 bits long,
i.e., spans five bytes or less):
<PRE>
; Extract a right-justified bit string from memory bit
; string into register.
;
; Assumptions:
; 1) The base of the string array is dword aligned, and
; 2) the length of the bit string is an immediate
;    value but the bit offset is held in a register.
;
; Register EAX holds the right-justified, zero-padded
; bit string that was extracted.
; Register EDI holds the bit offset of the start of the
; substring.
; Registers EAX, EBX, and ECX are also used by this "extract."
MOV   ECX,EDI     ; temp storage for offset
SHR   EDI,5       ; signed divide offset by 32 (dword address)
SHL   EDI,2       ; multiply by 4 (in byte address format)
AND   CL,1FH      ; isolate low five bits of offset in CL
MOV   EAX,[EDI]strg_base      ; move low string dword into EAX
MOV   EDX,[EDI]strg_base+4    ; other string dword into EDX
SHRD  EAX,EDX,CL  ; double shift right by offset within dword
AND   EAX,mask    ; extracted bit field in EAX
</PRE>
</OL>

<H2>3.4.5  Byte-Set-On-Condition Instructions</H2>
This group of instructions sets a byte to zero or one depending on any of
the 16 conditions defined by the status flags. The byte may be in memory or
may be a one-byte general register. These instructions are especially useful
for implementing Boolean expressions in high-level languages such as Pascal.
<P>
<A HREF="SETcc.htm">SETcc</A> (Set Byte on Condition cc) 
set a byte to one if condition cc is true;
sets the byte to zero otherwise. Refer to Appendix D for a definition of
the possible conditions.

<H2>3.4.6  Test Instruction</H2>
<A HREF="TEST.htm">TEST</A> (Test) 
performs the logical "and" of the two operands, clears OF and
CF, leaves AF undefined, and updates SF, ZF, and PF. The flags can be tested
by conditional control transfer instructions or by the byte-set-on-condition
instructions. The operands may be doublewords, words, or bytes.
<P>
The difference between 
<A HREF="TEST.htm">TEST</A> and 
<A HREF="AND.htm">AND</A> is that <A HREF="TEST.htm">TEST</A> 
does not alter the destination operand. 
<A HREF="TEST.htm">TEST</A> differs from <A HREF="BT.htm">BT</A> in that 
<A HREF="TEST.htm">TEST</A> is useful for testing
the value of multiple bits in one operations, whereas 
<A HREF="BT.htm">BT</A> tests a single bit.
<P>
<HR>
<P>
<B>up:</B> <A HREF="c03.htm">
Chapter 3 -- Applications Instruction Set</A><BR>
<B>prev:</B> <A HREF="s03_03.htm">3.3  Decimal Arithmetic Instructions</A><BR>
<B>next:</B> <A HREF="s03_05.htm">3.5  Control Transfer Instructions</A>
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