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📁 Programmer s Reference Manual is an improtant book on Intel processor architecture and programming.
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<!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN"><HTML><HEAD><TITLE>80386 Programmer's Reference Manual -- Opcode INC</TITLE></HEAD><BODY><B>up:</B> <A HREF="c17.htm">Chapter 17 -- 80386 Instruction Set</A><BR><B>prev:</B><A HREF="IN.htm"> IN Input from Port</A><BR> <B>next:</B><A HREF="INS.htm"> INS/INSB/INSW/INSD Input from Port to String</A><P><HR><P><H1>INC -- Increment by 1</H1><PRE>Opcode      Instruction        Clocks      DescriptionFE  /0      INC r/m8                       Increment r/m byte by 1FF  /0      INC r/m16                      Increment r/m word by 1FF  /6      INC r/m32                      Increment r/m dword by 140 + rw     INC r16                        Increment word register by 140 + rd     INC r32                        Increment dword register by 1</PRE><H2>Operation</H2><PRE>DEST := DEST + 1;</PRE><H2>Description</H2>INC adds 1 to the operand. It does not change the carry flag. To affectthe carry flag, use the <A HREF="ADD.htm">ADD</A> instruction with a second operand of 1.<H2>Flags Affected</H2>OF, SF, ZF, AF, and PF as described in <A HREF="appc.htm">Appendix C</A><H2>Protected Mode Exceptions</H2>#GP(0) if the operand is in a nonwritable segment; #GP(0) for an illegalmemory operand effective address in the CS, DS, ES, FS, or GSsegments; #SS(0) for an illegal address in the SS segment; #PF(fault-code)for a page fault<H2>Real Address Mode Exceptions</H2>Interrupt 13 if any part of the operand would lie outside of the effectiveaddress space from 0 to 0FFFFH<H2>Virtual 8086 Mode Exceptions</H2>Same exceptions as in Real Address Mode; #PF(fault-code) for a pagefault<P><HR><P><B>up:</B> <A HREF="c17.htm">Chapter 17 -- 80386 Instruction Set</A><BR><B>prev:</B><A HREF="IN.htm"> IN Input from Port</A><BR><B>next:</B><A HREF="INS.htm"> INS/INSB/INSW/INSD Input from Port to String</A></BODY>

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