📄 appa.htm
字号:
<!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN">
<HTML>
<HEAD>
<TITLE>80386 Programmer's Reference Manual -- Appendix A</TITLE>
</HEAD>
<BODY>
<B>up:</B> <A HREF="app.htm">
Appendices</A><BR>
<B>next:</B>
<A HREF="appb.htm">Appendix B -- Complete Flag Cross-Reference</A><BR>
<P>
<HR>
<P>
<H1>Appendix A -- Opcode Map</H1>
The opcode tables that follow aid in interpreting 80386 object code. Use
the high-order four bits of the opcode as an index to a row of the opcode
table; use the low-order four bits as an index to a column of the table. If
the opcode is 0FH, refer to the two-byte opcode table and use the second
byte of the opcode to index the rows and columns of that table.
<H3>Key to Abbreviations</H3>
Operands are identified by a two-character code of the form Zz. The first
character, an uppercase letter, specifies the addressing method; the second
character, a lowercase letter, specifies the type of operand.
<H3>Codes for Addressing Method</H3>
<DL>
<DT>A
<DD>Direct address; the instruction has no modR/M byte; the address of the
operand is encoded in the instruction; no base register, index register,
or scaling factor can be applied; e.g., far <A HREF="JMP.htm">JMP</A> (EA).
<DT>C
<DD>The reg field of the modR/M byte selects a control register; e.g.,
<A HREF="MOVRS.htm">MOV</A>
(0F20, 0F22).
<DT>D
<DD>The reg field of the modR/M byte selects a debug register; e.g.,
<A HREF="MOVRS.htm">MOV</A>
(0F21,0F23).
<DT>E
<DD>A modR/M byte follows the opcode and specifies the operand. The operand
is either a general register or a memory address. If it is a memory
address, the address is computed from a segment register and any of the
following values: a base register, an index register, a scaling factor,
a displacement.
<DT>F
<DD>Flags Register.
<DT>G
<DD>The reg field of the modR/M byte selects a general register; e.g.,
<A HREF="ADD.htm">ADD</A>
(00).
<DT>I
<DD>Immediate data. The value of the operand is encoded in subsequent bytes
of the instruction.
<DT>J
<DD>The instruction contains a relative offset to be added to the
instruction pointer register; e.g., <A HREF="JMP.htm">JMP</A> short,
<A HREF="LOOP.htm">LOOP</A>.
<DT>M
<DD>The modR/M byte may refer only to memory; e.g.,
<A HREF="BOUND.htm">BOUND</A>, <A HREF="LGS.htm">LES</A>,
<A HREF="LGS.htm">LDS</A>, <A HREF="LGS.htm">LSS</A>,
<A HREF="LGS.htm">LFS</A>, <A HREF="LGS.htm">LGS</A>.
<DT>O
<DD>The instruction has no modR/M byte; the offset of the operand is coded as
a word or double word (depending on address size attribute) in the
instruction. No base register, index register, or scaling factor can be
applied; e.g., <A HREF="MOV.htm">MOV</A> (A0-A3).
<DT>R
<DD>The mod field of the modR/M byte may refer only to a general register;
e.g., <A HREF="MOV.htm">MOV</A> (0F20-0F24, 0F26).
<DT>S
<DD>The reg field of the modR/M byte selects a segment register; e.g.,
<A HREF="MOV.htm">MOV</A>
(8C,8E).
<DT>T
<DD>The reg field of the modR/M byte selects a test register; e.g.,
<A HREF="MOVRS.htm">MOV</A>
(0F24,0F26).
<DT>X
<DD>Memory addressed by DS:SI; e.g., <A HREF="MOVS.htm">MOVS</A>,
<A HREF="CMPS.htm">CMPS</A>,
<A HREF="OUTS.htm">OUTS</A>,
<A HREF="LODS.htm">LODS</A>,
<A HREF="SCAS.htm">SCAS</A>.
<DT>Y
<DD>Memory addressed by ES:DI; e.g.,
<A HREF="MOVS.htm">MOVS</A>,
<A HREF="CMPS.htm">CMPS</A>,
<A HREF="INS.htm">INS</A>,
<A HREF="STOS.htm">STOS</A>.
</DL>
<H3>Codes for Operant Type</H3>
<DL>
<DT>a
<DD> Two one-word operands in memory or two double-word operands in memory,
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -