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<!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN"><HTML><HEAD><TITLE>80386 Programmer's Reference Manual -- Opcode IMUL</TITLE></HEAD><BODY><B>up:</B> <A HREF="c17.htm">Chapter 17 -- 80386 Instruction Set</A><BR><B>prev:</B><A HREF="IDIV.htm"> IDIV Signed Divide</A><BR><B>next:</B><A HREF="IN.htm"> IN Input from Port</A><P><HR><P><H1>IMUL -- Signed Multiply</H1><PRE>Opcode Instruction Clocks DescriptionF6 /5 IMUL r/m8 9-14/12-17 AX= AL * r/m byteF7 /5 IMUL r/m16 9-22/12-25 DX:AX := AX * r/m wordF7 /5 IMUL r/m32 9-38/12-41 EDX:EAX := EAX * r/m dword0F AF /r IMUL r16,r/m16 9-22/12-25 word register := word register * r/m word0F AF /r IMUL r32,r/m32 9-38/12-41 dword register := dword register * r/m dword6B /r ib IMUL r16,r/m16,imm8 9-14/12-17 word register := r/m16 * sign-extended immediate byte6B /r ib IMUL r32,r/m32,imm8 9-14/12-17 dword register := r/m32 * sign-extended immediate byte6B /r ib IMUL r16,imm8 9-14/12-17 word register := word register * sign-extended immediate byte6B /r ib IMUL r32,imm8 9-14/12-17 dword register := dword register * sign-extended immediate byte69 /r iw IMUL r16,r/m16,imm16 9-22/12-25 word register := r/m16 * immediate word69 /r id IMUL r32,r/m32,imm32 9-38/12-41 dword register := r/m32 * immediate dword69 /r iw IMUL r16,imm16 9-22/12-25 word register := r/m16 * immediate word69 /r id IMUL r32,imm32 9-38/12-41 dword register := r/m32 * immediate dword</PRE> <EM><H3>Notes</H3> The 80386 uses an early-out multiply algorithm. The actual number of clocks depends on the position of the most significant bit in the optimizing multiplier, shown underlined above. The optimization occurs for positive and negative values. Because of the early-out algorithm, clock counts given are minimum to maximum. To calculate the actual clocks, use the following formula:<PRE> Actual clock = if m <> 0 then max(ceiling(log{2}(m)), 3) + 6 clocks Actual clock = if m = 0 then 9 clocks (where m is the multiplier)</PRE>Add three clocks if the multiplier is a memory operand.</EM><H2>Operation</H2><PRE>result := multiplicand * multiplier;</PRE><H2>Description</H2>IMUL performs signed multiplication. Some forms of the instructionuse implicit register operands. The operand combinations for all formsof the instruction are shown in the "<H2>Description</H2>" column above.<P>IMUL clears the overflow and carry flags under the following conditions:<PRE> Instruction Form Condition for Clearing CF and OF r/m8 AL := sign-extend of AL to 16 bits r/m16 AX := sign-extend of AX to 32 bits r/m32 EDX:EAX := sign-extend of EAX to 32 bits r16,r/m16 Result exactly fits within r16 r/32,r/m32 Result exactly fits within r32 r16,r/m16,imm16 Result exactly fits within r16 r32,r/m32,imm32 Result exactly fits within r32</PRE><H2>Flags Affected</H2>OF and CF as described above; SF, ZF, AF, and PF are undefined<H2>Protected Mode Exceptions</H2>#GP(0) for an illegal memory operand effective address in the CS, DS,ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment;#PF(fault-code) for a page fault<H2>Real Address Mode Exceptions</H2>Interrupt 13 if any part of the operand would lie outside of the effectiveaddress space from 0 to 0FFFFH<H2>Virtual 8086 Mode Exceptions</H2>Same exeptions as in Real Address Mode; #PF(fault-code) for a pagefault<H2>Notes</H2>When using the accumulator forms (IMUL r/m8, IMUL r/m16, or IMULr/m32), the result of the multiplication is available even if the overflowflag is set because the result is two times the size of the multiplicandand multiplier. This is large enough to handle any possible result.<P><HR><P><B>up:</B> <A HREF="c17.htm">Chapter 17 -- 80386 Instruction Set</A><BR><B>prev:</B><A HREF="IDIV.htm"> IDIV Signed Divide</A><BR><B>next:</B><A HREF="IN.htm"> IN Input from Port</A></BODY>⌨️ 快捷键说明
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