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📄 s02_04.htm

📁 Programmer s Reference Manual is an improtant book on Intel processor architecture and programming.
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<!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN"><HTML><HEAD><TITLE>80386 Programmer's Reference Manual -- Section 2.4</TITLE></HEAD><BODY><B>up:</B> <A HREF="c02.htm">Chapter 2 -- Basic Programming Model</A><BR><B>prev:</B> <A HREF="s02_03.htm">2.3  Registers</A><BR><B>next:</B> <A HREF="s02_05.htm">2.5  Operand Selection</A><P><HR><P><H1>2.4  Instruction Format</H1>The information encoded in an 80386 instruction includes a specification ofthe operation to be performed, the type of the operands to be manipulated,and the location of these operands. If an operand is located in memory, theinstruction must also select, explicitly or implicitly, which of thecurrently addressable segments contains the operand.<P>80386 instructions are composed of various elements and have variousformats. The exact format of instructions is shown in Appendix B; theelements of instructions are described below. Of these instruction elements,only one, the opcode, is always present. The other elements may or may notbe present, depending on the particular operation involved and on thelocation and type of the operands. The elements of an instruction, in orderof occurrence are as follows:<UL><LI> Prefixes -- one or more bytes preceding an instruction that modify theoperation of the instruction. The following types of prefixes can beused by applications programs:<OL><LI>Segment override -- explicitly specifies which segment register aninstruction should use, thereby overriding the defaultsegment-register selection used by the 80386 for that instruction.<LI>Address size -- switches between 32-bit and 16-bit addressgeneration.<LI>Operand size -- switches between 32-bit and 16-bit operands.<LI>Repeat -- used with a string instruction to cause the instructionto act on each element of the string.</OL><LI> Opcode -- specifies the operation performed by the instruction. Someoperations have several different opcodes, each specifying a differentvariant of the operation.<LI> Register specifier -- an instruction may specify one or two registeroperands. Register specifiers may occur either in the same byte as theopcode or in the same byte as the addressing-mode specifier.<LI> Addressing-mode specifier -- when present, specifies whether an operandis a register or memory location; if in memory, specifies whether adisplacement, a base register, an index register, and scaling are to beused.<LI> SIB (scale, index, base) byte -- when the addressing-mode specifierindicates that an index register will be used to compute the address ofan operand, an SIB byte is included in the instruction to encode thebase register, the index register, and a scaling factor.<LI> Displacement -- when the addressing-mode specifier indicates that adisplacement will be used to compute the address of an operand, thedisplacement is encoded in the instruction. A displacement is a signedinteger of 32, 16, or eight bits. The eight-bit form is used in thecommon case when the displacement is sufficiently small. The processorextends an eight-bit displacement to 16 or 32 bits, taking intoaccount the sign.<LI> Immediate operand -- when present, directly provides the value of anoperand of the instruction. Immediate operands may be 8, 16, or 32 bitswide. In cases where an eight-bit immediate operand is combined in someway with a 16- or 32-bit operand, the processor automatically extendsthe size of the eight-bit operand, taking into account the sign.</UL><P><HR><P><B>up:</B> <A HREF="c02.htm">Chapter 2 -- Basic Programming Model</A><BR><B>prev:</B> <A HREF="s02_03.htm">2.3  Registers</A><BR><B>next:</B> <A HREF="s02_05.htm">2.5  Operand Selection</A></BODY>

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