📄 s02_05.htm
字号:
<!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN"><HTML><HEAD><TITLE>80386 Programmer's Reference Manual -- Section 2.5</TITLE></HEAD><BODY><B>up:</B> <A HREF="c02.htm">Chapter 2 -- Basic Programming Model</A><BR><B>prev:</B> <A HREF="s02_04.htm">2.4 Instruction Format</A><BR><B>next:</B> <A HREF="s02_06.htm">2.6 Interrupts and Exceptions</A><P><HR><P><H1>2.5 Operand Selection</H1>An instruction can act on zero or more operands, which are the datamanipulated by the instruction. An example of a zero-operand instruction is<A HREF="NOP.html">NOP</A> (no operation). An operand can be in any of these locations:<UL><LI> In the instruction itself (an immediate operand)<LI> In a register (EAX, EBX, ECX, EDX, ESI, EDI, ESP, or EBP in the caseof 32-bit operands; AX, BX, CX, DX, SI, DI, SP, or BP in the case of16-bit operands; AH, AL, BH, BL, CH, CL, DH, or DL in the case of 8-bitoperands; the segment registers; or the EFLAGS register for flagoperations)<LI> In memory<LI> At an I/O port</UL>Immediate operands and operands in registers can be accessed more rapidlythan operands in memory since memory operands must be fetched from memory.Register operands are available in the CPU. Immediate operands are alsoavailable in the CPU, because they are prefetched as part of theinstruction.<P>Of the instructions that have operands, some specify operands implicitly;others specify operands explicitly; still others use a combination ofimplicit and explicit specification; for example:<DL><DT>Implicit operand: <A HREF="AAM.htm">AAM</A><DD>By definition, <A HREF="AAM.htm">AAM</A> (ASCII adjust for multiplication) operates on thecontents of the AX register.<DT>Explicit operand: <A HREF="XCHG.htm">XCHG</A> EAX, EBX<DD>The operands to be exchanged are encoded in the instruction after theopcode.<DT>Implicit and explicit operands: <A HREF="PUSH.htm">PUSH</A> COUNTER<DD>The memory variable COUNTER (the explicit operand) is copied to the top ofthe stack (the implicit operand).</DL>Note that most instructions have implicit operands. All arithmeticinstructions, for example, update the EFLAGS register.<P>An 80386 instruction can explicitly reference one or two operands.Two-operand instructions, such as <A HREF="MOV.htm">MOV</A>, <A HREF="ADD.htm">ADD</A>, <A HREF="XOR.htm">XOR</A>, etc., generally overwriteone of the two participating operands with the result. A distinction canthus be made between the source operand (the one unaffected by theoperation) and the destination operand (the one overwritten by the result).<P>For most instructions, one of the two explicitly specified --the source or the -- be either in a register or in memory.The other operand must be in a register or be an immediate source operand.Thus, the explicit two-operand instructions of the 80386 permit operationsof the following kinds:<UL><LI> Register-to-register<LI> Register-to-memory<LI> Memory-to-register<LI> Immediate-to-register<LI> Immediate-to-memory</UL><P>Certain string instructions and stack manipulation instructions, however,transfer data from memory to memory. Both operands of some stringinstructions are in memory and are implicitly specified. Push and pop stackoperations allow transfer between memory operands and the memory-basedstack.<H2>2.5.1 Immediate Operands</H2>Certain instructions use data from the instruction itself as one (andsometimes two) of the operands. Such an operand is called an immediateoperand. The operand may be 32-, 16-, or 8-bits long. For example:<PRE><A HREF="SAL.htm">SHR</A> PATTERN, 2</PRE>One byte of the instruction holds the value 2, the number of bits by whichto shift the variable PATTERN.<PRE><A HREF="TEST.htm">TEST</A> PATTERN, 0FFFF00FFH</PRE>A doubleword of the instruction holds the mask that is used to test thevariable PATTERN.<H2>2.5.2 Register Operands</H2>Operands may be located in one of the 32-bit general registers (EAX, EBX,ECX, EDX, ESI, EDI, ESP, or EBP), in one of the 16-bit general registers(AX, BX, CX, DX, SI, DI, SP, or BP), or in one of the 8-bit generalregisters (AH, BH, CH, DH, AL, BL, CL,or DL).<P>The 80386 has instructions for referencing the segment registers (CS, DS,ES, SS, FS, GS). These instructions are used by applications programs onlyif systems designers have chosen a segmented memory model.<P>The 80386 also has instructions for referring to the flag register. Theflags may be stored on the stack and restored from the stack. Certaininstructions change the commonly modified flags directly in the EFLAGSregister. Other flags that are seldom modified can be modified indirectlyvia the flags image in the stack.<H2>2.5.3 Memory Operands</H2>Data-manipulation instructions that address operands in memory must specify(either directly or indirectly) the segment that contains the operand andthe offset of the operand within the segment. However, for speed and compactinstruction encoding, segment selectors are stored in the high speed segmentregisters. Therefore, data-manipulation instructions need to specify onlythe desired segment register and an offset in order to address a memoryoperand.<P>An 80386 data-manipulation instruction that accesses memory uses one of thefollowing methods for specifying the offset of a memory operand within itssegment:<OL><LI>Most data-manipulation instructions that access memory contain a bytethat explicitly specifies the addressing method for the operand. Abyte, known as the modR/M byte, follows the opcode and specifieswhether the operand is in a register or in memory. If the operand isin memory, the address is computed from a segment register and any ofthe following values: a base register, an index register, a scalingfactor, a displacement. When an index register is used, the modR/Mbyte is also followed by another byte that identifies the indexregister and scaling factor. This addressing method is themost flexible.<LI>A few data-manipulation instructions implicitly use specializedaddressing methods:<UL><LI> For a few short forms of <A HREF="MOV.htm">MOV</A> that implicitly use the EAX register,the offset of the operand is coded as a doubleword in theinstruction. No base register, index register, or scaling factorare used.<LI> String operations implicitly address memory via DS:ESI, (<A HREF="MOVS.htm">MOVS</A>,<A HREF="CMPS.htm">CMPS</A>, <A HREF="OUTS.htm">OUTS</A>, <A HREF="LODS.htm">LODS</A>, <A HREF="SCAS.htm">SCAS</A>) or via ES:EDI (<A HREF="MOVS.htm">MOVS</A>, <A HREF="CMPS.htm">CMPS</A>, <A HREF="INS.htm">INS</A>, <A HREF="STOS.htm">STOS</A>).<LI> Stack operations implicitly address operands via SS:ESPregisters; e.g., <A HREF="PUSH.htm">PUSH</A>, <A HREF="POP.htm">POP</A>, <A HREF="PUSHA.htm">PUSHA</A>, <A HREF="PUSHA.htm">PUSHAD</A>, <A HREF="POPA.htm">POPA</A>, <A HREF="POPA.htm">POPAD</A>, <A HREF="PUSHF.htm">PUSHF</A>,<A HREF="PUSHF.htm">PUSHFD</A>, <A HREF="POPF.htm">POPF</A>, <A HREF="POPF.htm">POPFD</A>, <A HREF="CALL.htm">CALL</A>, <A HREF="RET.htm">RET</A>, <A HREF="IRET.htm">IRET</A>, <A HREF="IRET.htm">IRETD</A>, exceptions, and interrupts.</UL></OL><H3>2.5.3.1 Segment Selection</H3>Data-manipulation instructions need not explicitly specify which segmentregister is used. For all of these instructions, specification of a segmentregister is optional. For all memory accesses, if a segment is notexplicitly specified by the instruction, the processor automatically choosesa segment register according to the rules of Table 2-1. (If systemsdesigners have chosen a flat model of memory organization, the segmentregisters and the rules that the processor uses in choosing them are notapparent to applications programs.)<P>There is a close connection between the kind of memory reference and thesegment in which that operand resides. As a rule, a memory reference impliesthe current data segment (i.e., the implicit segment selector is in DS).However, ESP and EBP are used to access items on the stack; therefore, whenthe ESP or EBP register is used as a base register, the current stacksegment is implied (i.e., SS contains the selector).<P>Special instruction prefix elements may be used to override the defaultsegment selection. Segment-override prefixes allow an explicit segmentselection. The 80386 has a segment-override prefix for each of the segmentregisters. Only in the following special cases is there an implied segmentselection that a segment prefix cannot override:<UL><LI> The use of ES for destination strings in string instructions.<LI> The use of SS in stack instructions.<LI> The use of CS for instruction fetches.</UL><P><PRE>Table 2-1. Default Segment Register Selection RulesMemory Reference Needed Segment Implicit Segment Selection RuleRegisterUsedInstructions Code (CS) Automatic with instruction prefetchStack Stack (SS) All stack pushes and pops. Anymemory reference that uses ESP orEBP as a base register.Local Data Data (DS) All data references except whenrelative to stack or stringdestination.Destination Strings Extra (ES) Destination of string instructions.</PRE><H3>2.5.3.2 Effective-Address Computation</H3>The modR/M byte provides the most flexible of the addressing methods, andinstructions that require a modR/M byte as the second byte of theinstruction are the most common in the 80386 instruction set. For memoryoperands defined by modR/M, the offset within the desired segment iscalculated by taking the sum of up to three components:<UL><LI> A displacement element in the instruction.<LI> A base register.<LI> An index register. The index register may be automatically multipliedby a scaling factor of 2, 4, or 8.</UL><P>The offset that results from adding these components is called an effectiveaddress. Each of these components of an effective address may have either apositive or negative value. If the sum of all the components exceeds 2^(32),the effective address is truncated to 32 bits.<A HREF="#fig2-10">Figure 2-10</A> illustrates thefull set of possibilities for modR/M addressing.<P>The displacement component, because it is encoded in the instruction, isuseful for fixed aspects of addressing; for example:<UL><LI> Location of simple scalar operands.<LI> Beginning of a statically allocated array.<LI> Offset of an item within a record.</UL>The base and index components have similar functions. Both utilize the sameset of general registers. Both can be used for aspects of addressing thatare determined dynamically; for example:<UL><LI> Location of procedure parameters and local variables in stack.<LI> The beginning of one record among several occurrences of the samerecord type or in an array of records.<LI> The beginning of one dimension of multiple dimension array.<LI> The beginning of a dynamically allocated array.</UL>The uses of general registers as base or index components differ in thefollowing respects:<UL><LI> ESP cannot be used as an index register.<LI> When ESP or EBP is used as the base register, the default segment isthe one selected by SS. In all other cases the default segment is DS.</UL>The scaling factor permits efficient indexing into an array in the commoncases when array elements are 2, 4, or 8 bytes wide. The shifting of theindex register is done by the processor at the time the address is evaluatedwith no performance loss. This eliminates the need for a separate shift ormultiply instruction.<P>The base, index, and displacement components may be used in anycombination; any of these components may be null. A scale factor can be usedonly when an index is also used. Each possible combination is useful fordata structures commonly used by programmers in high-level languages andassembly languages. Following are possible uses for some of the variouscombinations of address components.<DL><DT>DISPLACEMENT<DD>The displacement alone indicates the offset of the operand. Thiscombination is used to directly address a statically allocated scalaroperand. An 8-bit, 16-bit, or 32-bit displacement can be used.<DT>BASE<DD>The offset of the operand is specified indirectly in one of the generalregisters, as for "based" variables.<DT>BASE + DISPLACEMENT<DD>A register and a displacement can be used together for two distinctpurposes:<OL><LI>Index into static array when element size is not 2, 4, or 8 bytes.The displacement component encodes the offset of the beginning ofthe array. The register holds the results of a calculation todetermine the offset of a specific element within the array.<LI>Access item of a record. The displacement component locates anwithin record. The base register selects one of severaloccurrences of record, thereby providing a compact encoding forthis common function.</OL>An important special case of this combination, is to access parametersin the procedure activation record in the stack. In this case, EBP isthe best choice for the base register, because when EBP is used as abase register, the processor automatically uses the stack segmentregister (SS) to locate the operand, thereby providing a compactencoding for this common function.<DT>(INDEX * SCALE) + DISPLACEMENT<DD>This combination provides efficient indexing into a static array whenthe element size is 2, 4, or 8 bytes. The displacement addresses thebeginning of the array, the index register holds the subscript of thedesired array element, and the processor automatically converts thesubscript into an index by applying the scaling factor.<DT>BASE + INDEX + DISPLACEMENT<DD>Two registers used together support either a two-dimensional array (thedisplacement determining the beginning of the array) or one of severalinstances of an array of records (the displacement indicating an itemin the record).<DT>BASE + (INDEX * SCALE) + DISPLACEMENT<DD>This combination provides efficient indexing of a two-dimensional arraywhen the elements of the array are 2, 4, or 8 bytes wide.<P><A NAME="fig2-10"><IMG align=center SRC="fig2-10.gif" border=0><P><HR><P><B>up:</B> <A HREF="c02.htm">Chapter 2 -- Basic Programming Model</A><BR><B>prev:</B> <A HREF="s02_04.htm">2.4 Instruction Format</A><BR><B>next:</B> <A HREF="s02_06.htm">2.6 Interrupts and Exceptions</A></BODY>⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -