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📄 s07_02.htm

📁 Programmer s Reference Manual is an improtant book on Intel processor architecture and programming.
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<!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN"><HTML><HEAD><TITLE>80386 Programmer's Reference Manual -- Section 7.2</TITLE></HEAD><BODY><B>up:</B> <A HREF="c07.htm">Chapter 7 -- Multitasking</A><BR><B>prev:</B> <A HREF="s07_01.htm">7.1  Task State Segment</A><BR><B>next:</B> <A HREF="s07_03.htm">7.3  Task Register</A><P><HR><P><H1>7.2  TSS Descriptor</H1>The task state segment, like all other segments, is defined by adescriptor. <A HREF="#fig7-2">Figure 7-2</A>  shows the format of a TSS descriptor.<P>The B-bit in the type field indicates whether the task is busy. A type codeof 9 indicates a non-busy task; a type code of 11 indicates a busy task.Tasks are not reentrant. The B-bit allows the processor to detect an attemptto switch to a task that is already busy.<P>The BASE, LIMIT, and DPL fields and the G-bit and P-bit have functionssimilar to their counterparts in data-segment descriptors. The LIMIT field,however, must have a value equal to or greater than 103. An attempt toswitch to a task whose TSS descriptor has a limit less that 103 causes anexception. A larger limit is permissible, and a larger limit is required ifan I/O permission map is present. A larger limit may also be convenient forsystems software if additional data is stored in the same segment as theTSS.<P>A procedure that has access to a TSS descriptor can cause a task switch. Inmost systems the DPL fields of TSS descriptors should be set to zero, sothat only trusted software has the right to perform task switching.<P>Having access to a TSS-descriptor does not give a procedure the right toread or modify a TSS. Reading and modification can be accomplished only withanother descriptor that redefines the TSS as a data segment. An attempt toload a TSS descriptor into any of the segment registers (CS, SS, DS, ES, FS,GS) causes an exception.<P>TSS descriptors may reside only in the GDT. An attempt to identify a TSSwith a selector that has TI=1 (indicating the current LDT) results in anexception.<P><A NAME="fig7-2"><IMG align=center SRC="fig7-2.gif" border=0><P><HR><P><B>up:</B> <A HREF="c07.htm">Chapter 7 -- Multitasking</A><BR><B>prev:</B> <A HREF="s07_01.htm">7.1  Task State Segment</A><BR><B>next:</B> <A HREF="s07_03.htm">7.3  Task Register</A></BODY>

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