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📁 Programmer s Reference Manual is an improtant book on Intel processor architecture and programming.
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<!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN"><HTML><HEAD><TITLE>80386 Programmer's Reference Manual -- Section 7.7</TITLE></HEAD><BODY><B>up:</B> <A HREF="c07.htm">Chapter 7 -- Multitasking</A><BR><B>prev:</B> <A HREF="s07_06.htm">7.6  Task Linking</A><BR><B>next:</B> <A HREF="c08.htm">Chapter 8 -- Input/Output</A><BR> <P><HR><P><H1>7.7  Task Address Space</H1>The LDT selector and PDBR fields of the TSS give software systems designersflexibility in utilization of segment and page mapping features of the80386. By appropriate choice of the segment and page mappings for each task,tasks may share address spaces, may have address spaces that are largelydistinct from one another, or may have any degree of sharing between thesetwo extremes.<P>The ability for tasks to have distinct address spaces is an importantaspect of 80386 protection. A module in one task cannot interfere with amodule in another task if the modules do not have access to the same addressspaces. The flexible memory management features of the 80386 allow systemsdesigners to assign areas of shared address space to those modules ofdifferent tasks that are designed to cooperate with each other.<H2>7.7.1  Task Linear-to-Physical Space Mapping</H2>The choices for arranging the linear-to-physical mappings of tasks fallinto two general classes:<OL><LI> One linear-to-physical mapping shared among all tasks.<P>When paging is not enabled, this is the only possibility. Without pagetables, all linear addresses map to the same physical addresses.<P>When paging is enabled, this style of linear-to-physical mappingresults from using one page directory for all tasks. The linear spaceutilized may exceed the physical space available if the operatingsystem also implements page-level virtual memory.<P><LI> Several partially overlapping linear-to-physical mappings.<P>This style is implemented by using a different page directory for eachtask. Because the PDBR (page directory base register) is loaded fromthe TSS with each task switch, each task may have a different pagedirectory.</OL>In theory, the linear address spaces of different tasks may map tocompletely distinct physical addresses. If the entries of different pagedirectories point to different page tables and the page tables point todifferent pages of physical memory, then the tasks do not share any physicaladdresses.<P>In practice, some portion of the linear address spaces of all tasks mustmap to the same physical addresses. The task state segments must lie in acommon space so that the mapping of TSS addresses does not change while theprocessor is reading and updating the TSSs during a task switch. The linearspace mapped by the GDT should also be mapped to a common physical space;otherwise, the purpose of the GDT is defeated. <A HREF="#fig7-6">Figure 7-6</A>  shows how thelinear spaces of two tasks can overlap in the physical space by sharingpage tables.<H2>7.7.2  Task Logical Address Space</H2>By itself, a common linear-to-physical space mapping does not enablesharing of data among tasks. To share data, tasks must also have a commonlogical-to-linear space mapping; i.e., they must also have access todescriptors that point into a shared linear address space. There are threeways to create common logical-to-physical address-space mappings:<OL><LI> Via the GDT. All tasks have access to the descriptors in the GDT. Ifthose descriptors point into a linear-address space that is mapped toa common physical-address space for all tasks, then the tasks canshare data and instructions.<LI> By sharing LDTs. Two or more tasks can use the same LDT if the LDTselectors in their TSSs select the same LDT segment. ThoseLDT-resident descriptors that point into a linear space that is mappedto a common physical space permit the tasks to share physical memory.This method of sharing is more selective than sharing by the GDT; thesharing can be limited to specific tasks. Other tasks in the systemmay have different LDTs that do not give them access to the sharedareas.<LI> By descriptor aliases in LDTs. It is possible for certain descriptorsof different LDTs to point to the same linear address space. If thatlinear address space is mapped to the same physical space by the pagemapping of the tasks involved, these descriptors permit the tasks toshare the common space. Such descriptors are commonly called"aliases". This method of sharing is even more selective than theprior two; other descriptors in the LDTs may point to distinct linearaddresses or to linear addresses that are not shared.</OL><A NAME="fig7-6"><IMG align=center SRC="fig7-6.gif" border=0><P><HR><P><B>up:</B> <A HREF="c07.htm">Chapter 7 -- Multitasking</A><BR><B>prev:</B> <A HREF="s07_06.htm">7.6  Task Linking</A><BR><B>next:</B> <A HREF="c08.htm">Chapter 8 -- Input/Output</A><BR></BODY>

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