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<!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN"><HTML><HEAD><TITLE>80386 Programmer's Reference Manual -- Opcode LEA</TITLE></HEAD><BODY><B>up:</B> <A HREF="c17.htm">Chapter 17 -- 80386 Instruction Set</A><BR><B>prev:</B><A HREF="LAR.htm"> LAR Load Access Rights Byte</A><BR><B>next:</B><A HREF="LEAVE.htm"> LEAVE High Level Procedure Exit</A><P><HR><P><H1>LEA -- Load Effective Address</H1><PRE>Opcode Instruction Clocks Description8D /r LEA r16,m 2 Store effective address for m in register r168D /r LEA r32,m 2 Store effective address for m in register r328D /r LEA r16,m 2 Store effective address for m in register r168D /r LEA r32,m 2 Store effective address for m in register r32</PRE><H2>Operation</H2><PRE>IF OperandSize = 16 AND AddressSize = 16THEN r16 := Addr(m);ELSE IF OperandSize = 16 AND AddressSize = 32 THEN r16 := Truncate_to_16bits(Addr(m)); (* 32-bit address *) ELSE IF OperandSize = 32 AND AddressSize = 16 THEN r32 := Truncate_to_16bits(Addr(m)); ELSE IF OperandSize = 32 AND AddressSize = 32 THEN r32 := Addr(m); FI; FI; FI;FI;</PRE><H2>Description</H2>LEA calculates the effective address (offset part) and stores it in thespecified register. The operand-size attribute of the instruction(represented by OperandSize in the algorithm under "Operation" above) isdetermined by the chosen register. The address-size attribute (representedby AddressSize) is determined by the USE attribute of the segment containingthe second operand. The address-size and operand-size attributes affect theaction performed by LEA, as follows:<PRE>Operand Size Address Size Action Performed 16 16 16-bit effective address is calculated and stored in requested 16-bit register destination. 16 32 32-bit effective address is calculated. The lower 16 bits of the address are stored in the requested 16-bit register destination. 32 16 16-bit effective address is calculated. The 16-bit address is zero-extended and stored in the requested 32-bit register destination. 32 32 32-bit effective address is calculated and stored in the requested 32-bit register destination.</PRE><H2>Flags Affected</H2>None<H2>Protected Mode Exceptions</H2>#UD if the second operand is a register<H2>Real Address Mode Exceptions</H2>Interrupt 6 if the second operand is a register<H2>Virtual 8086 Mode Exceptions</H2>Same exceptions as in Real Address Mode<P><HR><P><B>up:</B> <A HREF="c17.htm">Chapter 17 -- 80386 Instruction Set</A><BR><B>prev:</B><A HREF="LAR.htm"> LAR Load Access Rights Byte</A><BR><B>next:</B><A HREF="LEAVE.htm"> LEAVE High Level Procedure Exit</A></BODY>⌨️ 快捷键说明
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