📄 fourway_matmult_4x4.cpp
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////////////////////////////////////////////
// Generated by BRCC v0.1
// BRCC Compiled on: Apr 22 2004 11:27:18
////////////////////////////////////////////
#include <brook/brook.hpp>
#include "main.h"
#include <stdio.h>
typedef struct fourway_matrix4_t {
float4 row0;
float4 row1;
float4 row2;
float4 row3;
} matrix4;typedef struct __cpustruct_fourway_matrix4_t {
__BrtFloat4 row0;
__BrtFloat4 row1;
__BrtFloat4 row2;
__BrtFloat4 row3;
}
__cpustruct_matrix4;
namespace brook {
template<> const brook::StreamType* getStreamType(matrix4*) {
static const brook::StreamType result[] = {__BRTFLOAT4, __BRTFLOAT4, __BRTFLOAT4, __BRTFLOAT4, __BRTNONE};
return result;
}
}
namespace {
using namespace ::brook::desc;
static const gpu_kernel_desc __fourway_matmult_4x4_ps20_desc = gpu_kernel_desc()
.technique( gpu_technique_desc()
.pass( gpu_pass_desc(
" ps_2_0\n"
" dcl t0.xy\n"
" dcl t1.xy\n"
" dcl_2d s0\n"
" dcl_2d s1\n"
" dcl_2d s2\n"
" dcl_2d s3\n"
" dcl_2d s4\n"
" dcl_2d s5\n"
" dcl_2d s6\n"
" dcl_2d s7\n"
" texld r8, t0, s0\n"
" texld r9, t1, s4\n"
" texld r2, t1, s5\n"
" texld r3, t1, s6\n"
" texld r5, t1, s7\n"
" texld r7, t0, s1\n"
" texld r6, t0, s2\n"
" texld r1, t0, s3\n"
" mov r0.x, r9.x\n"
" mov r0.y, r2.x\n"
" mov r0.z, r3.x\n"
" mov r0.w, r5.x\n"
" dp4 r5.x, r8, r0\n"
" mov r4.x, r9.y\n"
" mov r4.y, r2.y\n"
" mov r4.z, r3.y\n"
" mov r4.w, r5.y\n"
" dp4 r5.y, r8, r4\n"
" mov r3.x, r9.z\n"
" mov r2.x, r9.w\n"
" mov r3.y, r2.z\n"
" mov r2.y, r2.w\n"
" mov r2.z, r3.w\n"
" mov r3.w, r5.z\n"
" mov r2.w, r5.w\n"
" dp4 r5.z, r8, r3\n"
" dp4 r5.w, r8, r2\n"
" mov oC0, r5\n"
" dp4 r5.x, r7, r0\n"
" dp4 r5.y, r7, r4\n"
" dp4 r5.z, r7, r3\n"
" dp4 r5.w, r7, r2\n"
" mov oC1, r5\n"
" dp4 r5.x, r6, r0\n"
" dp4 r5.y, r6, r4\n"
" dp4 r5.z, r6, r3\n"
" dp4 r5.w, r6, r2\n"
" mov oC2, r5\n"
" dp4 r0.x, r1, r0\n"
" dp4 r0.y, r1, r4\n"
" dp4 r0.z, r1, r3\n"
" dp4 r0.w, r1, r2\n"
" mov oC3, r0\n"
"\n"
" \n"
"//!!BRCC\n"
"//narg:3\n"
"//s:0:a\n"
"//s:0:b\n"
"//o:0:result\n"
"//workspace:1024\n"
"//!!multipleOutputInfo:0:4:\n"
"//!!fullAddressTrans:0:\n"
"//!!reductionFactor:0:\n"
"")
.sampler(1, 0)
.sampler(1, 1)
.sampler(1, 2)
.sampler(1, 3)
.sampler(2, 0)
.sampler(2, 1)
.sampler(2, 2)
.sampler(2, 3)
.interpolant(1, kStreamInterpolant_Position)
.interpolant(2, kStreamInterpolant_Position)
.output(3, 0)
.output(3, 1)
.output(3, 2)
.output(3, 3)
)
);
static const void* __fourway_matmult_4x4_ps20 = &__fourway_matmult_4x4_ps20_desc;
}
namespace {
using namespace ::brook::desc;
static const gpu_kernel_desc __fourway_matmult_4x4_fp30_desc = gpu_kernel_desc()
.technique( gpu_technique_desc()
.pass( gpu_pass_desc(
"!!FP1.0\n"
"# NV_fragment_program generated by NVIDIA Cg compiler\n"
"# cgc version 1.1.0003, build date Jul 7 2003 11:55:19\n"
"# command line args: -quiet -profile fp30 -DUSERECT=1 -DCGC=1\n"
"#vendor NVIDIA Corporation\n"
"#version 1.0.02\n"
"#profile fp30\n"
"#program main\n"
"#semantic main.__structsampler0_a : TEXUNIT0\n"
"#semantic main.__structsampler1_a : TEXUNIT1\n"
"#semantic main.__structsampler2_a : TEXUNIT2\n"
"#semantic main.__structsampler3_a : TEXUNIT3\n"
"#semantic main.__structsampler0_b : TEXUNIT4\n"
"#semantic main.__structsampler1_b : TEXUNIT5\n"
"#semantic main.__structsampler2_b : TEXUNIT6\n"
"#semantic main.__structsampler3_b : TEXUNIT7\n"
"#semantic main.__workspace : C0\n"
"#var samplerRECT __structsampler0_a : TEXUNIT0 : texunit 0 : 0 : 1\n"
"#var samplerRECT __structsampler1_a : TEXUNIT1 : texunit 1 : 1 : 1\n"
"#var samplerRECT __structsampler2_a : TEXUNIT2 : texunit 2 : 2 : 1\n"
"#var samplerRECT __structsampler3_a : TEXUNIT3 : texunit 3 : 3 : 1\n"
"#var float2 _tex_a_pos : $vin.TEXCOORD0 : TEXCOORD0 : 4 : 1\n"
"#var samplerRECT __structsampler0_b : TEXUNIT4 : texunit 4 : 5 : 1\n"
"#var samplerRECT __structsampler1_b : TEXUNIT5 : texunit 5 : 6 : 1\n"
"#var samplerRECT __structsampler2_b : TEXUNIT6 : texunit 6 : 7 : 1\n"
"#var samplerRECT __structsampler3_b : TEXUNIT7 : texunit 7 : 8 : 1\n"
"#var float2 _tex_b_pos : $vin.TEXCOORD1 : TEXCOORD1 : 9 : 1\n"
"#var float4 __output_0 : $vout.COLOR0 : COLOR0 : 10 : 1\n"
"#var float4 __workspace : C0 : : 11 : 1\n"
"DECLARE __workspace;\n"
"TEX R0, f[TEX1].xyxx, TEX7, RECT;\n"
"TEX R1, f[TEX1].xyxx, TEX6, RECT;\n"
"MOVR R2.w, R0.w;\n"
"MOVR R2.z, R1.w;\n"
"MOVR R3.w, R0.z;\n"
"MOVR R3.z, R1.z;\n"
"TEX R4, f[TEX1].xyxx, TEX5, RECT;\n"
"TEX R5, f[TEX1].xyxx, TEX4, RECT;\n"
"MOVR R2.y, R4.w;\n"
"MOVR R2.x, R5.w;\n"
"MOVR R3.y, R4.z;\n"
"MOVR R3.x, R5.z;\n"
"MOVR R6.w, R0.y;\n"
"MOVR R6.z, R1.y;\n"
"MOVR R6.y, R4.y;\n"
"MOVR R6.x, R5.y;\n"
"MOVR R0.w, R0.x;\n"
"MOVR R0.z, R1.x;\n"
"MOVR R0.y, R4.x;\n"
"MOVR R0.x, R5.x;\n"
"TEX R1, f[TEX0].xyxx, TEX0, RECT;\n"
"DP4R R2.x, R1, R2;\n"
"DP4R R2.y, R1, R3;\n"
"DP4R R2.z, R1, R6;\n"
"DP4R R0.x, R1, R0;\n"
"MOVR o[COLR].w, R2.x;\n"
"MOVR o[COLR].z, R2.y;\n"
"MOVR o[COLR].y, R2.z;\n"
"MOVR o[COLR].x, R0.x;\n"
"END \n"
"##!!BRCC\n"
"##narg:3\n"
"##s:0:a\n"
"##s:0:b\n"
"##o:0:result\n"
"##workspace:1024\n"
"##!!multipleOutputInfo:0:1:\n"
"##!!fullAddressTrans:0:\n"
"##!!reductionFactor:0:\n"
"")
.sampler(1, 0)
.sampler(1, 1)
.sampler(1, 2)
.sampler(1, 3)
.sampler(2, 0)
.sampler(2, 1)
.sampler(2, 2)
.sampler(2, 3)
.interpolant(1, kStreamInterpolant_Position)
.interpolant(2, kStreamInterpolant_Position)
.output(3, 0)
)
.pass( gpu_pass_desc(
"!!FP1.0\n"
"# NV_fragment_program generated by NVIDIA Cg compiler\n"
"# cgc version 1.1.0003, build date Jul 7 2003 11:55:19\n"
"# command line args: -quiet -profile fp30 -DUSERECT=1 -DCGC=1\n"
"#vendor NVIDIA Corporation\n"
"#version 1.0.02\n"
"#profile fp30\n"
"#program main\n"
"#semantic main.__structsampler0_a : TEXUNIT0\n"
"#semantic main.__structsampler1_a : TEXUNIT1\n"
"#semantic main.__structsampler2_a : TEXUNIT2\n"
"#semantic main.__structsampler3_a : TEXUNIT3\n"
"#semantic main.__structsampler0_b : TEXUNIT4\n"
"#semantic main.__structsampler1_b : TEXUNIT5\n"
"#semantic main.__structsampler2_b : TEXUNIT6\n"
"#semantic main.__structsampler3_b : TEXUNIT7\n"
"#semantic main.__workspace : C0\n"
"#var samplerRECT __structsampler0_a : TEXUNIT0 : texunit 0 : 0 : 1\n"
"#var samplerRECT __structsampler1_a : TEXUNIT1 : texunit 1 : 1 : 1\n"
"#var samplerRECT __structsampler2_a : TEXUNIT2 : texunit 2 : 2 : 1\n"
"#var samplerRECT __structsampler3_a : TEXUNIT3 : texunit 3 : 3 : 1\n"
"#var float2 _tex_a_pos : $vin.TEXCOORD0 : TEXCOORD0 : 4 : 1\n"
"#var samplerRECT __structsampler0_b : TEXUNIT4 : texunit 4 : 5 : 1\n"
"#var samplerRECT __structsampler1_b : TEXUNIT5 : texunit 5 : 6 : 1\n"
"#var samplerRECT __structsampler2_b : TEXUNIT6 : texunit 6 : 7 : 1\n"
"#var samplerRECT __structsampler3_b : TEXUNIT7 : texunit 7 : 8 : 1\n"
"#var float2 _tex_b_pos : $vin.TEXCOORD1 : TEXCOORD1 : 9 : 1\n"
"#var float4 __output_1 : $vout.COLOR0 : COLOR0 : 10 : 1\n"
"#var float4 __workspace : C0 : : 11 : 1\n"
"DECLARE __workspace;\n"
"TEX R0, f[TEX1].xyxx, TEX7, RECT;\n"
"TEX R1, f[TEX1].xyxx, TEX6, RECT;\n"
"MOVR R2.w, R0.w;\n"
"MOVR R2.z, R1.w;\n"
"MOVR R3.w, R0.z;\n"
"MOVR R3.z, R1.z;\n"
"TEX R4, f[TEX1].xyxx, TEX5, RECT;\n"
"TEX R5, f[TEX1].xyxx, TEX4, RECT;\n"
"MOVR R2.y, R4.w;\n"
"MOVR R2.x, R5.w;\n"
"MOVR R3.y, R4.z;\n"
"MOVR R3.x, R5.z;\n"
"MOVR R6.w, R0.y;\n"
"MOVR R6.z, R1.y;\n"
"MOVR R6.y, R4.y;\n"
"MOVR R6.x, R5.y;\n"
"MOVR R0.w, R0.x;\n"
"MOVR R0.z, R1.x;\n"
"MOVR R0.y, R4.x;\n"
"MOVR R0.x, R5.x;\n"
"TEX R1, f[TEX0].xyxx, TEX1, RECT;\n"
"DP4R R2.x, R1, R2;\n"
"DP4R R2.y, R1, R3;\n"
"DP4R R2.z, R1, R6;\n"
"DP4R R0.x, R1, R0;\n"
"MOVR o[COLR].w, R2.x;\n"
"MOVR o[COLR].z, R2.y;\n"
"MOVR o[COLR].y, R2.z;\n"
"MOVR o[COLR].x, R0.x;\n"
"END \n"
"##!!BRCC\n"
"##narg:3\n"
"##s:0:a\n"
"##s:0:b\n"
"##o:0:result\n"
"##workspace:1024\n"
"##!!multipleOutputInfo:1:1:\n"
"##!!fullAddressTrans:0:\n"
"##!!reductionFactor:0:\n"
"")
.sampler(1, 0)
.sampler(1, 1)
.sampler(1, 2)
.sampler(1, 3)
.sampler(2, 0)
.sampler(2, 1)
.sampler(2, 2)
.sampler(2, 3)
.interpolant(1, kStreamInterpolant_Position)
.interpolant(2, kStreamInterpolant_Position)
.output(3, 1)
)
.pass( gpu_pass_desc(
"!!FP1.0\n"
"# NV_fragment_program generated by NVIDIA Cg compiler\n"
"# cgc version 1.1.0003, build date Jul 7 2003 11:55:19\n"
"# command line args: -quiet -profile fp30 -DUSERECT=1 -DCGC=1\n"
"#vendor NVIDIA Corporation\n"
"#version 1.0.02\n"
"#profile fp30\n"
"#program main\n"
"#semantic main.__structsampler0_a : TEXUNIT0\n"
"#semantic main.__structsampler1_a : TEXUNIT1\n"
"#semantic main.__structsampler2_a : TEXUNIT2\n"
"#semantic main.__structsampler3_a : TEXUNIT3\n"
"#semantic main.__structsampler0_b : TEXUNIT4\n"
"#semantic main.__structsampler1_b : TEXUNIT5\n"
"#semantic main.__structsampler2_b : TEXUNIT6\n"
"#semantic main.__structsampler3_b : TEXUNIT7\n"
"#semantic main.__workspace : C0\n"
"#var samplerRECT __structsampler0_a : TEXUNIT0 : texunit 0 : 0 : 1\n"
"#var samplerRECT __structsampler1_a : TEXUNIT1 : texunit 1 : 1 : 1\n"
"#var samplerRECT __structsampler2_a : TEXUNIT2 : texunit 2 : 2 : 1\n"
"#var samplerRECT __structsampler3_a : TEXUNIT3 : texunit 3 : 3 : 1\n"
"#var float2 _tex_a_pos : $vin.TEXCOORD0 : TEXCOORD0 : 4 : 1\n"
"#var samplerRECT __structsampler0_b : TEXUNIT4 : texunit 4 : 5 : 1\n"
"#var samplerRECT __structsampler1_b : TEXUNIT5 : texunit 5 : 6 : 1\n"
"#var samplerRECT __structsampler2_b : TEXUNIT6 : texunit 6 : 7 : 1\n"
"#var samplerRECT __structsampler3_b : TEXUNIT7 : texunit 7 : 8 : 1\n"
"#var float2 _tex_b_pos : $vin.TEXCOORD1 : TEXCOORD1 : 9 : 1\n"
"#var float4 __output_2 : $vout.COLOR0 : COLOR0 : 10 : 1\n"
"#var float4 __workspace : C0 : : 11 : 1\n"
"DECLARE __workspace;\n"
"TEX R0, f[TEX1].xyxx, TEX7, RECT;\n"
"TEX R1, f[TEX1].xyxx, TEX6, RECT;\n"
"MOVR R2.w, R0.w;\n"
"MOVR R2.z, R1.w;\n"
"MOVR R3.w, R0.z;\n"
"MOVR R3.z, R1.z;\n"
"TEX R4, f[TEX1].xyxx, TEX5, RECT;\n"
"TEX R5, f[TEX1].xyxx, TEX4, RECT;\n"
"MOVR R2.y, R4.w;\n"
"MOVR R2.x, R5.w;\n"
"MOVR R3.y, R4.z;\n"
"MOVR R3.x, R5.z;\n"
"MOVR R6.w, R0.y;\n"
"MOVR R6.z, R1.y;\n"
"MOVR R6.y, R4.y;\n"
"MOVR R6.x, R5.y;\n"
"MOVR R0.w, R0.x;\n"
"MOVR R0.z, R1.x;\n"
"MOVR R0.y, R4.x;\n"
"MOVR R0.x, R5.x;\n"
"TEX R1, f[TEX0].xyxx, TEX2, RECT;\n"
"DP4R R2.x, R1, R2;\n"
"DP4R R2.y, R1, R3;\n"
"DP4R R2.z, R1, R6;\n"
"DP4R R0.x, R1, R0;\n"
"MOVR o[COLR].w, R2.x;\n"
"MOVR o[COLR].z, R2.y;\n"
"MOVR o[COLR].y, R2.z;\n"
"MOVR o[COLR].x, R0.x;\n"
"END \n"
"##!!BRCC\n"
"##narg:3\n"
"##s:0:a\n"
"##s:0:b\n"
"##o:0:result\n"
"##workspace:1024\n"
"##!!multipleOutputInfo:2:1:\n"
"##!!fullAddressTrans:0:\n"
"##!!reductionFactor:0:\n"
"")
.sampler(1, 0)
.sampler(1, 1)
.sampler(1, 2)
.sampler(1, 3)
.sampler(2, 0)
.sampler(2, 1)
.sampler(2, 2)
.sampler(2, 3)
.interpolant(1, kStreamInterpolant_Position)
.interpolant(2, kStreamInterpolant_Position)
.output(3, 2)
)
.pass( gpu_pass_desc(
"!!FP1.0\n"
"# NV_fragment_program generated by NVIDIA Cg compiler\n"
"# cgc version 1.1.0003, build date Jul 7 2003 11:55:19\n"
"# command line args: -quiet -profile fp30 -DUSERECT=1 -DCGC=1\n"
"#vendor NVIDIA Corporation\n"
"#version 1.0.02\n"
"#profile fp30\n"
"#program main\n"
"#semantic main.__structsampler0_a : TEXUNIT0\n"
"#semantic main.__structsampler1_a : TEXUNIT1\n"
"#semantic main.__structsampler2_a : TEXUNIT2\n"
"#semantic main.__structsampler3_a : TEXUNIT3\n"
"#semantic main.__structsampler0_b : TEXUNIT4\n"
"#semantic main.__structsampler1_b : TEXUNIT5\n"
"#semantic main.__structsampler2_b : TEXUNIT6\n"
"#semantic main.__structsampler3_b : TEXUNIT7\n"
"#semantic main.__workspace : C0\n"
"#var samplerRECT __structsampler0_a : TEXUNIT0 : texunit 0 : 0 : 1\n"
"#var samplerRECT __structsampler1_a : TEXUNIT1 : texunit 1 : 1 : 1\n"
"#var samplerRECT __structsampler2_a : TEXUNIT2 : texunit 2 : 2 : 1\n"
"#var samplerRECT __structsampler3_a : TEXUNIT3 : texunit 3 : 3 : 1\n"
"#var float2 _tex_a_pos : $vin.TEXCOORD0 : TEXCOORD0 : 4 : 1\n"
"#var samplerRECT __structsampler0_b : TEXUNIT4 : texunit 4 : 5 : 1\n"
"#var samplerRECT __structsampler1_b : TEXUNIT5 : texunit 5 : 6 : 1\n"
"#var samplerRECT __structsampler2_b : TEXUNIT6 : texunit 6 : 7 : 1\n"
"#var samplerRECT __structsampler3_b : TEXUNIT7 : texunit 7 : 8 : 1\n"
"#var float2 _tex_b_pos : $vin.TEXCOORD1 : TEXCOORD1 : 9 : 1\n"
"#var float4 __output_3 : $vout.COLOR0 : COLOR0 : 10 : 1\n"
"#var float4 __workspace : C0 : : 11 : 1\n"
"DECLARE __workspace;\n"
"TEX R0, f[TEX1].xyxx, TEX7, RECT;\n"
"TEX R1, f[TEX1].xyxx, TEX6, RECT;\n"
"MOVR R2.w, R0.w;\n"
"MOVR R2.z, R1.w;\n"
"MOVR R3.w, R0.z;\n"
"MOVR R3.z, R1.z;\n"
"TEX R4, f[TEX1].xyxx, TEX5, RECT;\n"
"TEX R5, f[TEX1].xyxx, TEX4, RECT;\n"
"MOVR R2.y, R4.w;\n"
"MOVR R2.x, R5.w;\n"
"MOVR R3.y, R4.z;\n"
"MOVR R3.x, R5.z;\n"
"MOVR R6.w, R0.y;\n"
"MOVR R6.z, R1.y;\n"
"MOVR R6.y, R4.y;\n"
"MOVR R6.x, R5.y;\n"
"MOVR R0.w, R0.x;\n"
"MOVR R0.z, R1.x;\n"
"MOVR R0.y, R4.x;\n"
"MOVR R0.x, R5.x;\n"
"TEX R1, f[TEX0].xyxx, TEX3, RECT;\n"
"DP4R R2.x, R1, R2;\n"
"DP4R R2.y, R1, R3;\n"
"DP4R R2.z, R1, R6;\n"
"DP4R R0.x, R1, R0;\n"
"MOVR o[COLR].w, R2.x;\n"
"MOVR o[COLR].z, R2.y;\n"
"MOVR o[COLR].y, R2.z;\n"
"MOVR o[COLR].x, R0.x;\n"
"END \n"
"##!!BRCC\n"
"##narg:3\n"
"##s:0:a\n"
"##s:0:b\n"
"##o:0:result\n"
"##workspace:1024\n"
"##!!multipleOutputInfo:3:1:\n"
"##!!fullAddressTrans:0:\n"
"##!!reductionFactor:0:\n"
"")
.sampler(1, 0)
.sampler(1, 1)
.sampler(1, 2)
.sampler(1, 3)
.sampler(2, 0)
.sampler(2, 1)
.sampler(2, 2)
.sampler(2, 3)
.interpolant(1, kStreamInterpolant_Position)
.interpolant(2, kStreamInterpolant_Position)
.output(3, 3)
)
);
static const void* __fourway_matmult_4x4_fp30 = &__fourway_matmult_4x4_fp30_desc;
}
namespace {
using namespace ::brook::desc;
static const gpu_kernel_desc __fourway_matmult_4x4_arb_desc = gpu_kernel_desc()
.technique( gpu_technique_desc()
.pass( gpu_pass_desc(
"!!ARBfp1.0\n"
"OUTPUT oC0 = result.color;\n"
"TEMP r0;\n"
"TEMP r1;\n"
"TEMP r2;\n"
"TEMP r3;\n"
"TEMP r4;\n"
"TEMP r5;\n"
"ATTRIB t0 = fragment.texcoord[0];\n"
"ATTRIB t1 = fragment.texcoord[1];\n"
"TEX r4, t1, texture[4], RECT;\n"
"TEX r2, t1, texture[5], RECT;\n"
"TEX r3, t1, texture[6], RECT;\n"
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