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📄 usb_phci.h

📁 linux下的usb开发
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/************************************************************************ * Philips ISP1362 Host Controller Driver * * Copyright  2002	Philips Semiconductors, *	All rights are reserved.  Reproduction in whole or *	part is prohibited without the prior written consent of *	the copyright owner. * * File Name:	usb_phci.h * * History:	 * *	Version	Date		Author		Comments * ------------------------------------------------- * 	1.0		09/23/02	SYARRA		Initial Creation * ************************************************************************/#ifndef __USB_PHCI_H__#define	__USB_PHCI_H__#include "hal_intf.h"/*--------------------------*//* ED States 				*//*--------------------------*/#define 	ED_NEW 					0x00#define 	ED_UNLINK 				0x01#define 	ED_OPER					0x02#define 	ED_DEL					0x04#define 	ED_URB_DEL  			0x08/*--------------------------*//* usb_phci_ed 				*//*--------------------------*/typedef struct ed {	__u32 		hwINFO;       	/* hw information */	__u32 		hwTailP;		/* td Tail Pointer */	__u32 		hwHeadP;		/* td Head poinetr */	__u32 		hwNextED;		/* Next ED pointer */	struct ed 	* ed_prev;  	/* Previous ed pointer */	__u8 		int_period;		/* Interrupt period (Int,ISO) */	__u8 		int_branch;		/* Interrupt table index (Int,ISO) */	__u8 		int_load; 		/* load for this ed */	__u8 		int_interval;	__u8 		state;			/* ED State */	__u8 		type; 			/* Type of transfer */	__u16 		last_iso;		/* Last ISochronous? (ISO) */	__u8		td_ptd_index;	/* Td-PTD map index for this ptd */	__u8		total_isoc_tds;	__u16		reserved_word;	void		*empty1;		/* Make the structure length to 32 byte boundary */	void		*empty2;	void		*empty3;    struct ed 	* ed_rm_list;	/* Rm list pointer */   } ed_t; /*------------------------------*//* TD info field 				*//*------------------------------*/#define 	TD_CC							0xf0000000			/* Condifion code mask */#define 	TD_CC_GET(td_p) 				((td_p >>28) & 0x0f)		/* Condition code get */#define 	TD_CC_SET(td_p, cc) 			(td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28) /* Condition code set */#define 	TD_EC       					0x0C000000			/* Error count mask */#define 	TD_T        					0x03000000			/* Toggle mask */#define 	TD_T_DATA0  					0x02000000			/* Data0 toggle */#define 	TD_T_DATA1  					0x03000000			/* DATA1 toggle */#define 	TD_T_TOGGLE 					0x00000000			/* Toggle is carried from ED */#define 	TD_R        					0x00040000			/* Buffer rounding */#define 	TD_DI       					0x00E00000			/* Delay Interrupt mask */#define 	TD_DI_SET(X) 					(((X) & 0x07)<< 21)	/* set delay Interrupt */#define 	TD_DP       					0x00180000			/* Direction of PID mask */#define 	TD_DP_SETUP 					0x00000000			/* Direction Set up */#define 	TD_DP_IN    					0x00100000			/* Direction IN */#define 	TD_DP_OUT   					0x00080000			/* Direction OUT */#define 	TD_ISO							0x00010000#define 	TD_DEL      					0x00020000/* CC Codes */#define 	TD_CC_NOERROR      				0x00		/* NO error */#define 	TD_CC_CRC          				0x01		/* CRC Error */#define 	TD_CC_BITSTUFFING  				0x02		/* Bit stuffing Error */#define 	TD_CC_DATATOGGLEM  				0x03		/* Data toggle mismatch error */#define 	TD_CC_STALL        				0x04		/* received stall */#define 	TD_DEVNOTRESP      				0x05		/* Device not responding */#define 	TD_PIDCHECKFAIL    				0x06		/* PID Check failure */#define 	TD_UNEXPECTEDPID   				0x07		/* Unexpected error */#define 	TD_DATAOVERRUN     				0x08		/* Data over run */#define 	TD_DATAUNDERRUN    				0x09		/* Data under run */#define 	TD_BUFFEROVERRUN   				0x0C		/* Buffer over run */#define 	TD_BUFFERUNDERRUN  				0x0D		/* Buffer under run */#define 	TD_NOTACCESSED     				0x0E		/* Not accessed */#define 	MAXPSW 							1typedef struct td { 	__u32 		hwINFO;  	__u32 		hwCBP;						/* Current Buffer Pointer */  	__u32 		hwNextTD;					/* Next TD Pointer */  	__u32 		hwBE;						/* Memory Buffer End Pointer */  	__u16 		hwPSW[MAXPSW];  	__u8 		retry_count;				/* Retry count */  	__u8 		index;						/* Index in urb */  	struct ed 	* ed;						/* pointer to ed attached to */  	struct td 	* next_dl_td;				/* next td */  	urb_t 		* urb;						/* Urb request it belongs to */} td_t;#define 	OHCI_ED_SKIP			(1 << 14)#define		PTD_MAX_RETRY_COUNT		9/* * The HCCA (Host Controller Communications Area) is a 256 byte * structure defined in the OHCI spec. that the host controller is * told the base address of.  It must be 256-byte aligned. */ #define 	NUM_INTS 					32	/* part of the OHCI standard *//* * Maximum number of root hub ports.   */#define 	MAX_ROOT_PORTS				2	/* maximum OHCI root hub ports *//* OHCI CONTROL AND STATUS REGISTER MASKS *//* * HcControl (control) register masks */#define 	OHCI_CTRL_CBSR				(3 << 0)			/* control/bulk service ratio */#define 	OHCI_CTRL_PLE				(1 << 2)			/* periodic list enable */#define 	OHCI_CTRL_IE				(1 << 3)			/* isochronous enable */#define 	OHCI_CTRL_CLE				(1 << 4)			/* control list enable */#define 	OHCI_CTRL_BLE				(1 << 5)			/* bulk list enable */#define 	OHCI_CTRL_HCFS				(3 << 6)			/* host controller functional state */#define 	OHCI_CTRL_IR				(1 << 8)			/* interrupt routing */#define 	OHCI_CTRL_RWC				(1 << 9)			/* remote wakeup connected */#define 	OHCI_CTRL_RWE				(1 << 10)			/* remote wakeup enable *//* Added for Philips HC Used i.o Interrupt routing as IR is not supportedby Philips HC */#define		OHCI_CTRL_TIP				(1 << 8)			/* Transfer in progress *//* pre-shifted values for HCFS */#	define OHCI_USB_RESET				(0 << 6)#	define OHCI_USB_RESUME				(1 << 6)#	define OHCI_USB_OPER				(2 << 6)#	define OHCI_USB_SUSPEND				(3 << 6)/* * HcCommandStatus (cmdstatus) register masks */#define 	OHCI_HCR					(1 << 0)			/* host controller reset */#define 	OHCI_CLF  					(1 << 1)			/* control list filled */#define 	OHCI_BLF  					(1 << 2)			/* bulk list filled */#define 	OHCI_OCR  					(1 << 3)			/* ownership change request */#define 	OHCI_SOC  					(3 << 16)			/* scheduling overrun count *//* Virtual Root HUB */struct virt_root_hub {	int 				devnum; 			/* Address of Root Hub endpoint */ 	void 				* urb;				/* Root hub urb pointer */	void 				* int_addr;	int 				send;	int 				interval;	struct timer_list 	rh_int_timer;		/* root hub interval timer */};/* USB HUB CONSTANTS (not OHCI-specific; see hub.h) */ /* destination of request */#define 	RH_INTERFACE               	0x01			/* Root hub interface related request */#define 	RH_ENDPOINT                	0x02			/* Root hub end point  related request */#define 	RH_OTHER                   	0x03			/* Root hub other request */#define 	RH_CLASS                   	0x20			/* Root hub class specific */#define 	RH_VENDOR                  	0x40			/* Root hub vender specific *//* Requests: bRequest << 8 | bmRequestType */#define 	RH_GET_STATUS           	0x0080			/* Root hub get status */#define 	RH_CLEAR_FEATURE        	0x0100			/* Root hub clear feature */#define 	RH_SET_FEATURE          	0x0300			/* Root hub clear feature */#define 	RH_SET_ADDRESS				0x0500			/* Root hub set address */#define 	RH_GET_DESCRIPTOR			0x0680			/* Root hub get descriptor */#define 	RH_SET_DESCRIPTOR       	0x0700			/* Root hub set descriptor */#define 	RH_GET_CONFIGURATION		0x0880			/* Root hub get configuration */#define 	RH_SET_CONFIGURATION		0x0900			/* Root hub set configuration */#define 	RH_GET_STATE            	0x0280			/* Root hub get state */#define 	RH_GET_INTERFACE        	0x0A80			/* root hub get inferface */#define 	RH_SET_INTERFACE        	0x0B00			/* Root hub set Interface */#define 	RH_SYNC_FRAME          	 	0x0C80/* Our Vendor Specific Request */#define 	RH_SET_EP               	0x2000/* Hub port features */#define 	RH_PORT_CONNECTION         0x00#define 	RH_PORT_ENABLE             0x01#define 	RH_PORT_SUSPEND            0x02#define 	RH_PORT_OVER_CURRENT       0x03#define 	RH_PORT_RESET              0x04#define 	RH_PORT_POWER              0x08#define 	RH_PORT_LOW_SPEED          0x09#define 	RH_C_PORT_CONNECTION       0x10#define 	RH_C_PORT_ENABLE           0x11#define 	RH_C_PORT_SUSPEND          0x12#define 	RH_C_PORT_OVER_CURRENT     0x13#define 	RH_C_PORT_RESET            0x14  /* Hub features */#define 	RH_C_HUB_LOCAL_POWER       0x00				/* Hub local powered */#define 	RH_C_HUB_OVER_CURRENT      0x01				/* Hub over current */#define 	RH_DEVICE_REMOTE_WAKEUP    0x00				#define 	RH_ENDPOINT_STALL          0x01#define 	RH_ACK                     0x01#define 	RH_REQ_ERR                 -1#define 	RH_NACK                    0x00/* OHCI ROOT HUB REGISTER MASKS */ /* roothub.portstatus [i] bits */#define 	RH_PS_CCS            		0x00000001   			/* current connect status */#define 	RH_PS_PES            		0x00000002   			/* port enable status*/#define 	RH_PS_PSS            		0x00000004   			/* port suspend status */#define 	RH_PS_POCI           		0x00000008   			/* port over current indicator */#define 	RH_PS_PRS            		0x00000010  			/* port reset status */#define 	RH_PS_PPS            		0x00000100   			/* port power status */#define 	RH_PS_LSDA           		0x00000200    			/* low speed device attached */#define 	RH_PS_CSC            		0x00010000 				/* connect status change */#define 	RH_PS_PESC           		0x00020000   			/* port enable status change */#define 	RH_PS_PSSC           		0x00040000    			/* port suspend status change */#define 	RH_PS_OCIC           		0x00080000    			/* over current indicator change */#define 	RH_PS_PRSC           		0x00100000   			/* port reset status change */	/* roothub.status bits */#define 	RH_HS_LPS	     			0x00000001				/* local power status */#define 	RH_HS_OCI	     			0x00000002				/* over current indicator */#define 	RH_HS_DRWE	     			0x00008000				/* device remote wakeup enable */#define 	RH_HS_LPSC	     			0x00010000				/* local power status change */#define 	RH_HS_OCIC	     			0x00020000				/* over current indicator change */#define 	RH_HS_CRWE	     			0x80000000				/* clear remote wakeup enable *//* roothub.b masks */#define 	RH_B_DR						0x0000ffff				/* device removable flags */#define 	RH_B_PPCM					0xffff0000				/* port power control mask */	/* roothub.a masks */#define		RH_A_NDP					(0xff << 0)				/* number of downstream ports */#define		RH_A_PSM					(1 << 8)				/* power switching mode */#define		RH_A_NPS					(1 << 9)				/* no power switching */#define		RH_A_DT						(1 << 10)				/* device type (mbz) */#define		RH_A_OCPM					(1 << 11)				/* over current protection mode */#define		RH_A_NOCP					(1 << 12)				/* no over current protection */#define		RH_A_POTPGT					(0xff << 24)			/* power on to power good time */#define 	min_hcd(a,b) 				(((a)<(b))?(a):(b))  #define 	max_hcd(a,b) 				(((a)>(b))?(a):(b))   /* urb */typedef struct {	ed_t 				* ed;	__u16 				length;			// number of tds associated with this request	__u16 				td_cnt;			// number of tds already serviced	int   				state;	wait_queue_head_t 	* wait;	td_t 				* td[0];		// list pointer to all corresponding TDs associated with this request} urb_priv_t;#define 	URB_DEL 					1#ifdef CONFIG_USB_HCDC_OTG#define		OTG_PORT_OPEN_PORT			0x0#define		OTG_PORT_GET_ENUM			0x1#define		OTG_PORT_SUSPEND			0x2#define		OTG_PORT_DISCONNECT_PORT	0x3#define		OTG_PORT_OPEN_PORT_IMM		0x4#define 	OTG_HC_PORT_NO			0	//select roothub port 0 as OTG porttypedef struct {	void	*priv_data;	void	(*otg_notif)(void *otg_priv);	void	*hc_priv_data;} phci_otg_data_t;extern	int		phci_register_otg(phci_otg_data_t	*otg_data);extern	void	phci_unregister_otg(phci_otg_data_t	*otg_data);#endif /* CONFIG_USB_HCDC_OTG *//* This is not the complete ISP1362 register set, but some ISP1362 specific *  registers stored at the begining of ISR processing */typedef struct phci_regs {	__u16	chip_id;	__u32	int_reg;	/* ISP1362 specific */	__u32	intrstatus;	/* OHCI compatible */	__u32	intrenable;	/* OHCI compatible */} phci_regs_t;/* * This is the full phci controller description * * Note how the "proper" USB information is just * a subset of what the full implementation needs. (Linus) */typedef struct phci {	int 				disabled;			// e.g. got a UE, we're hung 	atomic_t 			resume_count;		// defending against multiple resumes	struct list_head 	phci_hcd_list;		// list of all phci_hcd

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