usb_phci.c

linux下的usb开发

	if (uData == YES)
		uHostConfigData |= HC_CONTROL_CLE;

	uData = BULK_LIST_ENABLE;					/* Bulk Transfer Enabled ? */
	if (uData == YES)
		uHostConfigData |= HC_CONTROL_BLE;

	/* Note: HC_CONTROL_TIP (Transfer In Progress) is alreday set to 0 */
	phci->hc_control = (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_PLE | OHCI_USB_OPER ;

	fnvPhciHcorWrite(phci,uHcHcdControl, uHostConfigData);

} /* End of fnvHcControlInit() */

/*--------------------------------------------------------------*
 * Host Controller Interrupt Register Initialization
 *--------------------------------------------------------------*/
void fnvHcInterruptInit(phci_t *phci) {

	__u32 uHostConfigData;

	func_debug(("fnvHcInterruptInit(phci = 0x%p)\n",phci))

	/* First of all, disable all interrupts */
	uHostConfigData = HC_INTERRUPT_ALL;
	fnvPhciHcorWrite(phci,uHcInterruptDisable, uHostConfigData);

	uHostConfigData = 0;

	/* Master Interrupt Enable */
	uHostConfigData |= HC_INTERRUPT_MIE;

	/* Write the configuration to uHcInterruptEnable register */
	fnvPhciHcorWrite(phci,uHcInterruptEnable, uHostConfigData);


} /* End of fnvHcInterruptInit() */

/*--------------------------------------------------------------*
 * Host Controller Frame Number interval Initialization
 *--------------------------------------------------------------*/
void fnvHcFmIntervalInit(phci_t *phci) {

	__u32 uHostConfigData;

	func_debug(("fnvHcFmIntervalInit(phci = 0x%p)\n",phci))

	/* Determine the fram interval and the largest data size */
	uHostConfigData = FRAME_INTERVAL | (FS_LARGEST_DATA << 16);

	/* Write the configuration to uHcFmInterval register */
	fnvPhciHcorWrite(phci,uHcFmInterval, uHostConfigData);

} /* End of fnvHcFmIntervalInit() */


/*--------------------------------------------------------------*
 * Host Controller Roothub registers Initialization
 *--------------------------------------------------------------*/
void fnvHcRhPower(phci_t *phci) {

	__u32 uData;
	__u32 uHostConfigData;

	func_debug(("fnvHcRhPower(phci = 0x%p)\n",phci))

	/* Initialize the configuration data */
	uHostConfigData = 0;

	/* Enable or disable power switching */
	uData = PORT_POWER_SWITCHING;

	if (uData == NO)	/* No power switching; ports are always powered on when the HC is powered on */
		uHostConfigData |= HC_RH_DESCRIPTORA_NPS;

	else {

		/********************************************************/
		/* Power switching is enabled                           */
		/* Program root hub in per-port switching mode          */
		/********************************************************/
		uHostConfigData |= HC_RH_DESCRIPTORA_PSM;

	} /* else */


	/* Port over current protection */
	uData = OVER_CURRENT_PROTECTION;
	if (uData == NO)					/* No over current protection */
		uHostConfigData |= HC_RH_DESCRIPTORA_NOCP;

	else
		uData = PER_PORT_OVER_CURRENT_REPORT;
		if (uData == YES)
			uHostConfigData |= HC_RH_DESCRIPTORA_OCPM;

	/* Set the power on to power good time */
	uHostConfigData |= ((POWER_ON_TO_POWER_GOOD_TIME / 2) << 24);			/* Divided by 2, then move it into position */

	fnvPhciHcorWrite(phci,uHcRhDescriptorA, uHostConfigData);

	/* Set the global power to all the ports */
        uHostConfigData = RH_HS_LPSC;
        fnvPhciHcorWrite(phci,uHcRhStatus, uHostConfigData);

	/* Wait till the POWER ON TO POWER GOOD time */
        isp1362_mdelay(POWER_ON_TO_POWER_GOOD_TIME);


	/* Set the HcRhDescriptorB register (13h) */
	uHostConfigData = DEVICE_REMOVABLE;

	if (PORT_POWER_SWITCHING == YES)
		uHostConfigData |= 0xFFFF0000;		/* Set PPCM bits 31..16 to disable gang-mode power switching */

	fnvPhciHcorWrite(phci,uHcRhDescriptorB, uHostConfigData);

} /* End of fnvHcRhPower() */


/*--------------------------------------------------------------*
 * Host Controller Initialization
 *--------------------------------------------------------------*/
int	 fnuPhciHostInit(phci_t	*phci) {

	struct usb_device 	*usb_dev;

	func_debug(("fnuPhciHostInit(phci = 0x%p)\n",phci))

	/* 1. Host Controller Extended Registers Initialization */
	isp1362_set_hw_config(phci->phci_dev);

	fnvHcIntEnable(phci);

	fnvHcRamBufferInit(phci);

	phci_init_map_buffers(phci);

	fnvHcControlInit(phci);			 	/* Initialize HcControl register */
	
	phci->disabled = 0;

	fnvHcInterruptInit(phci);			/* Initialize HcInterruptEnable/Disable registers */

	fnvHcFmIntervalInit(phci);			/* Initialize HcFmInterval Register */

	fnvHcRhPower(phci);					/* Root hub port power switching mode */

	phci->rh.devnum = 0;				/* No root hub yet */

	phci->p_ed_controlhead = NULL;		/* Initialize control & bulk list heads */
	phci->p_ed_bulkhead = NULL;

#ifndef CONFIG_USB_HCDC_OTG
	/* Select the port 1 to HC by writing the OTG Control register
	 * HC_DC_SEL to HC */
	phci_reg_write16(0x62,0x0601);	
#endif /* CONFIG_USB_HCDC_OTG */

	/* Allocate data structure for root hub */
	usb_dev = usb_alloc_dev ( NULL, phci->bus) ;
	
	if( !usb_dev ) {
		phci->disabled = 1;
		return -ENOMEM;
	}

	phci->bus->root_hub = usb_dev;

	/* Connect the virtual hub to the usb bus, host stack will do all the enumeration,
	   configuration etc.. */
	usb_connect (usb_dev); 

	if(usb_new_device(usb_dev) != 0) {
		usb_free_dev(usb_dev);
		phci->disabled = 1;
		return -ENODEV;
	}

	return 0;
} /* End of fnuPhciHostInit() */



/*--------------------------------------------------------------*
 * HC  TD-PTD functions 										* 
 *--------------------------------------------------------------*/

static __u8		td_ptd_buff_type_max_ptds[TD_PTD_TOTAL_BUFF_TYPES] = {
	TD_PTD_MAX_ATL_TDS,
	TD_PTD_MAX_INTL_TDS,
	TD_PTD_MAX_ISTL_TDS,
	TD_PTD_MAX_ISTL_TDS
};

static __u8		hc_ram_buff_port_reg[TD_PTD_TOTAL_BUFF_TYPES] = {
	REG_ATL_BUFF_PORT,
	REG_INTL_BUFF_PORT,
	REG_ISTL0_BUFF_PORT,
	REG_ISTL1_BUFF_PORT
};

static __u16	hc_ram_buff_lengths[TD_PTD_TOTAL_BUFF_TYPES] = {
	HC_ATL_BUFFER_LENGTH,
	HC_INTL_BUFFER_LENGTH,
	HC_ISTL_BUFFER_LENGTH,
	HC_ISTL_BUFFER_LENGTH
};

static __u16	hc_ram_buff_block_pl_size[TD_PTD_TOTAL_BUFF_TYPES] = {
	HC_ATL_BLK_PL_SIZE,
	HC_INTL_BLK_PL_SIZE,
	HC_ISTL_BLK_PL_SIZE,
	HC_ISTL_BLK_PL_SIZE
};

static __u16	hc_ram_buff_address[TD_PTD_TOTAL_BUFF_TYPES] = {
	HC_ATL_ADDRESS,
	HC_INTL_ADDRESS,
	HC_ISTL_0_ADDRESS,
	HC_ISTL_1_ADDRESS
};

#ifdef __PHCI_DEBUG_DETAIL__

/*--------------------------------------------------------------*
 * HC TD-PTD map buffers print functions 						* 
 *--------------------------------------------------------------*/
void phci_print_map_buffers(__u8	index) {
	__u8	index1;
	td_ptd_map_buff_t	*ptd_map_buff;

	ptd_map_buff = &(td_ptd_map_buff[index]);
	printk("buffer:: %p, buffer type:: %d\n",ptd_map_buff, ptd_map_buff->buffer_type);
	printk("\tbuffer active_ptds:: %d \n\tbuffer total_ptds:: %d\n",ptd_map_buff->active_ptds, ptd_map_buff->total_ptds);
	printk("\tbuffer max_ptds:: %d \n\tbuffer active_ptd_bitmap:: %x\n",ptd_map_buff->max_ptds, ptd_map_buff->active_ptd_bitmap);
	printk("\tbuffer skip_ptd_bitmap:: %x \n\tbuffer ram_buff_addr:: %x \n",ptd_map_buff->skip_ptd_bitmap, ptd_map_buff->ram_buff_addr);

	printk("\tbuffer buffer_length:: %d \n\tbuffer buffer_port:: %d\n",ptd_map_buff->regs.buffer_length, ptd_map_buff->regs.buffer_port);
	printk("\tbuffer block_pl_size:: %d \n\tbuffer toggle_rate:: %d\n",ptd_map_buff->regs.block_pl_size, ptd_map_buff->regs.toggle_rate);
	printk("\tbuffer last_ptd:: %d \n\tbuffer ptd_done_map:: %x\n",ptd_map_buff->regs.last_ptd, ptd_map_buff->regs.ptd_done_map);
	printk("\tbuffer ptd_skip_map:: %x \n\tbuffer curr_active_ptd:: %d\n",ptd_map_buff->regs.ptd_skip_map, ptd_map_buff->regs.curr_active_ptd);
	printk("\tbuffer threshold_count:: %d \n\tbuffer threshold_timeout:: %d\n",ptd_map_buff->regs.threshold_count, ptd_map_buff->regs.threshold_timeout);

	for(index1=0; index1<ptd_map_buff->max_ptds;index1++){
		printk("td_ptd_map = %p\n", &(ptd_map_buff->map_list[index1]));
		printk("\t\tbuffer state:: %d \n\t\tbuffer total_bytes:: %d\n",ptd_map_buff->map_list[index1].state, ptd_map_buff->map_list[index1].total_bytes);
		printk("\t\tbuffer ptd_bitmap:: %x \n\t\tbuffer td:: %p\n",ptd_map_buff->map_list[index1].ptd_bitmap, ptd_map_buff->map_list[index1].td);
	}

} /* phci_print_map_buffers */

/*--------------------------------------------------------------*
 * print buffer data in hex format functions 					* 
 *--------------------------------------------------------------*/
void phci_print_hex_data(__u8	*data, __u32	length) {
	__u32	index;

	for(index = 0; index < length; index++) {
		if(index%8 == 0) printk("\n");
		printk(" 0x%2x  ", data[index]);
	}
	printk("\n");
	
	return;
}

/*--------------------------------------------------------------*
 * HC TD-PTD map buffers print functions 						* 
 *--------------------------------------------------------------*/
void phci_print_ptd_header(__u8	*header, __u32	pipe) {
	
	__u16	data;
	
#ifdef CONFIG_USB_PHCD_EVEN_SCH
	__u8	poll_int;
#endif /* CONFIG_USB_PHCD_EVEN_SCH */

	printk("  0x%x  0x%x  0x%x  0x%x  0x%x  0x%x  0x%x  0x%x\n",header[0],header[1],header[2],header[3],header[4],header[5],header[6],header[7]);

	printk("PTD_HEADER for pipe :: %s\n", ((pipe==PIPE_CONTROL) ? "CONTROL" : ((pipe == PIPE_INTERRUPT) ? "INTERRUPT" : ((pipe == PIPE_BULK) ? "BULK" : "ISOCHRONOUS"))));
	data = ((header[1] & 0x03) << 8);
	data |= header[0];
	printk("     Actual Bytes: %d\n", data);
	data = header[1];
	printk("     CC: 0x%x     %s     toggle: %d\n", ((data & 0xF0)>>4), (data&0x8) ? "ACTIVE" : "NOT ACTIVE", (data&0x4)>>2);
	data = ((header[3] & 0x03) << 8);
	data |= header[2];
	printk("     Max Packet Size: %d\n", data);
	data = header[3];
	if(pipe == PIPE_ISOCHRONOUS) {
		printk("     EN: %x     %s    %s\n", ((data & 0xF0)>>4), (data&0x8) ? "LAST PTD" : "", (data&0x4) ? "LOW SPEED" : "FULL SPEED");
	} else {
		printk("     EN: %x     %s\n", ((data & 0xF0)>>4), (data&0x4) ? "LOW SPEED" : "FULL SPEED");
	}
	data = ((header[5] & 0x03) << 8);
	data |= header[4];
	printk("     Total Bytes: %d\n", data);
	data = header[5];
	if(pipe == PIPE_INTERRUPT) {
		printk("     Dir:: %s\n", ( ((data & 0xC) == 0) ? "SETUP" : (((data & 0xC) == 0x4) ? "OUT" : "IN")));
		data = header[6];
#ifdef CONFIG_USB_PHCD_EVEN_SCH
		poll_int = ((header[6] & 0xE0) >> 5) ;
		printk("     Addr: %d     poll interval = %d milli seconds, start fn# = %d\n", data & 0x7F, ((poll_int == 0) ? 1 : ( (poll_int == 2) ? 2 : ((poll_int == 4) ? 4 : ((poll_int == 6) ? 8 : ((poll_int == 8) ? 16 : 32))))), (header[7] & 0x1F));
#else
		printk("     Addr: %d     poll interval = %d milli seconds\n", data & 0x7F, ((header[7] == 0) ? 1 : ( (header[7] == 2) ? 2 : ((header[7] == 4) ? 4 : ((header[7] == 6) ? 8 : ((header[7] == 8) ? 16 : 32))))));
#endif /* CONFIG_USB_PHCD_EVEN_SCH */
	} else if( pipe == PIPE_ISOCHRONOUS) {
		printk("     Dir:: %s\n", ( ((data & 0xC) == 0) ? "SETUP" : (((data & 0xC) == 0x4) ? "OUT" : "IN")));
		data = header[6];
		printk("     Addr: %d     fn = 0x%x\n", data & 0x7F, header[7]);
	} else {
		if(data & 0x80) {
			printk("     PAIRED  %s  Dir:: %s\n", (data & 0x40) ? "PONG" : "PING", ( ((data & 0xC) == 0) ? "SETUP" : (((data & 0xC) == 0x4) ? "OUT" : "IN")));
		} else {
			printk("     NOT PAIRED     Dir:: %s\n", ( ((data & 0xC) == 0) ? "SETUP" : (((data & 0xC) == 0x4) ? "OUT" : "IN")));
		}
		data = header[6];
		printk("     Addr: %d\n", data & 0x7F);
	}

} /* phci_print_ptd_header */

void phci_print_hc_regs(phci_t	*phci, __u8	buff_type) {
	__u32	data_read = 0;

	if(buff_type ==  TD_PTD_BUFF_TYPE_ATL) {
		phci_reg_read16(REG_BUFF_STS,&data_read);
		printk("Buffer Status = %x", data_read);
		data_read = 0;
		phci_reg_read16(REG_IRQ_MASK, &data_read);
		printk("  Irq_mask = %x\n", data_read);
		data_read = 0;
		phci_reg_read16(REG_ISTL_BUFF_LEN, &data_read);
		printk("  Istl Buffer_len = %x", data_read);
		data_read = 0;
		phci_reg_read16(REG_INTL_BUFF_LEN, &data_read);
		printk("  INTL Buffer_len = %x", data_read);
		data_read = 0;
		phci_reg_read16(REG_ATL_BUFF_LEN, &data_read);
		printk(" Buffer_len = %x", data_read);
		data_read = 0;
		phci_reg_read16(REG_ATL_BLK_PL_SIZE, &data_read);
		printk("  Block_pl_size = %x\n", data_read);
		data_read = 0;
		phci_reg_read16(REG_ATL_THRESHOLD_COUNT,&data_read);
		printk("threshold_count = %x", data_read);
		data_read = 0;
		phci_reg_read16(REG_ATL_THRESHOLD_TIMEOUT,&data_read);
		printk("  threshold_timeout = %x\n", data_read);
		data_read = 0;
		phci_reg_read32(REG_ATL_PTD_DONE_MAP, &data_read);
		printk("done_map = %x", data_read);
		data_read = 0;
		phci_reg_read32(REG_ATL_PTD_SKIP_MAP, &data_read);
		printk("  skip_map %x\n", data_read);
		data_read = 0;
		phci_reg_read32(REG_ATL_PTD_LAST_PTD,&data_read);		
		printk("last_ptd_map %x", data_read);
		data_read = 0;
		phci_reg_read16(REG_ATL_CURR_ACTIVE_PTD,&data_read);		
		printk("  curr_act_ptd %x\n", data_read);
	} else if(buff_type ==  TD_PTD_BUFF_TYPE_INTL) {
		phci_reg_read16(REG_BUFF_STS,&data_read);
		printk("Buffer Status = %x", data_read);
		data_read = 0;
		phci_reg_read16(REG_IRQ_MASK, &data_read);
		printk("  Irq_mask = %x\n", data_read);
		data_read = 0;
		phci_reg_read16(REG_ISTL_BUFF_LEN, &data_read);
		printk("  Istl Buffer_len = %x", data_read);
		data_read = 0;
		phci_reg_read16(REG_INTL_BUFF_LEN, &data_read);
		printk("  INTL Buffer_len = %x", data_read);
		data_read = 0;