📄 usb.c
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//
// Check the arguments.
//
ASSERT(ulBase == USB0_BASE);
ASSERT((ulEndpoint == USB_EP_1) || (ulEndpoint == USB_EP_2) ||
(ulEndpoint == USB_EP_3));
//
// Determine if a transmit or receive endpoint is being configured.
//
if(ulFlags & USB_EP_DEV_IN)
{
//
// Set the maximum packet size.
//
HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXMAXP1) =
ulMaxPacketSize;
//
// The transmit control value is zero unless options are enabled.
//
ulRegister = 0;
//
// Allow auto setting of TxPktRdy when max packet size has been loaded
// into the FIFO.
//
if(ulFlags & USB_EP_AUTO_SET)
{
ulRegister |= USB_TXCSRH1_AUTOSET;
}
//
// Configure the DMA mode.
//
if(ulFlags & USB_EP_DMA_MODE_1)
{
ulRegister |= USB_TXCSRH1_DMAEN | USB_TXCSRH1_DMAMOD;
}
else if(ulFlags & USB_EP_DMA_MODE_0)
{
ulRegister |= USB_TXCSRH1_DMAEN;
}
//
// Enable isochronous mode if requested.
//
if((ulFlags & USB_EP_MODE_MASK) == USB_EP_MODE_ISOC)
{
ulRegister |= USB_TXCSRH1_ISO;
}
//
// Write the transmit control value.
//
HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXCSRH1) =
(unsigned char)ulRegister;
//
// Reset the Data toggle to zero.
//
HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXCSRL1) =
USB_TXCSRL1_CLRDT;
}
else
{
//
// Set the MaxPacketSize.
//
HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXMAXP1) =
ulMaxPacketSize;
//
// The receive control value is zero unless options are enabled.
//
ulRegister = 0;
//
// Allow auto clearing of RxPktRdy when packet of size max packet
// has been unloaded from the FIFO.
//
if(ulFlags & USB_EP_AUTO_CLEAR)
{
ulRegister = USB_RXCSRH1_AUTOCL;
}
//
// Configure the DMA mode.
//
if(ulFlags & USB_EP_DMA_MODE_1)
{
ulRegister |= USB_RXCSRH1_DMAEN | USB_RXCSRH1_DMAMOD;
}
else if(ulFlags & USB_EP_DMA_MODE_0)
{
ulRegister |= USB_RXCSRH1_DMAEN;
}
//
// Enable isochronous mode if requested.
//
if(USB_EP_MODE_ISOC & (ulFlags & USB_EP_MODE_MASK))
{
ulRegister |= USB_RXCSRH1_ISO;
}
//
// Write the receive control value.
//
HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXCSRH1) =
(unsigned char)ulRegister;
//
// Reset the Data toggle to zero.
//
HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXCSRL1) =
USB_RXCSRL1_CLRDT;
}
}
//*****************************************************************************
//
//! Gets the current configuration for an endpoint.
//!
//! \param ulBase specifies the USB module base address.
//! \param ulEndpoint is the endpoint to access.
//! \param pulMaxPacketSize is a pointer which will be written with the
//! maximum packet size for this endpoint.
//! \param pulFlags is a pointer which will be written with the current
//! endpoint settings. On entry to the function, this pointer must contain
//! either \b USB_EP_DEV_IN or \b USB_EP_DEV_OUT to indicate whether the IN or
//! OUT endpoint is to be queried.
//!
//! This function will return the basic configuration for an endpoint in device
//! mode. The values returned in \e *pulMaxPacketSize and \e *pulFlags are
//! equivalent to the \e ulMaxPacketSize and \e ulFlags previously passed to
//! USBDevEndpointConfig for this endpoint.
//!
//! \note This function should only be called in device mode.
//!
//! \return None.
//
//*****************************************************************************
void
USBDevEndpointConfigGet(unsigned long ulBase, unsigned long ulEndpoint,
unsigned long *pulMaxPacketSize,
unsigned long *pulFlags)
{
unsigned long ulRegister;
//
// Check the arguments.
//
ASSERT(ulBase == USB0_BASE);
ASSERT(pulMaxPacketSize && pulFlags);
ASSERT((ulEndpoint == USB_EP_1) || (ulEndpoint == USB_EP_2) ||
(ulEndpoint == USB_EP_3));
//
// Determine if a transmit or receive endpoint is being queried.
//
if(*pulFlags & USB_EP_DEV_IN)
{
//
// Clear the flags other than the direction bit.
//
*pulFlags = USB_EP_DEV_IN;
//
// Get the maximum packet size.
//
*pulMaxPacketSize = (unsigned long)HWREGB(ulBase +
EP_OFFSET(ulEndpoint) +
USB_O_TXMAXP1);
//
// Get the current transmit control register value.
//
ulRegister = (unsigned long)HWREGB(ulBase + EP_OFFSET(ulEndpoint) +
USB_O_TXCSRH1);
//
// Are we allowing auto setting of TxPktRdy when max packet size has
// been loaded into the FIFO?
//
if(ulRegister & USB_TXCSRH1_AUTOSET)
{
*pulFlags |= USB_EP_AUTO_SET;
}
//
// Get the DMA mode.
//
if(ulRegister & USB_TXCSRH1_DMAEN)
{
if(ulRegister & USB_TXCSRH1_DMAMOD)
{
*pulFlags |= USB_EP_DMA_MODE_1;
}
else
{
*pulFlags |= USB_EP_DMA_MODE_0;
}
}
//
// Are we in isochronous mode?
//
if(ulRegister & USB_TXCSRH1_ISO)
{
*pulFlags |= USB_EP_MODE_ISOC;
}
else
{
//
// The hardware doesn't differentiate between bulk, interrupt
// and control mode for the endpoint so we just set something
// that isn't isochronous. This ensures that anyone modifying
// the returned flags in preparation for a call to
// USBDevEndpointConfig will not see an unexpected mode change.
// If they decode the returned mode, however, they may be in for
// a surprise.
//
*pulFlags |= USB_EP_MODE_BULK;
}
}
else
{
//
// Clear the flags other than the direction bit.
//
*pulFlags = USB_EP_DEV_OUT;
//
// Get the MaxPacketSize.
//
*pulMaxPacketSize = (unsigned long)HWREGB(ulBase +
EP_OFFSET(ulEndpoint) +
USB_O_RXMAXP1);
//
// Get the current receive control register value.
//
ulRegister = (unsigned long)HWREGB(ulBase + EP_OFFSET(ulEndpoint) +
USB_O_RXCSRH1);
//
// Are we allowing auto clearing of RxPktRdy when packet of size max
// packet has been unloaded from the FIFO?
//
if(ulRegister & USB_RXCSRH1_AUTOCL)
{
*pulFlags |= USB_EP_AUTO_CLEAR;
}
//
// Get the DMA mode.
//
if(ulRegister & USB_RXCSRH1_DMAEN)
{
if(ulRegister & USB_RXCSRH1_DMAMOD)
{
*pulFlags |= USB_EP_DMA_MODE_1;
}
else
{
*pulFlags |= USB_EP_DMA_MODE_0;
}
}
//
// Are we in isochronous mode?
//
if(ulRegister & USB_RXCSRH1_ISO)
{
*pulFlags |= USB_EP_MODE_ISOC;
}
else
{
//
// The hardware doesn't differentiate between bulk, interrupt
// and control mode for the endpoint so we just set something
// that isn't isochronous. This ensures that anyone modifying
// the returned flags in preparation for a call to
// USBDevEndpointConfig will not see an unexpected mode change.
// If they decode the returned mode, however, they may be in for
// a surprise.
//
*pulFlags |= USB_EP_MODE_BULK;
}
}
}
//*****************************************************************************
//
//! Sets the FIFO configuration for an endpoint.
//!
//! \param ulBase specifies the USB module base address.
//! \param ulEndpoint is the endpoint to access.
//! \param ulFIFOAddress is the starting address for the FIFO.
//! \param ulFIFOSize is the size of the FIFO in bytes.
//! \param ulFlags specifies what information to set in the FIFO configuration.
//!
//! This function will set the starting FIFO RAM address and size of the FIFO
//! for a given endpoint. Endpoint zero does not have a dynamically
//! configurable FIFO so this function should not be called for endpoint zero.
//! The \e ulFIFOSize parameter should be one of the values in the
//! \b USB_FIFO_SZ_ values. If the endpoint is going to use double buffering
//! it should use the values with the \b _DB at the end of the value. For
//! example, use \b USB_FIFO_SZ_16_DB to configure an endpoint to have a 16
//! byte double buffered FIFO. If a double buffered FIFO is used, then the
//! actual size of the FIFO will be twice the size indicated by the
//! \e ulFIFOSize parameter. This means that the \b USB_FIFO_SZ_16_DB value
//! will use 32 bytes of the USB controller's FIFO memory.
//!
//! The \e ulFIFOAddress value should be a multiple of 8 bytes and directly
//! indicates the starting address in the USB controller's FIFO RAM. For
//! example, a value of 64 indicates that the FIFO should start 64 bytes into
//! the USB controller's FIFO memory. The \e ulFlags value specifies whether
//! the endpoint's OUT or IN FIFO should be configured. If in host mode, use
//! \b USB_EP_HOST_OUT or \b USB_EP_HOST_IN, and if in device mode use
//! \b USB_EP_DEV_OUT or \b USB_EP_DEV_IN.
//!
//! \return None.
//
//*****************************************************************************
void
USBFIFOConfigSet(unsigned long ulBase, unsigned long ulEndpoint,
unsigned long ulFIFOAddress, unsigned long ulFIFOSize,
unsigned long ulFlags)
{
//
// Check the arguments.
//
ASSERT(ulBase == USB0_BASE);
ASSERT((ulEndpoint == USB_EP_1) || (ulEndpoint == USB_EP_2) ||
(ulEndpoint == USB_EP_3));
//
// See if the transmit or receive FIFO is being configured.
//
if(ulFlags & (USB_EP_HOST_OUT | USB_EP_DEV_IN))
{
//
// Set the transmit FIFO location and size for this endpoint.
//
USBIndexWrite(ulBase, ulEndpoint >> 4, USB_O_TXFIFOSZ, ulFIFOSize, 1);
USBIndexWrite(ulBase, ulEndpoint >> 4, USB_O_TXFIFOADD,
ulFIFOAddress >> 3, 2);
}
else
{
//
// Set the receive FIFO location and size for this endpoint.
//
USBIndexWrite(ulBase, ulEndpoint >> 4, USB_O_RXFIFOSZ, ulFIFOSize, 1);
USBIndexWrite(ulBase, ulEndpoint >> 4, USB_O_RXFIFOADD,
ulFIFOAddress >> 3, 2);
}
}
//*****************************************************************************
//
//! Returns the FIFO configuration for an endpoint.
//!
//! \param ulBase specifies the USB module base address.
//! \param ulEndpoint is the endpoint to access.
//! \param pulFIFOAddress is the starting address for the FIFO.
//! \param pulFIFOSize is the size of the FIFO in bytes.
//! \param ulFlags specifies what information to retrieve from the FIFO
//! configuration.
//!
//! This function will return the starting address and size of the FIFO for a
//! given endpoint. Endpoint zero does not have a dynamically configurable
//! FIFO so this function should not be called for endpoint zero. The
//! \e ulFlags parameter specifies whether the endpoint's OUT or IN FIFO should
//! be read. If in host mode, the \e ulFlags parameter should be
//! \b USB_EP_HOST_OUT or \b USB_EP_HOST_IN, and if in device mode the
//! \e ulFlags parameter should be either \b USB_EP_DEV_OUT or
//! \b USB_EP_DEV_IN.
//!
//! \return None.
//
//*****************************************************************************
void
USBFIFOConfigGet(unsigned long ulBase, unsigned long ulEndpoint,
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