hal_platform_ints.h

eCos/RedBoot for勤研ARM AnywhereII(4510) 含全部源代码

//==========================================================================
//
//      hal_platform_ints.h
//
//==========================================================================
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):    Sonys <[e-mail]>
// Contributors: 
// Date:         2004-09-27
// Purpose:      
// Description:  
//
// Copyright (C) 2004 Sonys. All rights reserved.
//####DESCRIPTIONEND####
//==========================================================================
#ifndef CYGONCE_HAL_PLATFORM_INTS_H
#define CYGONCE_HAL_PLATFORM_INTS_H

#define CYGNUM_HAL_INTERRUPT_EXT0     0
#define CYGNUM_HAL_INTERRUPT_EXT1     1
#define CYGNUM_HAL_INTERRUPT_EXT2     2
#define CYGNUM_HAL_INTERRUPT_EXT3     3
#define CYGNUM_HAL_INTERRUPT_UART0_TX 4
#define CYGNUM_HAL_INTERRUPT_UART0_RX 5
#if !defined(CYG_HAL_CPUTYPE)
#error CYG_HAL_CPUTYPE not defined
#endif
#if defined(CYG_HAL_CPUTYPE_KS32C5000A)
#define CYGNUM_HAL_INTERRUPT_UART0_ERR 6
#define CYGNUM_HAL_INTERRUPT_UART1_TX  7
#define CYGNUM_HAL_INTERRUPT_UART1_RX  8
#define CYGNUM_HAL_INTERRUPT_UART1_ERR 9
#define CYGNUM_HAL_INTERRUPT_DMA0     10
#define CYGNUM_HAL_INTERRUPT_DMA1     11
#define CYGNUM_HAL_INTERRUPT_TIMER0   12
#define CYGNUM_HAL_INTERRUPT_TIMER1   13
#define CYGNUM_HAL_INTERRUPT_HDLCA    14
#define CYGNUM_HAL_INTERRUPT_HDLCB    15
#else
#define CYGNUM_HAL_INTERRUPT_UART1_TX 6
#define CYGNUM_HAL_INTERRUPT_UART1_RX  7
#define CYGNUM_HAL_INTERRUPT_DMA0     8
#define CYGNUM_HAL_INTERRUPT_DMA1     9
#define CYGNUM_HAL_INTERRUPT_TIMER0   10
#define CYGNUM_HAL_INTERRUPT_TIMER1   11
#define CYGNUM_HAL_INTERRUPT_HDLCA_TX  12
#define CYGNUM_HAL_INTERRUPT_HDLCA_RX  13
#define CYGNUM_HAL_INTERRUPT_HDLCB_TX  14
#define CYGNUM_HAL_INTERRUPT_HDLCB_RX  15
#endif
#define CYGNUM_HAL_INTERRUPT_ETH_BDMA_TX  16
#define CYGNUM_HAL_INTERRUPT_ETH_BDMA_RX  17
#define CYGNUM_HAL_INTERRUPT_ETH_MAC_TX   18
#define CYGNUM_HAL_INTERRUPT_ETH_MAC_RX   19
#define CYGNUM_HAL_INTERRUPT_I2C      20

#define CYGNUM_HAL_ISR_MIN                        0
#define CYGNUM_HAL_ISR_MAX                        20
#define CYGNUM_HAL_ISR_COUNT                      21

// The vector used by the Real time clock

#define CYGNUM_HAL_INTERRUPT_RTC                  CYGNUM_HAL_INTERRUPT_TIMER0

//----------------------------------------------------------------------------
// Reset.
#define HAL_PLATFORM_RESET()

#define HAL_PLATFORM_RESET_ENTRY 0x01800000

#endif // CYGONCE_HAL_PLATFORM_INTS_H