testintr.cxx

eCos/RedBoot for勤研ARM AnywhereII(4510) 含全部源代码

} while ( 0 )

#define DELAY()                                 \
if ( 1 & loops )                                \
    DELAYLOCKSCHED();                           \
else                                            \
    LONGDELAY();
    

volatile int wakeups[ 5 ] = { 0,0,0,0,0 };
volatile int prewups[ 5 ] = { 0,0,0,0,0 };


void task1( unsigned int arg )
{
    ER ercd;
    int loops;

    CYG_TEST_INFO( "Task 1 running" );

    if ( cyg_test_is_simulator ) {
        // take less time
        events     = EVENTSSIM;
    }


    // First test that dis_int() and ena_int() work for the clock interrupt
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
    ercd = ena_int( 123456789 ); // Hope this is large enough to error
    CYG_TEST_CHECK( E_PAR == ercd, "ena_int bad ercd !E_PAR" );
    ercd = dis_int( 123456789 );
    CYG_TEST_CHECK( E_PAR == ercd, "dis_int bad ercd !E_PAR" );
#endif

    // This may take too long on a sim...
    // On the synthetic target this test cannot run reliably - the
    // loop counting assumes exclusive access to the processor.
#ifndef CYGPKG_HAL_SYNTH    
    if ( ! cyg_test_is_simulator ) {
        SYSTIME t1, t2;

        CYG_TEST_INFO( "Testing masking of clock interrupt" );

        ercd = get_tim( &t1 );
        CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );

        // Wait for a tick. This loop acts as a synchronizer for the loop
        // below, ensuring that it starts just after a tick.
        for ( loops = 0; loops < 10000000; loops++ ) {
            ercd = get_tim( &t2 );
            CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
            if ( t2 != t1 )
                break;
        }
        // Wait for next tick. Reset loops counter so we get the
        // approximate loop count of one clock tick.
        for ( loops = 0; loops < 10000000; loops++ ) {
            ercd = get_tim( &t1 );
            CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
            if ( t2 != t1 )
                break;
        }

        // save how many loops could be executed in one tick. Multiply
        // with 3 : we run loops in pairs below and add the time of
        // one extra to avoid small variations to trigger failures.
        intercom = loops * 3;

        ercd = ena_int( clock_interrupt ); // was initialized already
        CYG_TEST_CHECK( E_OK == ercd, "ena_int bad ercd" );

        ercd = get_tim( &t1 );
        CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );

        // Wait for a tick
        for ( loops = intercom; loops > 0; loops-- ) {
            ercd = get_tim( &t2 );
            CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
            if ( t2 != t1 )
                break;
        }
        CYG_TEST_CHECK( 0 < loops, "No first tick" );
        // and a second one
        for (                 ; loops > 0; loops-- ) {
            ercd = get_tim( &t1 );
            CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
            if ( t2 != t1 )
                break;
        }
        CYG_TEST_CHECK( 0 < loops, "No second tick" );
        
        // The PowerPC cannot disable the timer interrupt (separately).
#ifndef CYGPKG_HAL_POWERPC
        ercd = dis_int( clock_interrupt ); // was initialized already
        CYG_TEST_CHECK( E_OK == ercd, "dis_int bad ercd" );

        ercd = get_tim( &t1 );
        CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );

        // Wait for a tick (should not happen)
        for ( loops = intercom; loops > 0; loops-- ) {
            ercd = get_tim( &t2 );
            CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
            if ( t2 != t1 )
                break;
        }
        CYG_TEST_CHECK( 0 == loops, "A tick occured - should be masked" );
        CYG_TEST_CHECK( t1 == t2, "Times are different" );

        // Now enable it again and ensure all is well:
        ercd = ena_int( clock_interrupt );
        CYG_TEST_CHECK( E_OK == ercd, "ena_int bad ercd" );
#endif
        
        ercd = get_tim( &t1 );
        CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );

        // Wait for a tick
        for ( loops = intercom; loops > 0; loops-- ) {
            ercd = get_tim( &t2 );
            CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
            if ( t2 != t1 )
                break;
        }
        CYG_TEST_CHECK( 0 < loops, "No first tick" );
        // and a second one
        for (                 ; loops > 0; loops-- ) {
            ercd = get_tim( &t1 );
            CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
            if ( t2 != t1 )
                break;
        }
        CYG_TEST_CHECK( 0 < loops, "No second tick" );

        CYG_TEST_PASS( "dis_int(), ena_int() OK" );
    }
#endif
    
    intercom = 0;

    ercd = get_tid( &scratch );
    CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" );
    CYG_TEST_CHECK( 1 == scratch, "tid not 1" );

    // start all other tasks (our prio is 1 by default)
    ercd = sta_tsk( 2, 222 );
    CYG_TEST_CHECK( E_OK == ercd, "sta_tsk 2 bad ercd" );
    ercd = sta_tsk( 3, 333 );
    CYG_TEST_CHECK( E_OK == ercd, "sta_tsk 3 bad ercd" );
    ercd = sta_tsk( 4, 444 );
    CYG_TEST_CHECK( E_OK == ercd, "sta_tsk 4 bad ercd" );
    // drop pri of other tasks all to 5
    ercd = chg_pri( 2, 5 );
    CYG_TEST_CHECK( E_OK == ercd, "chg_pri 2 bad ercd" );
    ercd = chg_pri( 3, 5 );
    CYG_TEST_CHECK( E_OK == ercd, "chg_pri 3 bad ercd" );
    ercd = chg_pri( 4, 5 );
    CYG_TEST_CHECK( E_OK == ercd, "chg_pri 4 bad ercd" );

    // Test sleep/wakeup
    intercom = SLP;
    // Drop our prio to lower; they will run in turn until asleep
    ercd = chg_pri( 1, 6 );
    CYG_TEST_CHECK( E_OK == ercd, "chg_pri 1 (self) bad ercd" );
    
    loops = 4;
    do {

        if ( 1 & loops )
            CYG_TEST_INFO( " (toggling scheduler lock) " );
        else
            CYG_TEST_INFO( " (unlocked scheduler) " );


        CYG_TEST_CHECK(          0 == wakeups[0], "init: Wakeups[0] hit" );
        CYG_TEST_CHECK(          0 == wakeups[1], "init: Wakeups[1] hit" );
        CYG_TEST_CHECK( prewups[2] == wakeups[2], "init: Wakeups[2] hit" );
        CYG_TEST_CHECK( prewups[3] == wakeups[3], "init: Wakeups[3] hit" );
        CYG_TEST_CHECK( prewups[4] == wakeups[4], "init: Wakeups[4] hit" );

        // -------- TIMERS AND TIMESLICING DISABLED ---------
        // install an isr that will wake them all up in turn
        attach_isr( isr_wup_tsk );
        DELAY();
        detach_isr( isr_wup_tsk );
        // -------- timers and timeslicing ENABLED ---------
        
        CYG_TEST_CHECK(         0 == wakeups[0], "iwup_tsk: Wakeups[0] hit" );
        CYG_TEST_CHECK(         0 == wakeups[1], "iwup_tsk: Wakeups[1] hit" );
        CYG_TEST_CHECK( prewups[2] < wakeups[2], "iwup_tsk: Wakeups[2] not hit" );
        CYG_TEST_CHECK( prewups[3] < wakeups[3], "iwup_tsk: Wakeups[3] not hit" );
        CYG_TEST_CHECK( prewups[4] < wakeups[4], "iwup_tsk: Wakeups[4] not hit" );
        diag_printf( "INFO:<(fg loops %10d) thread wakeups : %2d %2d %2d >\n", count,
                     wakeups[2] - prewups[2],
                     wakeups[3] - prewups[3],
                     wakeups[4] - prewups[4] );
        prewups[2] = wakeups[2];
        prewups[3] = wakeups[3];
        prewups[4] = wakeups[4];
        
        // -------- TIMERS AND TIMESLICING DISABLED ---------
        // install an isr that will wake them all up in turn
        attach_isr( isr_ret_wup );
        DELAY();
        detach_isr( isr_ret_wup );
        // -------- timers and timeslicing ENABLED ---------
        
        CYG_TEST_CHECK(         0 == wakeups[0], "ret_wup: Wakeups[0] hit" );
        CYG_TEST_CHECK(         0 == wakeups[1], "ret_wup: Wakeups[1] hit" );
        CYG_TEST_CHECK( prewups[2] < wakeups[2], "ret_wup: Wakeups[2] not hit" );
        CYG_TEST_CHECK( prewups[3] < wakeups[3], "ret_wup: Wakeups[3] not hit" );
        CYG_TEST_CHECK( prewups[4] < wakeups[4], "ret_wup: Wakeups[4] not hit" );
        diag_printf( "INFO:<(fg loops %10d) thread ret_wups: %2d %2d %2d >\n", count,
                     wakeups[2] - prewups[2],
                     wakeups[3] - prewups[3],
                     wakeups[4] - prewups[4] );
        prewups[2] = wakeups[2];
        prewups[3] = wakeups[3];
        prewups[4] = wakeups[4];
        
        // move them on to waiting for a semaphore
        intercom = SEM;
        ercd = wup_tsk( 2 );
        CYG_TEST_CHECK( E_OK == ercd, "wup_tsk(2) bad ercd" );
        ercd = wup_tsk( 3 );
        CYG_TEST_CHECK( E_OK == ercd, "wup_tsk(3) bad ercd" );
        ercd = wup_tsk( 4 );
        CYG_TEST_CHECK( E_OK == ercd, "wup_tsk(4) bad ercd" );
        
        CYG_TEST_CHECK(              0 == wakeups[0], "wup_tsk: Wakeups[0] hit" );
        CYG_TEST_CHECK(              0 == wakeups[1], "wup_tsk: Wakeups[1] hit" );
        CYG_TEST_CHECK( prewups[2] + 1 == wakeups[2], "wup_tsk: Wakeups[2] not hit" );
        CYG_TEST_CHECK( prewups[3] + 1 == wakeups[3], "wup_tsk: Wakeups[3] not hit" );
        CYG_TEST_CHECK( prewups[4] + 1 == wakeups[4], "wup_tsk: Wakeups[4] not hit" );
        prewups[2] = wakeups[2];
        prewups[3] = wakeups[3];
        prewups[4] = wakeups[4];
        
        // -------- TIMERS AND TIMESLICING DISABLED ---------
        // install an isr that will wake them all up in turn
        attach_isr( isr_sig_sem );
        DELAY();
        detach_isr( isr_sig_sem );
        // -------- timers and timeslicing ENABLED ---------
        
        CYG_TEST_CHECK(         0 == wakeups[0], "isig_sem: Wakeups[0] hit" );
        CYG_TEST_CHECK(         0 == wakeups[1], "isig_sem: Wakeups[1] hit" );
        CYG_TEST_CHECK( prewups[2] < wakeups[2], "isig_sem: Wakeups[2] not hit" );
        CYG_TEST_CHECK( prewups[3] < wakeups[3], "isig_sem: Wakeups[3] not hit" );
        CYG_TEST_CHECK( prewups[4] < wakeups[4], "isig_sem: Wakeups[4] not hit" );
        diag_printf( "INFO:<(fg loops %10d) semaphore waits: %2d %2d %2d >\n", count,
                     wakeups[2] - prewups[2],
                     wakeups[3] - prewups[3],
                     wakeups[4] - prewups[4] );
        prewups[2] = wakeups[2];
        prewups[3] = wakeups[3];
        prewups[4] = wakeups[4];

        // move them on to waiting for a flag
        intercom = FLG;
        ercd = sig_sem( 1 );
        CYG_TEST_CHECK( E_OK == ercd, "sig_sem(1) bad ercd" );
        ercd = sig_sem( 2 );
        CYG_TEST_CHECK( E_OK == ercd, "sig_sem(2) bad ercd" );
        ercd = sig_sem( 3 );
        CYG_TEST_CHECK( E_OK == ercd, "sig_sem(3) bad ercd" );

        CYG_TEST_CHECK(              0 == wakeups[0], "sig_sem: Wakeups[0] hit" );
        CYG_TEST_CHECK(              0 == wakeups[1], "sig_sem: Wakeups[1] hit" );
        CYG_TEST_CHECK( prewups[2] + 1 == wakeups[2], "sig_sem: Wakeups[2] not hit" );
        CYG_TEST_CHECK( prewups[3] + 1 == wakeups[3], "sig_sem: Wakeups[3] not hit" );
        CYG_TEST_CHECK( prewups[4] + 1 == wakeups[4], "sig_sem: Wakeups[4] not hit" );
        prewups[2] = wakeups[2];
        prewups[3] = wakeups[3];
        prewups[4] = wakeups[4];
        
        // -------- TIMERS AND TIMESLICING DISABLED ---------
        // install an isr that will wake them all up in turn
        attach_isr( isr_set_flg );
        DELAY();
        detach_isr( isr_set_flg );
        // -------- timers and timeslicing ENABLED ---------
        
        CYG_TEST_CHECK(         0 == wakeups[0], "iset_flg: Wakeups[0] hit" );
        CYG_TEST_CHECK(         0 == wakeups[1], "iset_flg: Wakeups[1] hit" );
        CYG_TEST_CHECK( prewups[2] < wakeups[2], "iset_flg: Wakeups[2] not hit" );
        CYG_TEST_CHECK( prewups[3] < wakeups[3], "iset_flg: Wakeups[3] not hit" );
        CYG_TEST_CHECK( prewups[4] < wakeups[4], "iset_flg: Wakeups[4] not hit" );
        diag_printf( "INFO:<(fg loops %10d) flag waits/sets: %2d %2d %2d >\n", count,
                     wakeups[2] - prewups[2],
                     wakeups[3] - prewups[3],
                     wakeups[4] - prewups[4] );
        prewups[2] = wakeups[2];
        prewups[3] = wakeups[3];
        prewups[4] = wakeups[4];

        // move them on to waiting for a message box
        intercom = MBX;