os_cpu.h

UCOS II源码 内含SOURCE 解压后使用

/*
*************************************************************************
*************************************************************************
**                                                                     **
**  FILE	    : OS_CPU.H                                         **
**                                                                     **
**  DESCRIPTION     : Infineon Tricore Specific code with  GHS         **
**                    tool chain.                                      **
**                                                                     **
**  AUTHOR          : Andre Gompel                                     **
**                                                                     **
**  REVISION HISTORY:                                                  **
**                                                                     **
**                                                                     **
**  Copyright (c) 2000 Micrium Inc.                                    **
**                All Rights Reserved                                  **
**                                                                     **
**  Copyright (c) 2000 Infineon Technologies Corproration              **
**                All Rights Reserved                                  **
**                                                                     **
**  THIS SOFTWARE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR           **
**  IMPLIED WARRANTY. BOTH INFINEON TECHNOLOGIES CORPORATION AND       **
**  MICRIUM INC. DISCLAIMS ALL REPRESENTATIONS AND WARRANTIES WITH     **
**  REGARD TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF       **
**  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT  **
**  SHALL INFINEON TECHNOLOGIES CORPORATION OR MICRIUM INC. BE LIABLE  **
**  FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES  **
**  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN **
**  AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACT OR         **
**  OMISSION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR          **
**  PERFORMANCE OF THIS SOFTWARE.                                      **
**                                                                     **
*************************************************************************
*************************************************************************
*/

//
// Note for Tricore Port, posix types have been used instead of macros
// this allows more type testing to the compiler.
// a script has been used to automate change to all the sources files.
// Note also that the file tc_defs.h is tricore specific, and will be renamed to handle 
// various flavors of Tricore and address mappings.
// Also note the use of the POSIX types for the most common objects.
// The specific UCOS-Ii types have been keept.
//

#ifndef 	TRICORE							/* Normally defined in os_cfg.h	*/
#define 	TRICORE
#endif

typedef unsigned char  BOOLEAN;
typedef unsigned char  INT8U;                    /* Unsigned  8 bit quantity                           */
typedef signed   char  INT8S;                    /* Signed    8 bit quantity                           */
typedef unsigned short INT16U;                   /* Unsigned 16 bit quantity                           */
typedef signed   short INT16S;                   /* Signed   16 bit quantity                           */
typedef unsigned int   INT32U;                   /* Unsigned 32 bit quantity                           */
typedef signed   int   INT32S;                   /* Signed   32 bit quantity                           */
typedef float          FP32;                     /* Single precision floating point                    */
typedef double         FP64;                     /* Double precision floating point                    */
typedef INT32U			  fcx_t;							 /* fcx link word format. */
typedef INT32U 		  OS_STK;

typedef struct os_tsk_ext								/* AG: Used for task creation */
{
	fcx_t	fcx;							
	fcx_t	lcx;							
				//	No need for pcxi at task creation: always initialized to zero.
} 
	os_tsk_ext_t, *p_os_tsk_ext_t; 

#define 	TRICORE_TCB_EXTENSIONS\
	INT32U	   pcxi;\
	INT32U		fcx;\
	INT32U		lcx;

//OS_EXT
//INT32U	g_free_ctx,					// Set by OSInitTriCore, Updated by os_ctx_alloc
//					g_next_fcx,			// Set by OSInitTriCore, Updated by os_ctx_alloc
//					g_tsk_ctx0,			//	Set by OSInitTriCore, Updated by os_ctx_alloc
//					g_tsk_lcx,			//	Updated by os_ctx_alloc
//		 			g_ctx_req; 			// Must be initialized.

extern	INT32U	g_tsk_ctx0;
extern	INT32U	g_tsk_lcx;
extern void OSprintf(char *fmt, ...);

#define PCXI_PCPN	0xff000000
#define PCXI_PIE	0x00800000
#define PCXI_UC	0x00400000
#define PCXI_LC	0x00000000
#define TSK_CSA_SIZE 16				/* Default for task context size */
/*
*********************************************************************************************************
*                                              CONSTANTS
*********************************************************************************************************
*/

#ifndef  FALSE
#define  FALSE    0
#endif

#ifndef  TRUE
#define  TRUE     1
#endif

/* 
*********************************************************************************************************
*                                           Tricore TC10 (Rider-A and Rider-B
*
* Method #1:  Disable/Enable interrupts using simple instructions.  After critical section, interrupts
*             will be enabled even if they were disabled before entering the critical section.  
*
* Method #2:  Disable/Enable interrupts by preserving the state of interrupts.  In other words, if 
*             interrupts were disabled before entering the critical section, they will be disabled when
*             leaving the critical section.
*********************************************************************************************************
*/

#define  OS_CRITICAL_METHOD    2	     	/* Tricore: uses method 2 , Andre.*/

#if      OS_CRITICAL_METHOD == 1				
#define  OS_ENTER_CRITICAL() __asm ("disable")
#define  OS_EXIT_CRITICAL()  __asm ("enable")

#endif
								

#if      OS_CRITICAL_METHOD == 2

/* 
**		References:
**		Read Jean Labrosse's book MicroC/OS-II (1999 edition) page 196, at 8.03.02
**		and also the TriCore Architecture manual (ICR and interrupts to understand 
**		the following. The method 1 does not work with TriCore if you want to use
**		interrupts.		
**
**  	We are using this algorithm because, writing the "whole" ICR using mtcr, 
**		is really not a valid option passed initialization:some fields only can 
**		be written, also some fields are dynamically modified.
**
*/


#define  OS_ENTER_CRITICAL() __asm ("mfcr d0, (ICR & 0xffff)");\
									  __asm ("st.w [+a9]-4,d0");\
									  __asm ("disable");


#define  OS_EXIT_CRITICAL()  __asm("ld.w d0,[a9+]4");\
									  __asm("jz.t d0,8,.+8");\
									  __asm("enable");

#define  OS_ENABLE_GW()		__asm("mfcr d0, (PSW & 0xffff)");\
								  	__asm("insert d0, d0, 1, 8, 1");\
									__asm("mtcr (PSW & 0xffff), d0");\
									__asm("isync");

#endif

//
// CTX_RESERVED is the number of context from the free list, reserved to the main 
// program. It could be fairly low since the main() function does not have much nested calls
// or code to return to from an exception.
//

#define CTX_RESERVED	4


#define  OS_TASK_SW()         __asm ("syscall 0")


#define  OS_STK_GROWTH        1                             /* Define stack growth: 1 = Down, 0 = Up   */

/* 
** Note: In this application, mostly because the stack grows "downward",
** in other words the stack pointer is decremented when dat is pushed into the
** stack, and incremented when "poped" out of stack.
** Note that TriCore architechture would allow a stack "growing upward".
** the only limitation is the convention which describes the TriCore EABI
** or Embbeded Application Bianary Interface.
** So the TriCore C compilers implement a stack type "1"
**
**/