usb.h

usb的测试源码 PDIUSBD12 是一款性价比很高的USB 器件它通常用作微控制器系统中实现与微控制器进行通信的 高速通用并行接口它还支持本地的DMA 传输 这种实现USB 接口的标准组件使得设计

/*
 *	usb.h  --  demo of test usb chip_id application
 *	
 *	Author: 	li ming <[e-mail]>
 *	Date:		2004-11-1
 *	Copyright:	http://www.lumit.org
 */
 
#ifndef  _USB_H_
#define _USB_H_

#define D12_NOLAZYCLOCK			  0x02
#define D12_CLOCKRUNNING      0x04
#define D12_INTERRUPTMODE		  0x08
#define D12_SOFTCONNECT			  0x10
#define D12_ENDP_NONISO			  0x00
#define D12_ENDP_ISOOUT			  0x40
#define D12_ENDP_ISOIN			  0x80
#define D12_ENDP_ISOIO			  0xC0

#define D12_CLOCK_12M			    0x03
#define D12_CLOCK_4M			    0x0b
#define D12_SETTOONE          0x40
#define D12_SOFONLY				    0x80

#define D12_DMASINGLE			    0x00
#define D12_BURST_4				    0x01
#define D12_BURST_8				    0x02
#define D12_BURST_16			    0x03
#define D12_DMAENABLE         0x04
#define D12_DMA_INTOKEN			  0x08
#define D12_AUTOLOAD			    0x10
#define D12_NORMALPLUSSOF	  	0x20
#define D12_ENDP4INTENABLE		0x40
#define D12_ENDP5INTENABLE		0x80	// bug fixed in V2.1

#define D12_INT_ENDP0OUT		  0x01
#define D12_INT_ENDP0IN			  0x02
#define D12_INT_ENDP1OUT                       0x04
#define D12_INT_ENDP1IN			  0x08
#define D12_INT_ENDP2OUT		           0x10
#define D12_INT_ENDP2IN			  0x20
#define D12_INT_BUSRESET		  0x40
#define D12_INT_SUSPENDCHANGE	0x80
#define D12_INT_EOT			  0x0100

#define D12_SETUPPACKET			  0x20

#define D12_BUFFER0FULL			  0x20
#define D12_BUFFER1FULL			  0x40

#define D12_FULLEMPTY		   	  0x01
#define D12_STALL				  0x02

/* here see um_s3c4510b.pdf 5-4 */
/* 
NON-CACHEABLE AREA CONTROL BIT
Although the cache affects the entire system memory, it is sometimes necessary to define non-cacheable areas
when the consistency of data stored in memory and the cache must be ensured. To support this, the S3C4510B
provides a non-cacheable area control bit in the address field, ADDR[26].
If ADDR[26] in the ROM/SRAM, flash memory, DRAM, or external I/O bank's access address is "0", then the
accessed data is cacheable. If the ADDR[26] value is "1", the accessed data is non-cacheable.
*/
/*
Special thanks to gongxufei <[e-mail]> for this great contribution
*/
//  for USB DATA and COMMAND, set addr[26] = 1 so the accessed data is non-cacheable
#define D12_DATA			0x07fd0000 	//D12 use nECS0 as the chip selection
#define D12_COMMAND			0x07fd0001 


#define D12_Output(Addr,Data)    (*((volatile unsigned char *) (Addr)) = (Data))
#define D12_Input(Addr)          (*(volatile unsigned char *) (Addr))

#define D12CmdPortOutB(Cmd)      D12_Output(D12_COMMAND, Cmd)
#define D12DataPortOutB(Data)    D12_Output(D12_DATA, Data)
#define D12DataPortInB()         D12_Input(D12_DATA)

#define D12_CLOCK_12M		 0x03
#define D12_SETTOONE         0x40
#define D12_NOLAZYCLOCK		 0x02
#define D12_SOFTCONNECT		 0x10

void USBTest(void);

#endif