📄 omap30_dspintf_l3.h
字号:
//-------------------------------------------------------------------------------
// TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
// Property of Texas Instruments
// For Unrestricted Internal Use Only
// Unauthorized reprofuction and/or distribution is strictly prohibited.
// This product is protected under copyright law and trade secret law
// as an unpublished work
// Created 2000, (C) Copyright 2000 Texas Instruments. All rights reserved
//
//-------------------------------------------------------------------------------
#ifndef _DSPINT__HH
#define _DSPINT__HH
//------------------------------------
// Status Register 1 (ST1)
//------------------------------------
//INTM (Interrupt Mode Bit)
//--------
#define ST1_INTM_UNMASKED 0x0
#define ST1_INTM_MASKED 0x1
#define ST1_INTM_POS 11
#define ST1_INTM_NUMB 1
#define ST1_INTM_RESET_VAL 1
//------------------------------------
// Interrupt Enable Registers (IER0 & IER1)
//------------------------------------
//IEn (Interrupt Enable Bits)
//--------
//
#define INTERRUPT_ENABLE 0x1
#define INTERRUPT_DISABLE 0x0
#define IER0_ALLINT_MASK 0xFFFC
#define IER1_ALLINT_MASK 0x07FF
#define IER_IE_NUMB 1
//------------------------------------
// Interrupt Flag Registers (IFR0 & IFR1)
//------------------------------------
//IFn (Interrupt Flag Bits)
//--------
//
#define INTERRUPT_PENDING 0x1
#define INTERRUPT_NOT_PENDING 0x0
#define IFR0_ALLINT_MASK 0xFFFC
#define IFR1_ALLINT_MASK 0x07FF
#define IFR_IF_NUMB 1
//------------------------------------
// Interrupt Vector Pointer DSP and Host (IVPD & IVPH)
//------------------------------------
//IVPD (Interrupt Vector Pointer DSP)
//--------
#define IVPD_POS 0
#define IVPD_NUMB 16
#define IVPD_RESET_VAL 0xFFFF
//IVPH (Interrupt Vector Pointer Host)
//--------
#define IVPH_POS 0
#define IVPH_NUMB 16
#define IVPH_RESET_VAL 0xFFFF
//------------------------------------
// Opcode of B P24 instruction
//------------------------------------
#define B_P24_OPCODE 0x6A
//------------------------------------
// Opcode of NOP_16 instruction
//------------------------------------
#define NOP_16_OPCODE 0x5E80
//------------------------------------
// RHEA Interrupt and Priority Switcher Registers
//------------------------------------
#define RHEA_PER1_REG_OFFSET 0x03
#define RHEA_PER2_REG_OFFSET 0x04
#define RHEA_PER3_REG_OFFSET 0x05
#define RHEA_PER4_REG_OFFSET 0x06
#define RHEA_PER5_REG_OFFSET 0x07
#define RHEA_PER6_REG_OFFSET 0x08
#define RHEA_PER7_REG_OFFSET 0x09
#define RHEA_PER8_REG_OFFSET 0x0A
#define RHEA_PER9_REG_OFFSET 0x0B
#define RHEA_PER10_REG_OFFSET 0x0C
#define RHEA_PER11_REG_OFFSET 0x0D
#define RHEA_PER1_REG_ADDR (IO_RHEA_ADDR + RHEA_PER1_REG_OFFSET)
#define RHEA_PER2_REG_ADDR (IO_RHEA_ADDR + RHEA_PER2_REG_OFFSET)
#define RHEA_PER3_REG_ADDR (IO_RHEA_ADDR + RHEA_PER3_REG_OFFSET)
#define RHEA_PER4_REG_ADDR (IO_RHEA_ADDR + RHEA_PER4_REG_OFFSET)
#define RHEA_PER5_REG_ADDR (IO_RHEA_ADDR + RHEA_PER5_REG_OFFSET)
#define RHEA_PER6_REG_ADDR (IO_RHEA_ADDR + RHEA_PER6_REG_OFFSET)
#define RHEA_PER7_REG_ADDR (IO_RHEA_ADDR + RHEA_PER7_REG_OFFSET)
#define RHEA_PER8_REG_ADDR (IO_RHEA_ADDR + RHEA_PER8_REG_OFFSET)
#define RHEA_PER9_REG_ADDR (IO_RHEA_ADDR + RHEA_PER9_REG_OFFSET)
#define RHEA_PER10_REG_ADDR (IO_RHEA_ADDR + RHEA_PER10_REG_OFFSET)
#define RHEA_PER11_REG_ADDR (IO_RHEA_ADDR + RHEA_PER11_REG_OFFSET)
//PINn (Peripheral Interrupt Numbers)
//--------
#define PER_PIN0_POS 0
#define PER_PIN1_POS 8
#define PER_PIN_NUMB 5
//------------------------------------
// Number of Peripheral Interrupts
//------------------------------------
#define NUM_OF_MGS_INT 22
//------------------------------------
// Megastar Interrupts
//------------------------------------
#define EMU_INT 0
#define EMIF_INT 1
#define INTH0_INT 2
#define INTH1_INT 3
#define RHEA_INT 4
#define TIMER1_INT 5
#define MAILBOX1_INT 6
#define LOCALBUS_INT 7
#define HSAB_INT 8
#define GPIO_INT 9
#define UART_INT 10
#define WDGTIMER_INT 11
#define TC_ABORT_INT 12
#define TIMER2_INT 13
#define TIMER3_INT 14
#define DMA_CH0_INT 15
#define DMA_CH1_INT 16
#define DMA_CH2_INT 17
#define DMA_CH3_INT 18
#define DMA_CH4_INT 19
#define DMA_CH5_INT 20
#define HOST_INT 21
//------------------------------------
// DSPINT Interrupts
//------------------------------------
#define DSPINT_INT2 2
#define DSPINT_INT3 3
#define DSPINT_INT4 4
#define DSPINT_INT5 5
#define DSPINT_INT6 6
#define DSPINT_INT7 7
#define DSPINT_INT8 8
#define DSPINT_INT9 9
#define DSPINT_INT10 10
#define DSPINT_INT11 11
#define DSPINT_INT12 12
#define DSPINT_INT13 13
#define DSPINT_INT14 14
#define DSPINT_INT15 15
#define DSPINT_INT16 16
#define DSPINT_INT17 17
#define DSPINT_INT18 18
#define DSPINT_INT19 19
#define DSPINT_INT20 20
#define DSPINT_INT21 21
#define DSPINT_INT22 22
#define DSPINT_INT23 23
#define DSPINT_BERRINT 24
#define DSPINT_DLOGINT 25
#define DSPINT_RTOSINT 26
//---------------------------------------------------------------------------
// NAME : DSPINT_MoveIVT
// DESCRIPTION : Relocate Interrupt Vector Table to SARAM31
//
// PARAMETERS : None
//
// RETURN VALUE: None
// LIMITATIONS : None
//---------------------------------------------------------------------------
void DSPINT_MoveIVT(void);
//---------------------------------------------------------------------------
// NAME : DSPINT_AddEntryToIVT
// DESCRIPTION : Add a new entry to the Interrupt Vector Table
// (Interrupt Vector Table Located in SARAM31)
//
// PARAMETERS :
// MGSIntNum = Number of the Megastar interrupt [0 .. 21] to be linked with
// the Interrupt Service Routine :
// EMU_INT, EMIF_INT, INTH0_INT, INTH1_INT, RHEA_INT,
// TIMER1_INT, MAILBOX1_INT, LOCALBUS_INT, HSAB_INT,
// GPIO_INT, UART_INT, WDGTIMER_INT, TC_ABORT_INT,
// TIMER2_INT, TIMER3_INT, DMA_CH0_INT, DMA_CH1_INT,
// DMA_CH2_INT, DMA_CH3_INT, DMA_CH4_INT, DMA_CH5_INT,
// HOST_INT
// ISRAddr = Address of the corresponding Interrupt Service Routine
//
// RETURN VALUE: None
// LIMITATIONS : None
//---------------------------------------------------------------------------
void DSPINT_AddEntryToIVT(UWORD16 MGSIntNum, UWORD32 ISRAddr);
//---------------------------------------------------------------------------
// NAME : DSPINT_EnableOneIT
// DESCRIPTION : Unmask one Megastar interrupt
//
// PARAMETERS :
// MGSIntNum = Number of the Megastar Interrupt to be
// unmasked [0 .. 21] :
// EMU_INT, EMIF_INT, INTH0_INT, INTH1_INT, RHEA_INT,
// TIMER1_INT, MAILBOX1_INT, LOCALBUS_INT, HSAB_INT,
// GPIO_INT, UART_INT, WDGTIMER_INT, TC_ABORT_INT,
// TIMER2_INT, TIMER3_INT, DMA_CH0_INT, DMA_CH1_INT,
// DMA_CH2_INT, DMA_CH3_INT, DMA_CH4_INT, DMA_CH5_INT,
// HOST_INT
//
// RETURN VALUE: None
// LIMITATIONS : None
//---------------------------------------------------------------------------
void DSPINT_EnableOneIT(UWORD16 MGSIntNum);
//---------------------------------------------------------------------------
// NAME : DSPINT_DisableOneIT
// DESCRIPTION : Mask one Megastar interrupt
//
// PARAMETERS :
// MGSIntNum = Number of the Megastar Interrupt to be
// masked [0 .. 21] :
// EMU_INT, EMIF_INT, INTH0_INT, INTH1_INT, RHEA_INT,
// TIMER1_INT, MAILBOX1_INT, LOCALBUS_INT, HSAB_INT,
// GPIO_INT, UART_INT, WDGTIMER_INT, TC_ABORT_INT,
// TIMER2_INT, TIMER3_INT, DMA_CH0_INT, DMA_CH1_INT,
// DMA_CH2_INT, DMA_CH3_INT, DMA_CH4_INT, DMA_CH5_INT,
// HOST_INT
//
// RETURN VALUE: None
// LIMITATIONS : None
//---------------------------------------------------------------------------
void DSPINT_DisableOneIT(UWORD16 MGSIntNum);
//---------------------------------------------------------------------------
// NAME : DSPINT_EnableAllIT
// DESCRIPTION : Unmask all interrupts
//
// PARAMETERS : None
//
// RETURN VALUE: None
// LIMITATIONS : None
//---------------------------------------------------------------------------
void DSPINT_EnableAllIT(void);
//---------------------------------------------------------------------------
// NAME : DSPINT_DisableAllIT
// DESCRIPTION : Mask all interrupts
//
// PARAMETERS : None
//
// RETURN VALUE: None
// LIMITATIONS : None
//---------------------------------------------------------------------------
void DSPINT_DisableAllIT(void);
//---------------------------------------------------------------------------
// NAME : DSPINT_EnableGlobalIT
// DESCRIPTION : Enable the maskable interrupts
//
// PARAMETERS : None
//
// RETURN VALUE: None
// LIMITATIONS : None
//---------------------------------------------------------------------------
void DSPINT_EnableGlobalIT(void);
//---------------------------------------------------------------------------
// NAME : DSPINT_DisableGlobalIT
// DESCRIPTION : Disable the maskable interrupts
//
// PARAMETERS : None
//
// RETURN VALUE: None
// LIMITATIONS : None
//---------------------------------------------------------------------------
void DSPINT_DisableGlobalIT(void);
//---------------------------------------------------------------------------
// NAME : DSPINT_GetPendingIT
// DESCRIPTION : Return the pending interrupts (IFR0 and IFR1)
//
// PARAMETERS : None
//
// RETURN VALUE: Return value of Interrupt Flag Registers
// LIMITATIONS : None
//---------------------------------------------------------------------------
UWORD32 DSPINT_GetPendingIT(void);
//---------------------------------------------------------------------------
// NAME : DSPINT_MapMGSINT
// DESCRIPTION : Map a Megastar interrupt to one of the 22 maskable interrupt
//
// PARAMETERS :
// DSPIntNum = Number of Maskable Interrupt [2 .. 23] :
// DSPINT_INTn (n = {2 .. 23})
// MGSIntNum = Number of the Megastar Interrupt [0 .. 21] :
// EMU_INT, EMIF_INT, INTH0_INT, INTH1_INT, RHEA_INT,
// TIMER1_INT, MAILBOX1_INT, LOCALBUS_INT, HSAB_INT,
// GPIO_INT, UART_INT, WDGTIMER_INT, TC_ABORT_INT,
// TIMER2_INT, TIMER3_INT, DMA_CH0_INT, DMA_CH1_INT,
// DMA_CH2_INT, DMA_CH3_INT, DMA_CH4_INT, DMA_CH5_INT,
// HOST_INT
//
// RETURN VALUE: If correct return TRUE, otherwise FALSE
// LIMITATIONS : None
//---------------------------------------------------------------------------
UWORD16 DSPINT_MapMGSINT(UWORD16 DSPIntNum,
UWORD16 MGSIntNum);
#endif
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -